This is the Analog Pool block diagram in its entirety, and this slide will walk through an ADC example. The analog input is channel A0. This will serve as the positive input to the comparator. The input network can provide either a divide by 1 or a divide by 2 input scale so that users can look at signals as large as 500 mV. The DAC provides the reference with which this presentation will compare the A0 input. That DAC register starts off at 0 or 1 mV and will continue to basically augment the DAC voltage and check to see if the input voltage is less than the reference. The automation of the comparison and increment of the DAC reference is done with the surrounding logic that have been highlighted in blue. When A0 is larger than the reference, the start/stop logic continues to increase the reference until the comparator output changes from a 1 to a 0. At this point, the value of the DAC represents the voltage at A0. The direction of the DAC RAMP or slope can either be in the up or down direction as will be shown in the following examples.