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During a read sequence, an SMBus master reads data from a Slave device. The slave in this transfer will be a receiver during the address Byte, and a transmitter during all data Bytes. When slave events are enabled (INH = 0), the interface enters the slave receiver mode (to receive the slave address) when a START followed by a slave address and direction bit (READ in this case) is received. If hardware ACK generation is disabled, upon entering the slave receiver mode, an interrupt is generated and the ACKRQ bit is set. The software must respond to the received slave address with an ACK, or ignore the received slave address with a NACK. If hardware ACK generation is enabled, the hardware will apply the ACK for a slave address which matches the criteria set up by SMB0ADR and SMB0ADM. The interrupt will occur after the ACK cycle.
PTM Published on: 2011-06-01
Austria