Datenblatt für STL18NM60N von STMicroelectronics

This is information on a product in full production.
November 2013 DocID018856 Rev 3 1/16
STL18NM60N
N-channel 600 V, 0.26 Ω typ., 12 A MDmesh™ II Power MOSFET in
a PowerFLAT™ 8x8 HV package
Datasheet
-
production data
Figure 1. Internal schematic diagram
Features
100% avalanche tested
Low input capacitance and gate charge
Low gate input resistance
Applications
Switching applications
Description
This device is an N-channel Power MOSFET
developed using the second generation of
MDmesh™ technology. This revolutionary Power
MOSFET associates a vertical structure to the
company’s strip layout to yield one of the world’s
lowest on-resistance and gate charge. It is
therefore suitable for the most demanding high
efficiency converters.
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Order code V
DS
@ T
Jmax
R
DS(on)
max I
D
STL18NM60N 650 V 0.310 Ω12 A
(1)
1. The value is rated according to R
thj-case
Table 1. Device summary
Order code Marking Packages Packaging
STL18NM60N 18NM60N PowerFLAT™ 8x8 HV Tape and reel
www.st.com
Contents STL18NM60N
2/16 DocID018856 Rev 3
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
DocID018856 Rev 3 3/16
STL18NM60N Electrical ratings
16
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
DS
Drain-source voltage 600 V
V
GS
Gate-source voltage ± 30 V
I
D (1)
1. The value is rated according to R
thj-case
Drain current (continuous) at T
C
= 25 °C 12 A
I
D (1)
Drain current (continuous) at T
C
= 100 °C 7.5 A
I
D(2)
2. When mounted on 1inch² FR-4 board, 2 oz Cu
Drain current (continuous) at T
amb
= 25 °C 2.1 A
I
D(2)
Drain current (continuous) at T
amb
= 100 °C 1.2 A
I
DM(2),(3)
3. Pulse width limited by safe operating area
Drain current (pulsed) 8.4 A
P
TOT (2)
Total dissipation at T
amb
= 25 °C 3 W
P
TOT(1)
Total dissipation at T
C
= 25 °C 110 W
I
AR
Avalanche current, repetitive or not-
repetitive (pulse width limited by T
j
max) 4.5 A
E
AS
Single pulse avalanche energy
(starting T
j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V) 350 mJ
dv/dt
(4)
4. I
SD
12 A, di/dt 400 A/µs, V
DSpeak
V
(BR)DSS
, V
DD
= 80% V
(BR)DSS
Peak diode recovery voltage slope 15 V/ns
T
stg
Storage temperature - 55 to 150 °C
T
j
Max. operating junction temperature 150 °C
Table 3. Thermal data
Symbol Parameter Value Unit
R
thj-case
Thermal resistance junction-case max 1.14 °C/W
R
thj-amb(1)
1. When mounted on 1inch² FR-4 board, 2 oz Cu
Thermal resistance junction-amb max 42 °C/W
Electrical characteristics STL18NM60N
4/16 DocID018856 Rev 3
2 Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 4. On /off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
breakdown voltage I
D
= 1 mA, V
GS
= 0 600 V
I
DSS
Zero gate voltage
drain current (V
GS
= 0)
V
DS
= 600 V 1 µA
V
DS
= 600 V, T
C
= 125 °C 100 µA
I
GSS
Gate-body leakage
current (V
DS
= 0) V
GS
= ± 25 V ±100 nA
V
GS(th)
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA 2 3 4 V
R
DS(on)
Static drain-source on
resistance V
GS
= 10 V, I
D
= 6 A 0.260 0.310 Ω
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
C
iss
Input capacitance
V
DS
= 50 V, f = 1 MHz,
V
GS
= 0
- 1000 - pF
C
oss
Output capacitance 60 - pF
C
rss
Reverse transfer
capacitance 3-pF
C
oss eq.(1)
1. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80% V
DS
.
Output equivalent
capacitance V
DS
= 0 to 480 V, V
GS
= 0 - 225 - pF
R
G
Intrinsic gate
resistance f = 1, I
D
=0 - 3.5 - Ω
Q
g
Total gate charge V
DD
= 480 V, I
D
= 12 A,
V
GS
= 10 V
(see Figure 14)
-35-nC
Q
gs
Gate-source charge - 6 - nC
Q
gd
Gate-drain charge - 20 - nC
Table 6. Switching times
Symbol Parameter Test conditions Min. Typ. Max Unit
t
d(on)
Turn-on delay time
V
DD
= 300 V, I
D
= 6.5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 17)
-12-ns
t
r
Rise time 15 ns
t
d(off)
Turn-on delay time 55 ns
t
f
Fall time 25 ns
DocID018856 Rev 3 5/16
STL18NM60N Electrical characteristics
16
Table 7. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
SD
Source-drain current - 12 A
I
SDM
(1)
1. Pulse width limited by safe operating area.
Source-drain current (pulsed) - 48 A
V
SD
(2)
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Forward on voltage I
SD
= 12 A, V
GS
= 0 - 1.6 V
t
rr
Reverse recovery time I
SD
= 12 A, di/dt = 100 A/µs
V
DD
= 60 V
(see Figure 15)
- 300 ns
Q
rr
Reverse recovery charge - 4.0 µC
I
RRM
Reverse recovery current - 25 A
t
rr
Reverse recovery time V
DD
= 60 V
di/dt = 100 As, I
SD
= 12 A
T
j
=150 °C (see Figure 15)
- 360 ns
Q
rr
Reverse recovery charge - 4.5 µC
I
RRM
Reverse recovery current - 25 A
Electrical characteristics STL18NM60N
6/16 DocID018856 Rev 3
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Normalized V
DS
vs temperature Figure 7. Static drain-source on-resistance
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-5
10
-4
10
-3
10
-2
t
p
(s)
10
-2
10
-1
K
0.2
0.05
0.02
0.01
0.1
Single pulse
d=0.5
case
Zth PowerFLAT 8x8 HV
I
D
6
4
2
0
010 V
DS
(V)
(A)
515
8
4V
5V
6V
V
GS
=7, 8, 9, 10V
20
10
12
14
16
18
20
22
24
26
28
AM15788v1
I
D
4
0
04V
GS
(V)
8
(A)
26
8
12
V
DS
=18V
14
16
10
2
6
10
18
20
22
24
26
28
30
AM15789v1
V
DS
-50 0T
J
(°C)
(norm)
-25 75
25 50 100
0.92
0.94
0.96
0.98
1.00
1.02
1.04
1.06
I
D
=1mA
1.08
1.10
AM09028v1
R
DS(on)
0.260
0.255
0.250
0.2450I
D
(A)
(Ω)
0.265
0.270
V
GS
=10V
482 6 10 12
AM09788v1
DocID018856 Rev 3 7/16
STL18NM60N Electrical characteristics
16
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage
vs temperature Figure 11. Normalized on-resistance vs
temperature
Figure 12. Source-drain diode forward
characteristics
V
GS
6
4
2
0
010 Q
g
(nC)
(V)
40
8
20 30
10
V
DD
=480V
I
D
=12A
12
300
200
100
0
400
500
V
DS
V
DS
(V)
AM05531v1
C
1000
100
10
1
0.1 10 V
DS
(V)
(pF)
1100
Ciss
Coss
Crss
AM05532v1
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Test circuits STL18NM60N
8/16 DocID018856 Rev 3
3 Test circuits
Figure 13. Switching times test circuit for
resistive load Figure 14. Gate charge test circuit
Figure 15. Test circuit for inductive load
switching and diode recovery times Figure 16. Unclamped inductive load test
circuit
Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform
AM01468v1
VGS
PW
VD
RG
RL
D.U.T.
2200
μF
3.3
μFVDD
AM01469v1
VDD
47kΩ1kΩ
47kΩ
2.7kΩ
1kΩ
12V
Vi=20V=VGMAX
2200
μF
PW
IG=CONST
100Ω
100nF
D.U.T.
VG
AM01470v1
A
D
D.U.T.
S
B
G
25 Ω
AA
BB
RG
G
FAST
DIODE
D
S
L=100μH
μF
3.3 1000
μFVDD
AM01471v1
Vi
Pw
VD
ID
D.U.T.
L
2200
μF
3.3
μFVDD
AM01472v1
V(BR)DSS
VDD
VDD
VD
IDM
ID
AM01473v1
VDS
ton
tdon tdoff
toff
tf
tr
90%
10%
10%
0
0
90%
90%
10%
VGS
DocID018856 Rev 3 9/16
STL18NM60N Package mechanical data
16
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Package mechanical data STL18NM60N
10/16 DocID018856 Rev 3
Table 8. PowerFLAT™ 8x8 HV mechanical data
Dim. mm
Min. Typ. Max.
A 0.80 0.90 1.00
A1 0.00 0.02 0.05
b 0.95 1.00 1.05
D8.00
E8.00
D2 7.05 7.20 7.30
E2 4.15 4.30 4.40
e2.00
L 0.40 0.50 0.60
BUTTON V‘EW 4 PIN“ H] L r E2 4x 0 ‘ T D2 5qu Wm 7' 4 x n 77 fl “ SEA‘HNG T [ PLANE D \ w \ \ INDEX AREA ‘ TOP VIEW
DocID018856 Rev 3 11/16
STL18NM60N Package mechanical data
16
Figure 19. PowerFLAT™ 8x8 HV drawing mechanical data
8222871_REV_C
‘Lfl
Package mechanical data STL18NM60N
12/16 DocID018856 Rev 3
Figure 20. PowerFLAT™ 8x8 HV recommended footprint (dimensions in mm.)
8222871_REV_C_footprint
W . M‘ m 4747++++++4M¢+T +‘ j F 1-:- LM vvvvv {00000000000 I“ H“ H“ [ a %
DocID018856 Rev 3 13/16
STL18NM60N Packaging mechanical data
16
5 Packaging mechanical data
Figure 21. PowerFLAT™ 8x8 HV tape
Figure 22. PowerFLAT™ 8x8 HV package orientation in carrier tape.
W (16.00±0.3)
E (1.75±0.1)
F (7.50±0.1)
A0 (8.30±0.1)
P1 (12.00±0.1)
P2 (2.0±0.1) P0 (4.0±0.1)
D0 ( 1.55±0.05)
D1 ( 1.5 Min)
T (0.30±0.05)
B0 (8.30±0.1)
K0 (1.10±0.1)
Note: Base and Bulk quantity 3000 pcs
8229819_Tape_revA
Packaging mechanical data STL18NM60N
14/16 DocID018856 Rev 3
Figure 23. PowerFLAT™ 8x8 HV reel
8229819_Reel_revA
DocID018856 Rev 3 15/16
STL18NM60N Revision history
16
6 Revision history
Table 9. Document revision history
Date Revision Changes
19-May-2011 1 First release.
03-Nov-2011 2 Section 4: Package mechanical data has been updated.
Minor text changes.
28-Nov-2013 3
Modified: title
Modified: V
GS
, I
AR
, E
AS
values in Table 2
Modified: note 2 in Table 2
Modified: R
thj-amb
value in Table 3
Modified: I
D
value in Table 5
Modified: the entire typical value in Table 6
Modified: I
SD
value in Table 6
Modified: Figure 3, 4, 5, 13, 14, 15, and 16
Updated: Section 4: Package mechanical data and added
Section 5: Packaging mechanical data
W m
STL18NM60N
16/16 DocID018856 Rev 3
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