Datenblatt für MAX15061 von Analog Devices Inc./Maxim Integrated

lVI/JXI/VI [VI/JXIIVI
General Description
The MAX15061 consists of a constant-frequency pulse-
width modulating (PWM) step-up DC-DC converter with
an internal switch and a high-side current monitor with
high-speed adjustable current limiting. This device can
generate output voltages up to 76V and provides current
monitoring up to 4mA (up to 300mW). The MAX15061
can be used for a wide variety of applications such as
avalanche photodiode biasing, PIN biasing, or varactor
biasing, and LCD displays. The MAX15061 operates
from 2.7V to 11V.
The constant-frequency (400kHz), current-mode PWM
architecture provides low-noise output voltage that is
easy to filter. A high-voltage, internal power switch
allows this device to boost output voltages up to 76V.
Internal soft-start circuitry limits the input current when
the boost converter starts. The MAX15061 features a
shutdown mode to save power.
The MAX15061 includes a current monitor with more
than three decades of dynamic range and monitors cur-
rent ranging from 500nA to 2mA with high accuracy.
Resistor-adjustable current limiting protects the APD
from optical power transients. A clamp diode protects
the monitor’s output from overvoltage conditions. Other
protection features include cycle-by-cycle current limit-
ing of the boost converter switch, undervoltage lockout,
and thermal shutdown if the die temperature reaches
+160°C.
The MAX15061 is available in a thermally enhanced
4mm x 4mm, 16-pin TQFN package and operates over
the -40°C to +125°C automotive temperature range.
Applications
Avalanche Photodiode Biasing and Monitoring
PIN Diode Bias Supplies
Low-Noise Varactor Diode Bias Supplies
FBON Modules
GPON Modules
LCD Displays
Features
oInput Voltage Range
+2.7V to +5.5V (Using Internal Charge Pump) or
+5.5V to +11V
oWide Output-Voltage Range from (VIN + 1V) to 76V
oInternal 1Ω(typ) 80V Switch
o300mW Boost Converter Output Power
oAccurate ±10% (500nA to 1mA) and ±3.5% (1mA
to 4mA) High-Side Current Monitor
oResistor-Adjustable Ultra-Fast APD Current Limit
(1µs Response Time)
oOpen-Drain Current-Limit Indicator Flag
o400kHz Fixed Switching Frequency
oConstant PWM Frequency Provides Easy Filtering
in Low-Noise Applications
oInternal Soft-Start
o2µA (max) Shutdown Current
o-40°C to +125°C Temperature Range
oSmall Thermally Enhanced, 4mm x 4mm, 16-Pin
TQFN Package
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
________________________________________________________________
Maxim Integrated Products
1
15
16
14
13
6
5
7
CP
IN
8
PWR
CLAMP
RLIM
APD
12
SHDN
4
12 11 9
PGND
LX
ILIM
CNTRL
FB
SGND
CN MOUT
3
10
BIAS
THIN QFN
(4mm
×
4mm)
TOP VIEW
MAX15061
+*EP
*CONNECT EXPOSED PAD TO SGND.
Pin Configuration
Ordering Information
19-5034; Rev 0; 10/09
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE
PIN-PACKAGE
MAX15061ATE+
-40°C to +125°C 16 TQFN-EP*
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed pad.
Typical Operating Circuits appear at end of data sheet.
\ayer board For delafled \mo'mauon 0H package therma‘ conswderahcms 'eie' to www.maxim- .comllhermaI-lulorial [VI/J XI [VI
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VIN = VPWR = 3.3V. VSHDN = 3.3V. CIN = CPWR = 10μF. CCP = 10nF, VCNTRL = VIN. VRLIM = 0V. VPGND = VSGND = 0V. VBIAS = 40V.
APD = unconnected. CLAMP = unconnected. ILIM = unconnected, MOUT = unconnected. TA= TJ= -40°C to +125°C, unless other-
wise noted. Typical values are at TA= +25°C.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
PWR, IN to SGND ...................................................-0.3V to +12V
LX to PGND ............................................................-0.3V to +80V
BIAS, APD to SGND ...............................................-0.3V to +80V
SHDN to SGND............................................-0.3V to (VIN + 0.3V)
CLAMP to SGND......................................-0.3V to (VBIAS + 0.3V)
FB, ILIM, RLIM, CP, CN, CNTRL to SGND .............-0.3V to +12V
PGND to SGND .....................................................-0.3V to +0.3V
MOUT to SGND ....................................-0.3V to (VCLAMP + 0.3V)
Continuous Power Dissipation
16-Pin TQFN (derate 25mW/°C above +70°C)..........2000mW
Thermal Resistance (Note 1)
θJA ...............................................................................40°C/W
θJC .................................................................................6°C/W
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
2.7 5.5
Supply Voltage Range VIN, VPWR CP connected to IN, CCP = open 5.5 11 V
VFB = 1.4V, no switching 1 2
Supply Current ISUPPLY VIN = 11V, VFB = 1.4V (no switching),
CCP = open, CP = IN 1.2 3 mA
Undervoltage Lockout Threshold VUVLO VIN rising 2.375 2.5 2.675 V
Undervoltage Lockout Hysteresis VUVLO_HYS 100 mV
Shutdown Current IIN_SHDN SHDN pulled low 2 μA
Bias Current During Shutdown IBIAS_SHDN VBIAS = 3.3V, V SHDN = 0V 30 μA
BOOST CONVERTER
Output-Voltage Adjustment
Range
VIN +
1V 76 V
VIN = VPWR = 5V 400
Switching Frequency fSW 2.9V ≤ VPWR ≤ 11V, VIN = VPWR 400 kHz
Maximum Duty Cycle DCLK 2.9V ≤ VPWR ≤ 11V, VIN = VPWR 90 %
FB Set-Point Voltage VFB 1.2201 1.245 1.2699 V
FB Input Bias Current IFB 100 nA
VPWR = VIN = 2.9V,
VCP = 5.5V 12
ILX = 100mA VPWR = VIN = 5.5V,
VCP = 10V 12
VPWR = VIN = VCP = 5.5V 1 2
Internal Switch On-Resistance RON
ILX = 100mA,
VCP = VIN VPWR = VIN = VCP = 11V 1 2
Ω
Peak Switch Current Limit ILIM_LX 0.8 1.2 1.6 A
LX Leakage Current VLX = 76V 1 μA
Line Regulation 2.9V ≤ VPWR ≤ 11V, VPWR = VIN,
ILOAD = 4.5mA 0.2 %
Load Regulation 0 ≤ ILOAD ≤ 4.5mA 1 %
lVI/JXI [VI
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
_______________________________________________________________________________________ 3
Note 2: All minimum/maximum parameters are tested at TA= +125°C. Limits over temperature are guaranteed by design.
Note 3: Guaranteed by design and not production tested.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Soft-Start Duration 8ms
Soft-Start Steps (0.25 x ILIM_LX) to ILIM_LX 32 Steps
CONTROL INPUT (CNTRL)
Maximum Control Input-Voltage
Range FB set point is regulated to VCNTRL 1.25 V
CURRENT MONITOR
Bias Voltage Range VBIAS 10 76 V
IAPD = 500nA 100 μA
Bias Quiescent Current IBIAS IAPD = 2mA 3.2 mA
Voltage Drop VDROP IAPD = 2mA, VDROP = VBIAS - VAPD 1V
IAPD = 500nA 1 GΩ
Dynamic Output Resistance at
MOUT RMOUT IAPD = 2.5mA 890 MΩ
MOUT Output Leakage APD is unconnected 1 nA
Output Clamp Voltage VMOUT -
VCLAMP Forward diode current = 1mA 0.5 0.73 0.95 V
Output Clamp Leakage Current VBIAS = VCLAMP = 76V 1 nA
Output-Voltage Range VMOUT 10V ≤ VBIAS ≤ 76V, 0 ≤ IAPD ≤ 1mA, clamp
is unconnected
VBIAS -
1V V
IAPD = 500nA 0.1
Current Gain IMOUT/IAPD IAPD = 2mA 0.0965 0.1 0.1035
IAPD = 500nA -1000 +300 +1500
Power-Supply Rejection Ratio PSRR
(ΔIMOUT/IMOUT)/ΔVBIAS,
VBIAS = 10V to 76V
(Note 3) IAPD = 5μA to
1mA -250 +24 +250
ppm/V
APD Input Current Limit ILIM_APD VAPD = 35V, RLIM = 3.3kΩ3.15 3.75 4.35 mA
Current-Limit Adjustment Range 12.45kΩ ≥ RLIM ≥ 2.5kΩ15mA
IAPD = 500nA 7.5 ms
Power-Up Settling Time tS
IMOUT settles to within
0.1%, 10nF connected
from APD to ground IAPD = 2.5mA 90 μs
LOGIC INPUTS/OUTPUTS
SHDN Input-Voltage Low VIL 0.8 V
SHDN Input-Voltage High VIH 2.4 V
ILIM Output-Voltage Low VOL ILIM = 2mA 0.3 V
ILIM Output Leakage Current IOH VILIM = 11V 1 μA
THERMAL PROTECTION
Thermal Shutdown Temperature rising +160 °C
Thermal Shutdown Hysteresis 10 °C
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VPWR = 3.3V. VSHDN = 3.3V. CIN = CPWR = 10μF. CCP = 10nF, VCNTRL = VIN. VRLIM = 0V. VPGND = VSGND = 0V. VBIAS = 40V.
APD = unconnected. CLAMP = unconnected. ILIM = unconnected, MOUT = unconnected. TA= TJ= -40°C to +125°C, unless other-
wise noted. Typical values are at TA= +25°C.) (Note 2)
IVIIIXIIVI
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
4 _______________________________________________________________________________________
Typical Operating Characteristics
(VPWR = VIN = 3.3V, VOUT = 70V, circuit of Figure 3 (Figure 4 for VIN > 5.5V), unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT
MAX15061 toc01
LOAD CURRENT (mA)
EFFICIENCY (%)
321
10
20
30
40
50
60
70
0
04
VOUT = 30V
VOUT = 55V
VOUT = 70V
VIN = 3.3V
EFFICIENCY vs. LOAD CURRENT
MAX15061 toc02
LOAD CURRENT (mA)
EFFICIENCY (%)
321
10
20
30
40
50
60
70
0
04
VOUT = 30V
VOUT = 55V
VOUT = 70V
VIN = 5V
EFFICIENCY vs. LOAD CURRENT
MAX15061 toc03
LOAD CURRENT (mA)
EFFICIENCY (%)
321
10
20
30
40
50
60
70
0
04
VIN = 3.3V VIN = 5V
VIN = 8V
VOUT = 70V
MINIMUM STARTUP VOLTAGE
vs. LOAD CURRENT
MAX15061 toc04
LOAD CURRENT (mA)
MINIMUM STARTUP VOLTAGE (V)
321
2.49
2.50
2.51
2.52
2.53
2.54
2.55
2.48
04
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX15061 toc05
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
1097 82 3 4 5 61
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
011
VFB = 1.4V
TA = +125°C
TA = +85°C
TA = -40°C
TA = +25°C
NO-LOAD SUPPLY CURRENT
vs. SUPPLY VOLTAGE
XMAX15061 toc06
SUPPLY VOLTAGE (V)
NO-LOAD SUPPLY CURRENT (mA)
10987654
10
20
30
40
50
60
0
311
TA = +85°C
TA = -40°C
TA = +25°C
EXITING SHUTDOWN
MAX15061 toc07
1ms/div
VOUT
50V/div
IL
500mA/div
VSHDN
2V/div
3V
0V
0mA
IOUT = 1mA
ENTERING SHUTDOWN
MAX15061 toc08
4ms/div
OUTPUT VOLTAGE
50V/div
INDUCTOR CURRENT
500mA/div
SHUTDOWN VOLTAGE
2V/div
3V
70V
0V
0mA
ILOAD = 1mA
80V, 300mW Mon lIEII'I-LDAII SWITGIIIIIB WAVEHIKM WITH KG FILIEI‘ 3 my m Ems' , in {:1 A L mew. I E; [VI/JXI [VI
LIGHT-LOAD SWITCHING
WAVEFORM WITH RC FILTER
MAX15061 toc09
1
μ
s/div
VBIAS
AC-COUPLED
VLX
50V/div
IL
500mA/div
1mV/div
0mA
0V
IOUT = 0.1mA, VBIAS = 70V
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
_______________________________________________________________________________________ 5
HEAVY-LOAD SWITCHING
WAVEFORM WITH RC FILTER
MAX15061 toc10
1
μ
s/div
VBIAS
AC-COUPLED
VLX
50V/div
IL
500mA/div
1mV/div
0mA
0V
IOUT = 4mA, VBIAS = 70V
LINE-TRANSIENT RESPONSE
MAX15061 toc12
100ms/div
VIN
2V/div
3.3V
VOUT
AC-COUPLED
100mV/div
VOUT = 70V
IOUT = 1mA
tRISE = 50μs
LOAD-TRANSIENT RESPONSE
MAX15061 toc11
100ms/div
VOUT
AC-COUPLED
200mV/div
ILOAD
5mA/div
0mA
VOUT = 70V
VIN = 3.3V
LX LEAKAGE CURRENT
vs. TEMPERATURE
MAX15061 toc13
TEMPERATURE (°C)
LX LEAKAGE CURRENT (nA)
1109565 80-10 520 35 50-25
20
40
60
80
100
120
140
160
180
200
0
-40 125
CURRENT INTO
LX PIN
Typical Operating Characteristics (continued)
(VPWR = VIN = 3.3V, VOUT = 70V, circuit of Figure 3 (Figure 4 for VIN > 5.5V), unless otherwise noted.)
MAXIMUM LOAD CURRENT
vs. INPUT VOLTAGE
MAX15061 toc15
INPUT VOLTAGE (V)
MAXIMUM LOAD CURRENT (mA)
1097 85 64
10
20
30
40
50
60
70
80
90
100
110
0
311
A
B
C
A: VOUT = 30V, B: VOUT = 35V, C: VOUT = 45V,
D: VOUT = 55V, E: VOUT = 60V, F: VOUT = 72V
D
EF
LOAD REGULATION
MAX15061 toc14
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
4321
68.2
68.4
68.6
68.8
69.0
69.2
69.4
69.6
69.8
70.0
68.0
05
BIAS CURRENT
vs. BIAS VOLTAGE
MAX15061 toc16
BIAS VOLTAGE (V)
BIAS CURRENT (mA)
70605040302010
0.1
1
10
0.01
080
IAPD = 2mA
IAPD = 500nA
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VPWR = VIN = 3.3V, VOUT = 70V, circuit of Figure 3 (Figure 4 for VIN > 5.5V), unless otherwise noted.)
BIAS CURRENT
vs. APD CURRENT
MAX15061 toc17
APD CURRENT (mA)
BIAS CURRENT (mA)
10.10.010.001
0.1
1
10
0.01
0.0001 10
VBIAS = 70V
BIAS CURRENT
vs. TEMPERATURE
MAX15061 toc18
TEMPERATURE (°C)
BIAS CURRENT (mA)
1109580655035205-10-25
0.1
1
10
0.01
-40 125
IAPD = 2mA
IAPD = 500nA
GAIN ERROR
vs. APD CURRENT
MAX15061 toc19
IAPD (μA)
GAIN ERROR (%)
1000100101
-4
-3
-2
-1
0
1
2
3
4
5
-5
0.1 10,000
VBIAS = 70V
GAIN ERROR
vs. TEMPERATURE
MAX15061 toc20
TEMPERATURE (°C)
GAIN ERROR (%)
11095-25 -10 535 50 6520 80
-2.5
-2.0
-1.5
-1.0
-0.5
0
0.5
1.0
-3.0
-40 125
VBIAS = 70V
IAPD = 500nA
IAPD = 50μA
IAPD = 5μA
IAPD = 2mA IAPD = 500μA
GAIN ERROR
vs. BIAS VOLTAGE
MAX15061 toc21
BIAS VOLTAGE (V)
GAIN ERROR (%)
706020 30 40 50
-0.60
-0.40
-0.20
0
0.20
0.40
0.60
0.80
-0.80
10 80
IAPD = 500nA
IAPD = 50μA
IAPD = 5μA
IAPD = 2mA
IAPD = 500μA
APD TRANSIENT RESPONSE
MAX15061 toc22
20μs/div
VAPD
AC-COUPLED
70V
2V/div
IAPD
2.5mA/div
IMOUT
0.25mA/div
0mA
0mA
STARTUP DELAY
MAX15061 toc23
200μs/div
VBIAS
20V/div
IMOUT
20nA/div
3V
0nA
IAPD = 500nA
STAMUP DElAV [VI/JXI [VI SHDflT-EIRGIJI'I RESPDIISE é : ‘é
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
_______________________________________________________________________________________ 7
STARTUP DELAY
MAX15061 toc24
100μs/div
VAPD
20V/div
IMOUT
50μA/div
3V
0nA
IAPD = 2mA
STARTUP DELAY
MAX15061 toc25
100μs/div
VAPD
2V/div
IMOUT
20nA/div
0V
0nA
IAPD = 500nA
VBIAS = 5V
STARTUP DELAY
MAX15061 toc26
40μs/div
VBIAS
2V/div
IMOUT
50μA/div
0V
0nA
IAPD = 2mA
VBIAS = 5V
SHORT-CIRCUIT RESPONSE
MAX15061 toc27
40ms/div
ILIM
2V/div
IBIAS
2mA/div
0V
0mA
VBIAS = 70V
TA = +85°C
RLIM = 2kΩ
Typical Operating Characteristics (continued)
(VPWR = VIN = 3.3V, VOUT = 70V, circuit of Figure 3 (Figure 4 for VIN > 5.5V), unless otherwise noted.)
VOLTAGE DROP
vs. APD CURRENT
MAX15061 toc28
IAPD (μA)
VBIAS - VAPD (V)
1000100101
0.20
0.40
0.60
0.80
1.00
1.20
1.40
0
0.1 10,000
TA = +25°C
TA = -40°C
TA = +125°C
TA = +85°C
SWITCHING FREQUENCY
vs. TEMPERATURE
MAX15061 toc29
TEMPERATURE (°C)
SWITCHING FREQUENCY (kHz)
1109565 80-10 520 35 50-25
320
340
360
380
400
420
440
460
480
500
300
-40 125
n w CAPAEHUR u FRUM APDTU um AEUTEU mum v, u ALI uuumu am: we, raw [VI/JXIIVI
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
8 _______________________________________________________________________________________
SWITCHING FREQUENCY
vs. INPUT VOLTAGE
MAX15061 toc30
INPUT VOLTAGE (V)
SWITCHING FREQUENCY (kHz)
10864
320
340
360
380
400
420
440
460
480
500
300
212
FB SET-POINT VARIATION
vs. TEMPERATURE
MAX15061 toc32
TEMPERATURE (°C)
FB SET-POINT VOLTAGE VARIATION (V)
1109580655035205-10-25
1.217
1.227
1.237
1.247
1.257
1.277
1.267
1.207
-40 125
VIN = 5.5V
VIN = 2.9V
VIN = 2.9V
VIN = 5.5V
FB RISING
FB FALLING
APD OUTPUT RIPPLE VOLTAGE
MAX15061 toc34
2μs/div
VAPD
AC-COUPLED, 55V
100μV/div
0.1μF CAPACITOR CONNECTED
FROM APD TO GND.
SWITCHING FREQUENCY AND
DUTY CYCLE vs. LOAD CURRENT
MAX15061 toc31
LOAD CURRENT (mA)
SWITCHING FREQUENCY (kHz)
DUTY CYCLE
321
385
390
395
400
405
410
415
420
380
10
40
30
20
50
60
0
04
DUTY CYCLE
SWITCHING FREQUENCY
MEASURED AT CN
APD OUTPUT RIPPLE VOLTAGE
MAX15061 toc33
2μs/div
VAPD
AC-COUPLED, 55V
200μV/div
APD OUTPUT RIPPLE VOLTAGE
MAX15061 toc35
2μs/div
VAPD
AC-COUPLED, 70V
500μV/div
0.1μF CAPACITOR CONNECTED
FROM APD TO GND.
Typical Operating Characteristics (continued)
(VPWR = VIN = 3.3V, VOUT = 70V, circuit of Figure 3 (Figure 4 for VIN > 5.5V), unless otherwise noted.)
lVI/JXI [VI
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
_______________________________________________________________________________________ 9
Pin Description
PIN NAME FUNCTION
1 PWR Boost Converter Input Voltage. PWR powers the switch driver and charge pump. Bypass PWR to PGND with a
ceramic capacitor of 1μF minimum value.
2CP
Positive Terminal of the Charge-Pump Flying Capacitor for 2.7V to 5.5V Supply Voltage Operation. Connect
CP to IN when the input voltage is in the 5.5V to 11V range.
3CN
Negative Terminal of the Charge-Pump Flying Capacitor for 2.7V to 5.5V Supply Voltage Operation. Leave CN
unconnected when the input voltage is in the 5.5V to 11V range.
4IN
Input Supply Voltage. IN powers all blocks of the MAX15061 except the switch driver and charge pump.
Bypass IN to PGND with a ceramic capacitor of 1μF minimum value.
5 SGND Signal Ground. Connect directly to the local ground plane. Connect SGND to PGND at a single point, typically
near the return terminal of the output capacitor.
6FB
Feedback Regulation Input. Connect FB to the center tap of a resistive voltage-divider from the output (VOUT)
to SGND to set the output voltage. The FB voltage regulates to 1.245V (typ) when VCNTRL is above 1.5V (typ)
and to VCNTRL voltage when VCNTRL is below 1.245V (typ).
7 CNTRL
Control Input for Boost Converter Output-Voltage Programmability. Allows the feedback set-point voltage to be
set externally by CNTRL when CNTRL is less than 1.245V. Pull CNTRL above 1.5V (typ) to use the internal
1.245V (typ) feedback set-point voltage.
8ILIM Open-Drain Current-Limit Indicator. ILIM asserts low when the APD current limit has been exceeded.
9 RLIM Current-Limit Resistor Connection. Connect a resistor from RLIM to SGND to program the APD current-limit
threshold.
10 MOUT Current-Monitor Output. MOUT sources a current 1/10 of IAPD.
11 CLAMP Clamp Voltage Input. CLAMP is the external potential used for voltage clamping of MOUT.
12 APD Reference Current Output. APD provides the source current to the cathode of the photodiode.
13 BIAS
Bias Voltage Input. Connect BIAS to the boost converter output (VOUT) either directly or through a lowpass
filter for ripple attenuation. BIAS provides the voltage bias for the current monitor and is the current source for
APD.
14 SHDN
Active-Low Shutdown Control Input. Apply a logic-low voltage to SHDN to shut down the device and reduce
the supply current to 2μA (max). Connect SHDN to IN for normal operation. Ensure that VSHDN is not greater
than the input voltage, VIN.
15 PGND Power Ground. Connect the negative terminals of the input and output capacitors to PGND. Connect PGND
externally to SGND at a single point, typically at the return terminal of the output capacitor.
16 LX Drain of Internal 80V n-Channel DMOS. Connect inductor and diode to LX. Minimize the trace area at LX to
reduce switching noise emission.
—EP
Exposed Pad. Connect EP to a large contiguous copper plane at SGND potential to improve thermal
dissipation. Do not use as the main SGND connection.
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
10 ______________________________________________________________________________________
Functional Diagram
80V
DMOS
+A
-C
-A
+C
CLK
VREF
VREF
SHDN BIAS
VREF
LX
ILIM
PWR
PGND
RLIM
MOUT
1x
APD
FB
SGND
CNTRL
CN
CP
IN
SWITCH
CONTROL
LOGIC
SOFT-
START
OUTPUT ERROR AND CURRENT
COMPARATOR
REFERENCE
COMPARATOR
CURRENT
MONITOR
OSCILLATOR
400kHz
CHARGE
PUMP
(DOUBLER)
BIAS AND
REFERENCE
THERMAL
SHUTDOWN
SWITCH
CURRENT
SENSE
CURRENT-
LIMIT
ADJUSTMENT
UVLO CURRENT
LIMIT
MUX
PEAK CURRENT-LIMIT
COMPARATOR
CLAMP
10x
MAX15061
Detailed Description
The MAX15061 constant-frequency, current-mode, PWM
boost converter is intended for low-voltage systems that
require a locally generated high voltage. This device can
generate a low-noise, high output voltage required for
PIN and varactor diode biasing and LCD displays. The
MAX15061 operates either from +2.7V to +5.5V or from
+5.5V to +11V. For 2.7V to 5.5V operation, an internal
charge pump with an external 10nF ceramic capacitor is
used. For 5.5V to 11V operation, connect CP to IN and
leave CN unconnected.
The MAX15061 operates in discontinuous mode in
order to reduce the switching noise caused by reverse-
voltage recovery charge of the rectifier diode. Other
continuous mode boost converters generate large volt-
age spikes at the output when the LX switch turns on
because there is a conduction path between the out-
put, diode, and switch to ground during the time need-
ed for the diode to turn off and reverse its bias voltage.
To reduce the output noise even further, the LX switch
turns off by taking 10ns typically to transition from ON
to OFF. As a consequence, the positive slew rate of the
LX node is reduced and the current from the inductor
does not “force” the output voltage as hard as would
be the case if the LX switch were to turn off faster.
The constant-frequency (400kHz) PWM architecture
generates an output voltage ripple that is easy to filter.
An 80V vertical DMOS device used as the internal
power switch is ideal for boost converters with output
voltages up to 76V. The MAX15061 can also be used in
other topologies where the PWM switch is grounded,
like SEPIC and flyback converters.
[VI/JXIIIII
MAX15061
The MAX15061 includes a versatile current monitor
intended for monitoring the APD, PIN, or varactor diode
DC current in fiber and other applications. The
MAX15061 features more than three decades of
dynamic current ranging from 500nA to 4mA and pro-
vides an output current accurately proportional to the
APD current at MOUT.
The MAX15061 also features a shutdown logic input to
disable the device and reduce its standby current to
2μA (max).
Fixed-Frequency PWM Controller
The heart of the MAX15061 current-mode PWM con-
troller is a BiCMOS multiple-input comparator that
simultaneously processes the output-error signal and
switch current signal. The main PWM comparator uses
direct summing, lacking a traditional error amplifier and
its associated phase shift. The direct summing configu-
ration approaches ideal cycle-by-cycle control over the
output voltage since there is no conventional error
amplifier in the feedback path.
The device operates in PWM mode using a fixed-fre-
quency, current-mode operation. The current-mode fre-
quency loop regulates the peak inductor current as a
function of the output error signal.
The current-mode PWM controller is intended for dis-
continuous conduction mode (DCM) operation. No
internal slope compensation is added to the current
signal.
Charge Pump
At low supply voltages (2.7V to 5.5V), internal charge-
pump circuitry and an external 10nF ceramic capacitor
connected between CP and CN double the available inter-
nal supply voltage to drive the internal switch efficiently.
In the 5.5V to 11V supply voltage range, the charge
pump is not required. In this configuration, disable the
charge pump by connecting CP to IN and leaving CN
unconnected.
Monitor Current Limit (RLIM)
The current limit of the current monitor is programmable
from 1mA to 5mA. Connect a resistor from RLIM to
ground to program the current-limit threshold up to 5mA.
The current monitor mirrors the current out of APD with
a 1:10 ratio, and the MOUT current can be converted to
a voltage signal by connecting a resistor from MOUT to
SGND.
The APD current-monitor range is from 500nA to 4mA,
and the MOUT current-mirror output accuracy is ±10%
from 500nA to 1mA of APD current and ±3.5% from
1mA to 4mA of APD current.
Clamping the Monitor
Output Voltage (CLAMP)
CLAMP provides a means for diode clamping the volt-
age at MOUT; thus, VMOUT is limited to (VCLAMP +
0.6V). CLAMP can be connected to either an external
supply or BIAS. CLAMP can be left unconnected if volt-
age clamping is not required.
Adjusting the Boost Converter
Output Voltage (FB/CNTRL)
The boost converter output voltage can be set by con-
necting FB to a resistor-divider from VOUT to ground.
The set-point feedback reference is the 1.245 (typ)
internal reference voltage when VCNTRL > 1.5V and is
equal to the CNTRL voltage when VCNTRL < 1.25V.
To change the converter output on the fly, apply a volt-
age lower than 1.25V (typ) to the CNTRL input and
adjust the CNTRL voltage, which is the reference input
of the error amplifier when VCNTRL < 1.25V (see the
Functional Diagram
). This feature can be used to adjust
the APD voltage based on the APD mirror current,
which compensates for the APD avalanche gain varia-
tion with temperature and manufacturing process. As
shown in Figure 4, the voltage signal proportional to the
MOUT current is connected to the analog-to-digital
(ADC) input of the APD module, which then controls the
reference voltage of the boost converter error amplifier
through a digital-to-analog (DAC) block connected to
the CNTRL input. The BIAS voltage and, therefore, the
APD current, are controlled based on the MOUT mirror
current, forming a negative feedback loop.
Shutdown (
SHDN
)
The MAX15061 features an active-low shutdown input
(SHDN). Pull SHDN low to enter shutdown. During shut-
down, the supply current drops to 2μA (30μA from
BIAS) (max). However, the output remains connected to
the input through the inductor and the output diode,
holding the output voltage to one diode drop below
PWR when the MAX15061 shuts down. Connect SHDN
to IN for always-on operation.
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
______________________________________________________________________________________ 11
[MAXIM [VI/JXIIIII
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
12 ______________________________________________________________________________________
Design Procedure
Setting the Output Voltage
Set the MAX15061 output voltage by connecting a resis-
tive divider from the output to FB to SGND (Figure 1).
Select R1(FB to SGND resistor) between 200kΩand
400kΩ. Calculate R2(VOUT to FB resistor) using the fol-
lowing equation:
where VOUT can range from (VIN + 1V) to 76V and VREF
= 1.245V or VCNTRL depending on the VCNTRL value.
For VCNTRL > 1.5V, the internal 1.245V (typ) reference
voltage is used as the feedback set point (VREF =
1.245V) and for VCNTRL < 1.25V, VREF = VCNTRL.
Determining Peak Inductor Current
If the boost converter remains in the discontinuous
mode of operation, then the approximate peak inductor
current, ILPEAK (in amperes), is represented by the for-
mula below:
where TSis the switching period in microseconds,
VOUT is the output voltage in volts, VIN_MIN is the mini-
mum input voltage in volts, IOUT_MAX is the maximum
output current in amperes, L is the inductor value in
microhenrys, and ηis the efficiency of the boost con-
verter (see the
Typical Operating Characteristics
).
Determining the Inductor Value
Three key inductor parameters must be specified for
operation with the MAX15061: inductance value (L),
inductor saturation current (ISAT), and DC resistance
(DCR). In general, the inductor should have a saturation
current rating greater than the maximum switch peak
current-limit value (ILIM-LX = 1.6A). Choose an inductor
with a low-DCR resistance for reasonable efficiency.
Use the following formula to calculate the lower bound
of the inductor value at different output voltages and
output currents. This is the minimum inductance value
for discontinuous mode operation for supplying full
300mW of output power.
where VIN_MIN, VOUT (both in volts), and IOUT (in
amperes) are typical values (so that efficiency is opti-
mum for typical conditions), TS(in microseconds) is the
period, ηis the efficiency, and ILIM_LX is the peak
switch current in amperes (see the
Electrical
Characteristics
table).
Calculate the optimum value of L (LOPTIMUM) to ensure
the full output power without reaching the boundary
between continuous conduction mode (CCM) and DCM
using the following formula:
For a design in which VIN = 3.3V, VOUT = 70V, IOUT=
3mA, η= 45%, ILIM-LX = 1.3A, and TS= 2.5μs: LMIN =
1.3μH and LMAX = 23μH.
For a worse-case scenario in which VIN = 2.9V, VOUT =
70V, IOUT= 4mA, η= 43%, ILIM-LX= 1.3A, and TS=
2.5μs: LMIN = 1.8μH and LMAX = 15μH.
The choice of 4.7μH is reasonable given the worst-case
scenario above. In general, the higher the inductance,
the lower the switching noise. Load regulation is also
better with higher inductance.
where L [ H]
V(VV)T
2
MAX IN_MIN
2OUT IN_MIN S
μη
=××
−
×××IV
OUT OUT
2
L[H]
L
OPTIMUM MAX
μμ
=[]
.
H
225
L[H]
2T I (V V )
I
MIN S OUT OUT IN_MIN
LIM-LX
2
μη
=×× ×
×
−
I2T (V V )I
L
LPEAK S OUT IN_MIN OUT_MAX
=×× ×
×
−
η
RRV
V1
21OUT
REF
=⎛
⎝
⎜
⎞
⎠
⎟
⎡
⎣
⎢⎤
⎦
⎥
−
MAX15061
FB
VOUT
R2
R1
Figure 1. Adjustable Output Voltage
‘LPEAK OPT‘M ‘LPEAK OPflMuM VOUT OUT [VI/JXIIIII
MAX15061
Diode Selection
The MAX15061’s high switching frequency demands a
high-speed rectifier. Schottky diodes are recommend-
ed for most applications because of their fast recovery
time and low forward-voltage drop. Ensure that the
diode’s peak current rating is greater than the peak
inductor current. Also the diode reverse-breakdown
voltage must be greater than VOUT, the output voltage
of the boost converter.
Output Filter Capacitor Selection
For most applications, use a small output capacitor of
0.1μF or greater. To achieve low output ripple, a capaci-
tor with low ESR, low ESL, and high capacitance value
should be selected. If tantalum or electrolytic capacitors
are used to achieve high capacitance values, always
add a smaller ceramic capacitor in parallel to bypass
the high-frequency components of the diode current.
The higher ESR and ESL of electrolytic capacitors
increase the output ripple and peak-to-peak transient
voltage. Assuming the contribution from the ESR and
capacitor discharge equals 50% (proportions may vary),
calculate the output capacitance and ESR required for a
specified ripple using the following equations:
For very low output ripple applications, the output of the
boost converter can be followed by an RC filter to further
reduce the ripple. Figure 2 shows a 100Ω(RF), 0.1μF
(CF) filter used to reduce the switching output ripple to
1mVP-P with a 0.1mA load or 2mVP-P with a 4mA load.
The output-voltage regulation resistor-divider must remain
connected to the diode and output capacitor node.
Use X7R ceramic capacitors for more stability over the full
temperature range. Use an X5R capacitor for -40°C to
+85°C applications.
Input Capacitor Selection
Bypass PWR to PGND with a 1μF (min) ceramic capaci-
tor and bypass IN to PGND with a 1μF (min) ceramic
capacitor. Depending on the supply source imped-
ance, higher values may be needed. Make sure that the
input capacitors are close enough to the IC to provide
adequate decoupling at IN and PWR as well. If the lay-
out cannot achieve this, add another 0.1μF ceramic
capacitor between IN and PGND (or PWR and PGND)
in the immediate vicinity of the IC. Bulk aluminum elec-
trolytic capacitors may be needed to avoid chattering
at low input voltage. In case of aluminum electrolytic
capacitors, calculate the capacitor value and ESR of
the input capacitor using the following equations:
CVxI
xV x0.5x
IN OUT OUT
IN_MIN IN
[]μη
FV
=ΔTT IxL xV
V(VV
SLPEAK OPTIMUM OUT
IN_MIN OUT I
−−NN_MIN
IN IN_M
)
VxV
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥
[]
=ESR m 0.5 x
ΩΔxηIIN
OUT
VxI
OUT
CI
0.5 x TIxL
OUT OUT
OUT SLPEAK OPTIM
[]μFV
=−
Δ
UUM
OUT IN_MIN
(V V )−
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥
[]
=ESR m 0.5 x
I
OUT
ΩΔV
OOUT
MAX15061
PWR
CNTRL
SHDN
PGND
CP
CCP
COUT1
CF
0.1μF
CPWR
CN
LX
FB
D1
BIAS
SGND
IN
VIN = 2.7V TO 5.5V VOUT
L1
CIN
R2
R1
RF
100Ω
Figure 2. Typical Operating Circuit with RC Filter
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
______________________________________________________________________________________ 13
[VI/JXIIIII
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
14 ______________________________________________________________________________________
Determining Monitor Current Limit
Calculate the value of the monitor current-limit resistor,
RLIM, for a given APD current limit, ILIMIT, using the fol-
lowing equation:
The RLIM resistor, RLIM, ranges from 12.45kΩto 2.5Ω
for APD currents from 1mA to 5mA.
Applications Information
Using APD or PIN Photodiodes
in Fiber Applications
When using the MAX15061 to monitor APD or PIN pho-
todiode currents in fiber applications, several issues
must be addressed. In applications where the photodi-
ode must be fully depleted, keep track of voltages bud-
geted for each component with respect to the available
supply voltage(s). The current monitors require as
much as 1.1V between BIAS and APD, which must be
considered part of the overall voltage budget.
Additional voltage margin can be created if a negative
supply is used in place of a ground connection, as long
as the overall voltage drop experienced by the
MAX15061 is less than or equal to 76V. For this type of
application, the MAX15061 is suggested so the output
can be referenced to “true” ground and not the negative
supply. The MAX15061’s output current can be refer-
enced as desired with either a resistor to ground or a
transimpedance amplifier. Take care to ensure that out-
put voltage excursions do not interfere with the required
margin between BIAS and MOUT. In many fiber applica-
tions, MOUT is connected directly to an ADC that oper-
ates from a supply voltage that is less than the voltage
at BIAS. Connecting the MAX15061’s clamping diode
output, CLAMP, to the ADC power supply helps avoid
damage to the ADC. Without this protection, voltages
can develop at MOUT that might destroy the ADC. This
protection is less critical when MOUT is connected
directly to subsequent transimpedance amplifiers (linear
or logarithmic) that have low-impedance, near-ground-
referenced inputs. If a transimpedance amplfier is used
on the low side of the photodiode, its voltage drop must
also be considered. Leakage from the clamping diode
is most often insignificant over nominal operating condi-
tions, but grows with temperature.
To maintain low levels of wideband noise, lowpass filter-
ing the output signal is suggested in applications where
only DC measurements are required. Connect the filter
capacitor at MOUT. Determining the required filtering
components is straightforward, as the MAX15061
exhibits a very high output impedance of 890MΩ.
In some applications where pilot tones are used to identi-
fy specific fiber channels, higher bandwidths are desired
at MOUT to detect these tones. Consider the minimum
and maximum currents to be detected, then consult the
frequency response and noise typical operating curves.
If the minimum current is too small, insufficient bandwidth
could result, while too high a current could result in
excessive noise across the desired bandwidth.
Layout Considerations
Careful PCB layout is critical to achieve low switching
losses and clean and stable operation. Protect sensitive
analog grounds by using a star ground configuration.
Connect SGND and PGND together close to the device
at the return terminal of the output bypass capacitor.
Do not connect them together anywhere else. Keep all
PCB traces as short as possible to reduce stray capaci-
tance, trace resistance, and radiated noise. Ensure that
the feedback connection to FB is short and direct.
Route high-speed switching nodes away from the sen-
sitive analog areas. Use an internal PCB layer for SGND
as an EMI shield to keep radiated noise away from the
device, feedback dividers, and analog bypass capaci-
tors. Refer to the MAX15061 evaluation kit data sheet
for a layout example.
R10
1.245V
I (mA)
LIM LIMIT
=×
PW [VI/JXIIIII
MAX15061
MAX15061
CNTRL
CP
CN
IN
PGND
FB
BIAS
SHDN
MOUTAPDSGNDRLIM
PWR LX
GPIO
ILIM GPIO
CLAMP VDD μC
VDD
APD
CIN
1μF
CCP
10nF
RMOUT
10kΩ
COUT
0.1μF
CMOUT
(OPTIONAL)
R1
6.34kΩ
RLIM
2.87kΩ
R2
348kΩ
VIN
CPWR
1μF
L1
4.7μHD1
VOUT (70V MAX)
DAC
ADC
RF
100Ω
RADJ
CF
0.1μF
Figure 3. Typical Operating Circuit for V
IN
= 2.7V to 5.5V
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
______________________________________________________________________________________ 15
MAXIM i a: E:G e to www‘maxim-icfiomlgackages 21-0139
MAX15061
80V, 300mW Boost Converter and Current
Monitor for APD Bias Applications
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
MAX15061
CNTRL
CP
CN
IN
PGND
FB
BIAS
SHDN
MOUTAPDSGNDRLIM
PWR LX
GPIO
ILIM GPIO
CLAMP VDD μC
VDD
APD
CIN
1μF
RMOUT
10kΩ
COUT
0.1μF
CMOUT
(OPTIONAL)
R1
634kΩ
RLIM
2.87kΩ
R2
348kΩ
VIN = 5.5V TO 11V
CPWR
1μF
L1
4.7μHD1
VOUT (70V MAX)
DAC
ADC
RF
100Ω
CF
0.1μF
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
16 TQFN T1644-4 21-0139
Chip Information
PROCESS: BiCMOS
Figure 4. Typical Operating Circuit for V
IN
= 5.5V to 11V