Datenblatt für TPS727xx von Texas Instruments

V'.‘ ‘F. B X E I TEXAS INSTRUMENTS
GROUNDPINCURRENTvsTEMPERATURE
-40 -25 -10 520 35 50 65 80 95 110 125
Temperature( )C
°
15
12
9
6
3
0
I ( A)m
GND
V =2.1V
I =0mA
IN
OUT
PSRRvsFREQUENCY
100
90
80
70
60
50
40
30
20
10
0
Power-SupplyRejectionRatio(dB)
10 100 1k 10k 100k 1M 10M
Frequency(Hz)
I =10mA
OUT
I =200mA
OUT
TYPICALAPPLICATIONCIRCUIT
TPS727xx
GND
EN
IN OUT
VIN VOUT
1 F
Ceramic
m
On
Off
CIN COUT
Product
Folder
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TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
TPS727 250-mA, Ultralow I
Q
, Fast Transient Response,
RF Low-Dropout Linear Regulator
1 Features 3 Description
The TPS727 family of low-dropout (LDO) linear
1 Very Low Dropout: regulators are ultralow quiescent current LDOs with
65 mV Typical at 100 mA excellent line and ultra-fast load transient
130 mV Typical at 200 mA performance and are designed for power-sensitive
applications. The LDO output voltage level is preset
163 mV Typical at 250 mA by the use of innovative factory EEPROM
2% Accuracy Over Load, Line, Temperature programming. A precision band-gap and error
Ultralow IQ: 7.9 μAamplifier provides overall 2% accuracy over load, line,
and temperature extremes. The TPS727 family is
Excellent Load Transient Performance:±50 mV for available in 1.5-mm × 1.5-mm SON and wafer chip-
200 mA Loading and Unloading Transient scale (WCSP) packages that make the devices ideal
Available in Fixed-Output Voltages From 0.9 V to for handheld applications. This family of devices is
5 V Using Innovative Factory EEPROM fully specified over a temperature range of TJ=
Programming –40°C to +125°C.
High PSRR: 70 dB at 1 kHz
Stable with a 1.0-μF Ceramic Capacitor Device Information
Thermal Shutdown and Overcurrent Protection PART NUMBER PACKAGE BODY SIZE (NOM)
Available in 4-Ball, 0.4-mm Pitch Wafer-Level TPS727xxDSE WSON (6) 1.50 mm × 1.50 mm
Chip Scale and 1.5-mm × 1.5-mm SON Packages TPS727xxYFF DSBGA (4) 1.20 mm × 0.80 mm
(1) For all available packages, see the orderable addendum at
2 Applications the end of the datasheet.
Wireless Handsets, Smart Phones, PDAs
MP3 Players and Other Handheld Products
Wireless LAN, Bluetooth®, Zigbee®
Remote Controls
Portable Consumer Products
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
Table of Contents
7.4 Device Functional Modes........................................ 12
1 Features.................................................................. 18 Applications and Implementation ...................... 13
2 Applications ........................................................... 18.1 Application Information............................................ 13
3 Description ............................................................. 18.2 Typical Application .................................................. 13
4 Revision History..................................................... 28.3 Do's and Don'ts....................................................... 17
5 Pin Configurations and Functions....................... 49 Power-Supply Recommendations...................... 17
6 Specifications......................................................... 510 Layout................................................................... 17
6.1 Absolute Maximum Ratings ...................................... 510.1 Layout Guidelines ................................................. 17
6.2 ESD Ratings.............................................................. 510.2 Layout Example .................................................... 18
6.3 Recommended Operating Conditions....................... 511 Device and Documentation Support ................. 22
6.4 Thermal Information.................................................. 511.1 Documentation Support ........................................ 22
6.5 Electrical Characteristics........................................... 611.2 Community Resources.......................................... 22
6.6 Typical Characteristics.............................................. 711.3 Trademarks........................................................... 22
7 Detailed Description............................................ 11 11.4 Electrostatic Discharge Caution............................ 22
7.1 Overview ................................................................. 11 11.5 Glossary................................................................ 22
7.2 Functional Block Diagram....................................... 11 12 Mechanical, Packaging, and Orderable
7.3 Feature Description................................................. 11 Information ........................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (September 2014) to Revision F Page
Changed DSBGA body size in Device Information table ...................................................................................................... 1
Changes from Revision D (February 2014) to Revision E Page
Added TPS727105 to document ............................................................................................................................................ 1
Changed terminal to pin throughout document ...................................................................................................................... 1
Updated Device Information table to current standards......................................................................................................... 1
Changed Pin Configurations note .......................................................................................................................................... 4
Changed Pin Functions table: reordered table by pin name, added I/O column ................................................................... 4
Updated Handling Ratings table to current standard ............................................................................................................. 5
Changed Thermal Information table: updated symbols.......................................................................................................... 5
Deleted new generation from first sentence of Overview section ........................................................................................ 11
Added note to Applications and Implementation section...................................................................................................... 13
Changes from Revision C (January, 2011) to Revision D Page
Changed format to meet latest data sheet standards; added new sections and moved existing sections............................ 1
Deleted pinout diagrams from front page; see Pin Configurations and Functions section. ................................................... 1
Changed Pin Configurations section and moved to Pin Configurations and Functions section ............................................ 4
Changed note in Pin Configurations and Functions section. ................................................................................................. 4
Deleted Figure 26 and Figure 27.......................................................................................................................................... 17
Changes from Revision B (April, 2010) to Revision C Page
Updated YFF front page pin drawing to show pin locations................................................................................................... 1
Revised Pin Configurations section ....................................................................................................................................... 4
Changed graph title for Figure 6............................................................................................................................................. 7
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TPS727
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SBVS128F –JUNE 2009REVISED DECEMBER 2015
Changes from Revision A (September, 2009) to Revision B Page
Updated Features list ............................................................................................................................................................. 1
Changed title of data sheet..................................................................................................................................................... 1
Changed footnote 2 to Absolute Maximum Ratings table...................................................................................................... 5
Revised numerous specifications and parameters in Electrical Characteristics table ........................................................... 6
Revised operating parameters for Figure 4............................................................................................................................ 7
Replaced Figure 5 .................................................................................................................................................................. 7
Added operating parameters to Figure 6................................................................................................................................ 7
Updated Figure 9.................................................................................................................................................................... 7
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See Note
TPS72715YFF, TPS72718YFF
TPS72728YFF, TPS72748YFF
TPS727xxDSE
Top Dot
Mark
Tape and Reel
Sprocket Holes
TPS72711YFF
(Example)
See Note
Top Dot
Mark
Tape and Reel
Sprocket Holes
IN
NC
EN
6
5
4
OUT
NC
GND
1
2
3
OUT
B2
A2
B1
A1
IN EN
GND
OUT
B2
A2
B1
A1
IN EN
GND
TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
5 Pin Configurations and Functions
TPS72715, TPS72718, TPS72728, TPS72748 All Other TPS727 Devices
YFF Package YFF Package
DSBGA-4 DSBGA-4
Top View Top View
See note. See note.
DSE Package
1,5mm × 1,5mm WSON-6
Top View
NOTE
The EN pin is marked with a dot for the 1.5-V, 1.8-V, 2.8-V, and 4.8-V versions of the YFF
package. The GND pin is marked with a dot for all other voltage versions of the YFF
package. Refer to YFF0004 Package Outline page included at the end of this document
for dimensions of the YFF package. On the package outline, the shaded box indicates the
location of ball A1 and does not correlate to any marking on the topside of the physical
package.
Pin Functions
PIN I/O
NAME YFF DSE DESCRIPTION
Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown
EN A1 4 I mode, thus reducing the operating current to 120 nA, nominal.
GND B1 3 Ground pin.
Input pin. A small capacitor is needed from this pin to ground to assure stability. See Input and Output Capacitor
IN A2 6 I Requirements in the Application Information section for more details.
NC 2, 5 No connection. This pin can be tied to ground to improve thermal dissipation.
Regulated output voltage pin. A small 1-μF ceramic capacitor is needed from this pin to ground to assure stability.
OUT B2 1 O See Input and Output Capacitor Requirements in the Application Information section for more details.
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SBVS128F –JUNE 2009REVISED DECEMBER 2015
6 Specifications
6.1 Absolute Maximum Ratings
at TJ= –40°C to +125°C (unless otherwise noted); all voltages are with respect to GND(1)
MIN MAX UNIT
Input voltage range, VIN –0.3 +6.0 V
Enable voltage range, VEN –0.3 +6.0(2) V
Output voltage range, VOUT –0.3 +6.0 V
Maximum output current, IOUT Internally limited
Output short-circuit duration Indefinite
Operating junction temperature, TJ–55 +150 °C
Storage temperature, Tstg –55 +150 °C
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) VEN absolute maximum rating is VIN or 6.0 V, whichever is less.
6.2 ESD Ratings
VALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000
V(ESD) Electrostatic discharge V
Charged device model (CDM), per JEDEC specification JESD22-C101, ±500
all pins(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN Input voltage 2 5.5 V
IOUT Output current 0 250 mA
TJOperating junction temperature range –40 +125 °C
6.4 Thermal Information
TPS727
THERMAL METRIC(1) DSE (WSON) YFF (DSBGA) UNITS
6 PINS 4 PINS
RθJA Junction-to-ambient thermal resistance 190.5 160 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 94.9 75 °C/W
RθJB Junction-to-board thermal resistance 149.3 76 °C/W
ψJT Junction-to-top characterization parameter 6.4 3 °C/W
ψJB Junction-to-board characterization parameter 152.8 74 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance(2) N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) θJCbot is not applicable because there is no thermal pad.
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TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
6.5 Electrical Characteristics
Over operating temperature range (TJ= –40°C to +125°C), VIN = VOUT(TYP) + 0.3 V or 2.0 V, whichever is greater;
IOUT = 10 mA, VEN = 0.9 V, and COUT = 1.0 μF (unless otherwise noted). Typical values are at TJ= +25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage range 2.0 5.5 V
VOOutput voltage range 0.9 5.0 V
TJ= +25°C –2.5 +2.5 mV
VOUT + 0.3 V VIN 5.5 V, –2.0% ±1.0% +2.0%
VOUT (1) DC output accuracy 0 mA IOUT 200 mA
VOUT + 0.3 V VIN 5.5 V, ±1.0%
0 mA IOUT 250 mA
1 mA to 200 mA or ±50.0
200 mA to 1 mA in 1 μs, COUT = 1 μF
ΔVOUT Load transient mV
1 mA to 250 mA or ±65
250 mA to 1 mA in 1 μs, COUT = 1 μF
VOUT(NOM) + 0.3 V VIN 5.5 V,
ΔVO/ΔVIN Line regulation 8 μV/V
IOUT = 10 mA
ΔVO/ΔIOUT Load regulation 0 mA IOUT 250 mA 20 μV/mA
VIN = 0.98 × VOUT(NOM), IOUT = 10 mA 6.5
VIN = 0.98 × VOUT(NOM), IOUT = 50 mA 32.5
VDO Dropout voltage(2) VIN = 0.98 × VOUT(NOM), IOUT = 100 mA 65 mV
VIN = 0.98 × VOUT(NOM), IOUT = 200 mA 130 200
VIN = 0.98 × VOUT(NOM), IOUT = 250 mA 162.5
ICL Output current limit VOUT = 0.9 × VOUT(NOM) 300 400 550 mA
IOUT = 0 mA, TJ= –40°C to +125°C 7.9 12
IGND Ground pin current IOUT = 200 mA 110 µA
IOUT = 250 mA 130
VEN 0.4 V, VIN = 2 V, TJ= +25°C 0.12
ISHDN Shutdown current (IGND) µA
VEN 0.4 V, 2.0 V < VIN 4.5 V, 0.55 2
TJ= –40°C to +85°C
f = 10 Hz 85
f = 100 Hz 75
VIN = 2.3 V, f = 1 kHz 70
PSRR Power-supply rejection ratio VOUT = 1.8 V, dB
f = 10 kHz 55
IOUT = 10 mA f = 100 kHz 40
f = 1 MHz 45
BW = 100 Hz to 100 kHz, VIN = 2.1 V,
VNOutput noise voltage 33.5 μVRMS
VOUT = 1.8 V, IOUT = 10 mA
tSTR Startup time(3) COUT = 1.0 μF, 0 IOUT 250 mA 100 μs
VHI Enable pin high (enabled) 0.9 VIN V
VLO Enable pin low (disabled) 0 0.4 V
IEN Enable pin current EN = 5.5 V 40 500 nA
UVLO Undervoltage lock-out VIN rising 1.85 1.90 1.95 V
Shutdown, temperature increasing +160
TSD Thermal shutdown temperature °C
Reset, temperature decreasing +140
TJOperating junction temperature –40 +125 °C
(1) The output voltage is programmed at the factory.
(2) VDO is measured for devices with VOUT(NOM) 2.35 V so that VIN 2.3 V.
(3) Startup time: time from EN assertion to 0.98 × VOUT(NOM).
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l TEXAS INSTRUMENTS 190 190 190 190 160 ‘cw
+125 C°
+25 C°
+85 C°
-40 C°
160
140
120
100
80
60
40
20
0
V (mV)
DO
2.25 2.75 3.25 3.75 4.25 4.75
V (V)
IN
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
+125 C°
+25 C°
+85 C°
-40 C°
V (V)
OUT
0 1 2 3 4 5 678 9 10
I (mA)
OUT
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
+125 C°
+25 C°
+85 C°
-40 C°
V (V)
OUT
0 25 50 75 100 125 150 175 200 225 250
I (mA)
OUT
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
V (V)
OUT
2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6
V (V)
IN
+125 C°
+25 C°
+85 C°
-40 C°
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
V (V)
OUT
2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6
V (V)
IN
+125 C°
+25 C°
+85 C°
-40 C°
TPS727
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SBVS128F –JUNE 2009REVISED DECEMBER 2015
6.6 Typical Characteristics
Over operating temperature range (TJ= –40°C to +125°C), VIN = VOUT(TYP) + 0.3 V or 2.0 V, whichever is greater; IOUT =
10 mA, VEN = VIN, and COUT = 1.0 μF (unless otherwise noted). Typical values are at TJ= +25°C.
IOUT = 10 mA IOUT = 200 mA
Figure 1. Line Regulation Figure 2. Line Regulation
(TPS72718) (TPS72718)
0 mA IOUT 250 mA
0 mA IOUT 10 mA
Figure 4. Load Regulation
Figure 3. Load Regulation Under Light Loads (TPS72718)
(TPS72718)
IOUT = 200 mA
Figure 6. Dropout Voltage vs Input Voltage
Figure 5. Dropout Voltage vs Output Current (TPS72750)
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l TEXAS INSTRUMENTS 190 Temperature we» W 140 25 \W Temperature cc)
2.0
1.6
1.2
0.8
0.4
0
I ( A)m
GND
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
V (V)
IN
+125 C°
+25 C°
+85 C°
-40 C°
550
500
450
400
350
I (mA)
LIM
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
V (V)
IN
140
120
100
80
60
40
20
0
I ( A)m
GND
0 25 50 75 100 125 150 175 250200 225
I (mA)
OUT
+125 C
+85 C
+25 C
40 C-
°
°
°
°
-40 -25 -10 520 35 50 65 80 95 110 125
Temperature ( )C
°
15
12
9
6
3
0
I ( A)m
GND
12.0
11.5
11.0
10.5
10.0
9.5
9.0
8.5
8.0
7.5
7.0
I ( A)m
GND
2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6
V (V)
IN
+125 C°
+25 C°
+85 C°
-40 C°
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
V (V)
OUT
-40 -25 -10 520 35 50 65 80 95 110 125
Temperature ( )C
°
I = 10 mA
OUT
I = 200 mA
OUT
TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to +125°C), VIN = VOUT(TYP) + 0.3 V or 2.0 V, whichever is greater; IOUT =
10 mA, VEN = VIN, and COUT = 1.0 μF (unless otherwise noted). Typical values are at TJ= +25°C.
IOUT = 0 mA
Figure 7. Output Voltage vs Temperature Figure 8. Ground Pin Current vs Input Voltage
(TPS72718) (TPS72718)
VIN = 2.1 V, IOUT = 0 mA
0 mA IOUT 250 mA
Figure 10. Ground Pin Current vs Temperature
Figure 9. Ground Pin Current vs Load (TPS72718)
(TPS72718)
Figure 11. Shutdown Current vs Input Voltage Figure 12. Current Limit vs Input Voltage
(TPS72718) (TPS72718)
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l TEXAS INSTRUMENTS mo Frequency Hz) 100 Frequency Hz) VHH Frequency (Hz) u u
50 mV/div
100 mA/div
200 mA
0.1 mA
100 s/divm
IOUT
VOUT
50 mV/div
100 mA/div
200 mA
1 mA
50 s/divm
IOUT
VOUT
80
70
60
50
40
30
20
10
0
Power-Supply Rejection Ratio (dB)
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8
V (V)
IN
10 kHz
1 kHz
100 kHz
10.00
1.00
0.10
0.01
0
Noise Spectral Density ( V/ )mHz
Ö
10 100 1k 10k 100k 1M 10M
Frequency (Hz)
100
90
80
70
60
50
40
30
20
10
0
Power-Supply Rejection Ratio (dB)
10 100 1k 10k 100k 1M 10M
Frequency (Hz)
I = 10 mA
OUT
I = 200 mA
OUT
100
90
80
70
60
50
40
30
20
10
0
Power-Supply Rejection Ratio (dB)
10 100 1k 10k 100k 1M 10M
Frequency (Hz)
I = 10 mA
OUT
I = 200 mA
OUT
TPS727
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SBVS128F –JUNE 2009REVISED DECEMBER 2015
Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to +125°C), VIN = VOUT(TYP) + 0.3 V or 2.0 V, whichever is greater; IOUT =
10 mA, VEN = VIN, and COUT = 1.0 μF (unless otherwise noted). Typical values are at TJ= +25°C.
Figure 13. PSRR vs Frequency Figure 14. PSRR vs Frequency
(VIN – VOUT = 0.5 V, TPS72718) (VIN – VOUT = 0.3 V, TPS72718)
IOUT = 10 mA, CIN = COUT = 1 µF
Figure 15. PSRR vs Input Voltage Figure 16. Output Spectral Noise Density vs Output Voltage
(TPS72718)
(TPS72718)
VIN = 2.3 V, tR= tF= 1 µs VIN = 2.3 V, tR= tF= 1 µs
Figure 17. Load Transient Response: 0.1 mA to 200 mA Figure 18. Load Transient Response: 1 mA to 200 mA
(TPS72718)
(TPS72718)
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1 V/div
1 V/div
100 mA/div
20 s/divm
EN
VOUT
IIN
1 V/div
200 ms/div
VOUT
VIN
5 mV/div
0.5 V/div
VOUT
VIN
100 s/divm
2.7 V
2.1 V
1 V/div
1 V/div
50 mA/div
20 s/divm
EN
VOUT
IIN
50 mV/div
100 mA/div
50 s/divm
200 mA
10 mA
VOUT
IOUT
2 mV/div
0.5 V/div
VOUT
VIN
1 ms/div
2.7 V
2.1 V
TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to +125°C), VIN = VOUT(TYP) + 0.3 V or 2.0 V, whichever is greater; IOUT =
10 mA, VEN = VIN, and COUT = 1.0 μF (unless otherwise noted). Typical values are at TJ= +25°C.
Slew rate = 1 V/µs, IOUT = 100 µA
VIN = 2.3 V, tR= tF= 1 µs
Figure 20. Line Transient Response
Figure 19. Load Transient Response: 10 mA to 200 mA (TPS72718)
(TPS72718)
Slew rate = 1 V/µs, IOUT = 200 µA VIN = 2.1 V, VOUT = 1.8 V, IOUT = 100 µA
Figure 21. Line Transient Response Figure 22. VIN Inrush Current
(TPS72718) (TPS72718)
IOUT = 200 mA
VIN = 2.1 V, VOUT = 1.8 V, IOUT = 200 mA
Figure 24. VIN Ramp Up, Ramp Down Response
Figure 23. VIN Inrush Current (TPS72718)
(TPS72718)
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l TEXAS INSTRUMENTS I SOFT SYART ILL L Com
I (mA)=C ( F) 0.07(V/ s)+I (mA)m m LOAD
SOFTSTART OUT ´
Thermal
Shutdown
Current
Limit
UVLO
Bandgap
IN
EN
OUT
EEPROM
LOGIC
TPS727
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SBVS128F –JUNE 2009REVISED DECEMBER 2015
7 Detailed Description
7.1 Overview
The TPS727 devices belong to a family of LDO regulators that consume extremely low quiescent current while
simultaneously delivering excellent PSRR with very little headroom (VIN – VOUT differential voltage), and very
good transient response. These features, combined with low noise without a noise reduction pin in an ultrasmall
package, make these devices ideal for portable applications. This family of regulators offers sub-band-gap output
voltages, current limit and thermal protection, and is fully specified from –40°C to +125°C.
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 Internal Current Limit
The TPS727 internal current limit helps protect the regulator during fault conditions. During current limit, the
output sources a fixed amount of current that is largely independent of output voltage. In such a case, the output
voltage is not regulated and is VOUT = ILIMIT × RLOAD. The PMOS pass transistor dissipates (VIN – VOUT) × ILIMIT
until thermal shutdown is triggered and the device is turned off. As the device cools down, it is turned on by the
internal thermal shutdown circuit. If the fault condition continues, the device cycles between current limit and
thermal shutdown. See the Thermal Protection section for more details.
The PMOS pass element in the TPS727 has a built-in body diode that conducts current when the voltage at the
OUT pin exceeds the voltage at the IN pin. This current is not limited, so if extended reverse voltage operation is
anticipated, external limiting to 5% of rated output current is recommended.
7.3.2 Soft Start
The startup current is given by Equation 1:
(1)
Equation 1 shows that soft-start current is directly proportional to COUT.
The output voltage ramp rate is independent of COUT and load current, and has a typical value of 0.07 V/μs.
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TPS727
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Feature Description (continued)
The TPS727 automatically adjusts the soft-start current to supply both the load current and the COUT charge
current. For example, if ILOAD = 0 mA upon enabling the LDO, ISOFT START = 1 μF × 0.07 V/μs+0mA=70mA,
the current that charges the output capacitor.
If ILOAD = 200 mA, ISOFT START = 1 μF × 0.07 V/μs + 200 mA = 270 mA, the current required for charging output
capacitor and supplying the load current.
If the output capacitor and load are increased such that the soft-start current exceeds the output current limit, the
current is clamped at the typical current limit of 400 mA. For example, if COUT = 10 μF and IOUT = 200 mA, 10 μF
× 0.07 V/μs + 200 mA = 900 mA is not supplied. Instead, the current is clamped at 400 mA.
7.3.3 Shutdown
The enable pin (EN) is active high and is compatible with standard and low voltage, TTL-CMOS levels. When
shutdown capability is not required, EN can be connected to the IN pin.
7.3.4 Dropout Voltage
The TPS727 uses a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the dropout
voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output resistance is the
RDS(ON) of the PMOS pass element. VDO approximately scales with output current because the PMOS device
functions like a resistor in dropout.
As with any linear regulator, PSRR and transient response are degraded as (VIN – VOUT) approaches dropout.
This effect is illustrated in Figure 15 in the Typical Characteristics section.
7.3.5 Undervoltage Lock-out (UVLO)
The TPS727 uses an undervoltage lock-out circuit that keeps the output shut off until the input voltage reaches
the UVLO threshold voltage.
7.3.6 Thermal Protection
Thermal protection disables the output when the junction temperature rises to approximately +160°C, allowing
the device to cool. When the junction temperature cools to approximately +140°C the output circuitry is again
enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection
circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a
result of overheating.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, limit junction temperature to +125°C maximum. To estimate the margin of safety
in a complete design (including heatsink), increase the ambient temperature until the thermal protection is
triggered; use worst-case loads and signal conditions. For good reliability, thermal protection triggers at least
+35°C above the maximum expected ambient condition of a particular application. This configuration produces a
worst-case junction temperature of +125°C at the highest expected ambient temperature and worst-case load.
The internal protection circuitry of the TPS727 is designed to protect against overload conditions. This circuitry is
not intended to replace proper heatsinking. Continuously running the TPS727 into thermal shutdown degrades
device reliability.
7.4 Device Functional Modes
7.4.1 Operation with EN Control
Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown mode,
thus reducing the operating current to 120 nA, nominal.
12 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated
l TEXAS INSTRUMENTS M A m J3 V‘N e——l‘ TFS727 VFF ‘ a 2.8 7 5.5V K 7 M \N m3: 52 1 j VOUT @ ZBBWA C‘ 5‘ GND EN A‘ c2 mu; I mur J4 J2 ON T ‘ :l ‘ I 2 D T 7 :L T OFF ’ ’ & ASSY U1 VOUT 7881 TPS72715YFF W‘SV —0@2 TPS72718YFF 18V 7003 TPS72728YFF 2 8V
TPS727
www.ti.com
SBVS128F –JUNE 2009REVISED DECEMBER 2015
8 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS727 family of low-dropout (LDO) linear regulators are utralow quiescent current LDOs with excellent line
and ultra-fast load transient performance and are designed for power-sensitive applications.
8.2 Typical Application
Figure 25. TPS72718YFF 2.5 VIN to 1.8 VOUT at 200 mA Schematic
8.2.1 Design Requirements
8.2.1.1 Input and Output Capacitor Requirements
Although an input capacitor is not required for stability, good analog design practice is to connect a 0.1-μF to
1.0-μF low equivalent series resistance (ESR) capacitor across the IN pin and GND input of the regulator. This
capacitor counteracts reactive input sources and improves transient response, noise rejection, and ripple
rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated, or if
the device is not located close to the power source. If source impedance is not sufficiently low, a 0.1-μF input
capacitor may be necessary to ensure stability.
The TPS727 is designed to be stable with standard ceramic capacitors with values of 1.0 μF or larger at the
output. X5R- and X7R-type capacitors are best because they have minimal variation in value and ESR over
temperature. Maximum ESR must be less than 200 m.
8.2.1.2 Transient Response
As with any regulator, increasing the size of the output capacitor reduces over- and undershoot magnitude but
increases duration of the transient response.
Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 13
l TEXAS INSTRUMENTS IsoFT mm Com )
I (mA)=C ( F) 0.07(V/ s)+I (mA)m m LOAD
SOFTSTART OUT ´
TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
Typical Application (continued)
8.2.2 Detailed Design Procedure
Select the desired device based on the output voltage.
Provide an input supply with adequate headroom to include dropout and output current to account for the GND
pin current and to power the load.
Select adequate input and output capacitors.
The startup current is given by Equation 2:
(2)
Equation 2 shows that soft-start current is directly proportional to COUT.
The output voltage ramp rate is independent of COUT and load current and has a typical value of 0.07 V/μs.
The TPS727 automatically adjusts the soft-start current to supply both the load current and the COUT charge
current. For example, if ILOAD = 0 mA upon enabling the LDO, ISOFT START = 1 μF × 0.07 V/μs+0mA=70mA,
the current that charges the output capacitor.
If ILOAD = 200 mA, ISOFT START = 1 μF × 0.07 V/μs + 200 mA = 270 mA, the current required for charging output
capacitor and supplying the load current.
If the output capacitor and load are increased such that the soft-start current exceeds the output current limit, the
current is clamped at the typical current limit of 400 mA. For example, if COUT = 10 μF and IOUT = 200 mA, 10 μF
× 0.07 V/μs + 200 mA = 900 mA is not supplied. Instead, the current is clamped at 400 mA.
14 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated
l TEXAS INSTRUMENTS mo Frequency Hz) Frequency (Hz)
50 mV/div
100 mA/div
50 s/divm
200 mA
10 mA
VOUT
IOUT
2 mV/div
0.5 V/div
VOUT
VIN
1 ms/div
2.7 V
2.1 V
50 mV/div
100 mA/div
200 mA
0.1 mA
100 s/divm
IOUT
VOUT
50 mV/div
100 mA/div
200 mA
1 mA
50 s/divm
IOUT
VOUT
100
90
80
70
60
50
40
30
20
10
0
Power-Supply Rejection Ratio (dB)
10 100 1k 10k 100k 1M 10M
Frequency (Hz)
I = 10 mA
OUT
I = 200 mA
OUT
10.00
1.00
0.10
0.01
0
Noise Spectral Density ( V/ )mHz
Ö
10 100 1k 10k 100k 1M 10M
Frequency (Hz)
TPS727
www.ti.com
SBVS128F –JUNE 2009REVISED DECEMBER 2015
Typical Application (continued)
8.2.3 Application Curves
IOUT = 10 mA, CIN = COUT = 1 µF
Figure 26. PSRR vs Frequency Figure 27. Output Spectral Noise Density vs Output
Voltage (TPS72718)
(VIN – VOUT = 0.5 V, TPS72718)
VIN = 2.3 V, tR= tF= 1 µs VIN = 2.3 V, tR= tF= 1 µs
Figure 28. Load Transient Response: 0.1 mA to 200 mA Figure 29. Load Transient Response: 1 mA to 200 mA
(TPS72718)
(TPS72718)
Slew rate = 1 V/µs, IOUT = 100 µA
VIN = 2.3 V, tR= tF= 1 µs
Figure 31. Line Transient Response (TPS72718)
Figure 30. Load Transient Response: 10 mA to 200 mA
(TPS72718)
Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 15
‘5‘ TEXAS INSTRUMENTS
1 V/div
1 V/div
100 mA/div
20 s/divm
EN
VOUT
IIN
1 V/div
200 ms/div
VOUT
VIN
5 mV/div
0.5 V/div
VOUT
VIN
100 s/divm
2.7 V
2.1 V
1 V/div
1 V/div
50 mA/div
20 s/divm
EN
VOUT
IIN
TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
Typical Application (continued)
Slew rate = 1 V/µs, IOUT = 200 µA VIN = 2.1 V, VOUT = 1.8 V, IOUT = 100 µA
Figure 32. Line Transient Response (TPS72718) Figure 33. VIN Inrush Current (TPS72718)
IOUT = 200 mA
VIN = 2.1 V, VOUT = 1.8 V, IOUT = 200 mA
Figure 35. VIN Ramp Up, Ramp Down Response
Figure 34. VIN Inrush Current (TPS72718) (TPS72718)
16 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated
l TEXAS INSTRUMENTS PD VW 7 VOUY X IDUT
P =(V V ) I-
D IN OUT OUT
´
TPS727
www.ti.com
SBVS128F –JUNE 2009REVISED DECEMBER 2015
8.3 Do's and Don'ts
Do place at least one 1.0-µF ceramic capacitor as close as possible to the OUT pin of the regulator.
Do not place the output capacitor more than 10 mm away from the regulator.
For DSE devices, do tie the NC pins to ground to improve thermal dissipation.
Do connect a 0.1-μF to 1.0-μF low equivalent series resistance (ESR) capacitor across the IN pin and GND input
of the regulator.
Do not exceed the absolute maximum ratings.
9 Power-Supply Recommendations
These devices are designed to operate from an input voltage supply range between 2.0 V and 5.5 V. The input
voltage range provides adequate headroom in order for the device to have a regulated output. This input supply
must be well regulated. If the input supply is noisy, additional input capacitors with low ESR can help improve the
output noise performance.
10 Layout
10.1 Layout Guidelines
10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
To improve ac performance (such as PSRR, output noise, and transient response), TI recommends that the
board be designed with separate ground planes for VIN and VOUT, with the ground plane connected only at the
GND pin of the device. In addition, the ground connection for the output capacitor must be connected directly to
the GND pin of the device. High ESR capacitors may degrade PSRR.
10.1.2 Power Dissipation
The ability to remove heat from the die is different for each package type, presenting different considerations in
the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves
the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the
Thermal Information table. Using heavier copper increases the effectiveness in removing heat from the device.
The addition of plated through-holes to heat-dissipating layers also improves the heatsink effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of
the output current times the voltage drop across the output pass element (VIN to VOUT), as shown in Equation 3:
(3)
10.1.3 Package Mounting
Solder pad footprint recommendations and recommended land patterns are attached to the end of this
document.
Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 17
‘5‘ TEXAS INSTRUMENTS 0Q DO o 0-. O on: 0 on. a .00 no .
TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
10.2 Layout Example
10.2.1 DSE EVM Board Layout
This section provides the TPS727xxDSEEVM-406 board layout and illustrations.
Figure 36. Top Layer Assembly
Figure 37. Top Layer Routing
18 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated
‘5‘ TEXAS INSTRUMENTS on CO CD Q0 OOD sou no OD Q0 OOD
TPS727
www.ti.com
SBVS128F –JUNE 2009REVISED DECEMBER 2015
Layout Example (continued)
Figure 38. Bottom Layer Routing
Figure 39. Bottom Layer Assembly
Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 19
I TEXAS INSTRUMENTS
TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
Layout Example (continued)
10.2.2 YFF EVM Board Layout
This section provides the TPS727xxYFFEVM-407 board layout and illustrations.
Figure 40. Top Layer Assembly
Figure 41. Top Layer Routing
20 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated
TPS727
www.ti.com
SBVS128F –JUNE 2009REVISED DECEMBER 2015
Layout Example (continued)
Figure 42. Bottom Layer Routing
Figure 43. Bottom Layer Assembly
Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 21
l TEXAS INSTRUMENTS
TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
Application report SLAA414,LDO PSRR Measurement Simplified.
Application report SLAA412,LDO Noise Demystified.
User guide SLVU323,TPS727xxYFF EVM
User guide SLVU325,TPS727xxDSE EVM
11.1.2 Device Nomenclature
Table 1. Device Nomenclature(1)
PRODUCT VOUT (2)
TPS727xxx yyy z XXX is the nominal output voltage.
YYY is package designator.
Zis package tape and reel quantity (R = 3000, T = 250).
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
(2) Output voltages from 0.9 V to 5.0 V in 50-mV increments are available through the use of innovative factory EEPROM programming;
minimum order quantities may apply. Contact factory for details and availability.
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
Bluetooth is a registered trademark of Bluetooth SIG.
Zigbee is a registered trademark of Zigbee Alliance.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.5 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
22 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated
l TEXAS INSTRUMENTS MECHANICAL DATA DSE (S—PDSO—N6) PLAS'HC SMALL OUTLINE g 1:32 Wi” W / % PM 1 \NDLX ARtA 'oo o 5) \1 o ”-207810/A 03/08 NOIES A‘ New dmensmns are m mflhmeters. Th9 arm/mg \s subjem to mange whom notme Srr‘aH Mme M Lead (50V) pamge conngummn Ws pcckoge is \eucifree
TPS727
www.ti.com
SBVS128F –JUNE 2009REVISED DECEMBER 2015
Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 23
l TEXAS INSTRUMENTS LAND PATTERN DATA DSE (S—PWSON—NB) PLASTTC SMALL OUTLTNE NO—LEAD Em” 5"“ my” aiE§§ITfTessi§eniTrEie§lfllss (Note E) r—T 4x050 ‘<——1»4x0. .50="" ’luudt="" 'ludu="" 1.85="" 0,45="" ,jflflflfim="" 4|="" l7="" 6x013="" \\="" \="" non="" solder="" musk="" defined="" pad="" ‘\="" n°"="" 5“”="" mm="" dem”="" p“="" example="" \="" »="" —————="" \..="" solder="" mask="" opening="" example="" \="" (note="" e)="" solder="" mask="" opening="" \/="" (note="" e)="" 0'7:="" l="" \="" ‘i="" \lpad="" geometry="" 2="" (note="" c)="" '”t\._="" .0="" 8="" pad="" geometry="" '="" (note="" c)="" 0="" 05—=""> \ All around \ \ 0.05—— \ All around > \\___/ ‘\._. 4214628/A tit/l2 NOTES: A, ATI Il'rlear dimensions are Tn mTTlimeters. This drawing is subject to change without notice Publication ch—issi is recommended lor alternate designs Laser cutting apertures with trapezoidal walls and also rounding corners wilT offer better paste release. Customers should contact their board assembly site tor stencil design recommendations, Refer to WC 7525 iar stencil design considerations. Eb Customers should contact their board lubrication site tor solder mask tolerances. POW
TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
24 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated
l TEXAS INSTRUMENTS
PACKAGE OUTLINE
C
0.625 MAX
0.30
0.12
0.4
TYP
0.4 TYP
4X 0.3
0.2
B E A
D
02/2014
D: Max = 0.82 mm, Min = 0.76 mm
DSBGA - 0.625 mm max height
YFF0004
DIE SIZE BALL GRID ARRAY
E: Max = 1.19 mm, Min = 1.13 mm
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. NanoFree package configuration.
TM
NanoFree Is a trademark of Texas Instruments.
TPS727xxYFF
BALL A1
CORNER
SEATING PLANE
BALL TYP
B
A
12
0.015 C A B
SYMM
SYMM
SCALE 13.000
TPS727
www.ti.com
SBVS128F –JUNE 2009REVISED DECEMBER 2015
Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 25
‘5‘ TEXAS INSTRUMENTS
EXAMPLE BOARD LAYOUT
0.23 0.02
(0.4) TYP
(0.4) TYP
()
METAL
0.23 0.05 MAX
SOLDER MASK
OPENING
METAL
UNDER
MASK
()
SOLDER MASK
OPENING
0.23
0.05 MIN
02/2014
DSBGA - 0.625 mm max height
YFF0004
DIE SIZE BALL GRID ARRAY
NOTES: (continued)
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
Refer to Texas Instruments Literature No. SBVA017 (www.ti.com/lit/sbva017).
SOLDER MASK DETAILS
NOT TO SCALE
SYMM
TPS727xxYFF
SYMM
LAND PATTERN EXAMPLE
SCALE:50X
12
A
B
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
4
TPS727
SBVS128F –JUNE 2009REVISED DECEMBER 2015
www.ti.com
26 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated
l TEXAS INSTRUMENTS
TYP
(0.4) TYP
4X ( 0.25) (R ) TYP0.05
METAL
TYP
02/2014
DSBGA - 0.625 mm max height
YFF0004
DIE SIZE BALL GRID ARRAY
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
TPS727xxYFF
SYMM
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:50X
12
A
B
EXAMPLE STENCIL DESIGN
(0.4)
TPS727
www.ti.com
SBVS128F –JUNE 2009REVISED DECEMBER 2015
Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 27
I TEXAS INSTRUMENTS Samples Samples Samples Samples Samples Samples Samples Samples Samples Sample: Sample: Samples Samples Samples Samples Samples Samples Samples Samples Samples
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS727105YFFR ACTIVE DSBGA YFF 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 GA
TPS727105YFFT ACTIVE DSBGA YFF 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 GA
TPS72710DSER ACTIVE WSON DSE 6 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 UR
TPS72710DSET ACTIVE WSON DSE 6 250 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 UR
TPS72711YFFR ACTIVE DSBGA YFF 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 QL
TPS72711YFFT ACTIVE DSBGA YFF 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 QL
TPS72715DSER ACTIVE WSON DSE 6 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 GS
TPS72715DSET ACTIVE WSON DSE 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 GS
TPS72715YFFR ACTIVE DSBGA YFF 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 GS
TPS72715YFFT ACTIVE DSBGA YFF 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 GS
TPS727185YFFR ACTIVE DSBGA YFF 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 RW
TPS727185YFFT ACTIVE DSBGA YFF 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 RW
TPS72718DSER ACTIVE WSON DSE 6 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 GT
TPS72718DSET ACTIVE WSON DSE 6 250 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 GT
TPS72718YFFR ACTIVE DSBGA YFF 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 GT
TPS72718YFFT ACTIVE DSBGA YFF 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 GT
TPS72719DSER ACTIVE WSON DSE 6 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 CB
TPS72719DSET ACTIVE WSON DSE 6 250 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 CB
TPS72719YFFR ACTIVE DSBGA YFF 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 AA
TPS72719YFFT ACTIVE DSBGA YFF 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 AA
I TEXAS INSTRUMENTS Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Sample: Sample: Samples Samples Samples Samples Samples Samples Samples Samples Samples
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS72725DSER ACTIVE WSON DSE 6 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 QA
TPS72725DSET ACTIVE WSON DSE 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 QA
TPS72727DSER ACTIVE WSON DSE 6 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 TS
TPS72727DSET ACTIVE WSON DSE 6 250 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 TS
TPS727285DSER ACTIVE WSON DSE 6 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 QK
TPS727285DSET ACTIVE WSON DSE 6 250 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 QK
TPS72728DSER ACTIVE WSON DSE 6 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 GU
TPS72728DSET ACTIVE WSON DSE 6 250 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 GU
TPS72728YFFR ACTIVE DSBGA YFF 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 GU
TPS72728YFFT ACTIVE DSBGA YFF 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 GU
TPS72730DSER ACTIVE WSON DSE 6 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 QB
TPS72730DSET ACTIVE WSON DSE 6 250 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 QB
TPS72730YFFR ACTIVE DSBGA YFF 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 ZZ
TPS72730YFFT ACTIVE DSBGA YFF 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 ZZ
TPS72733DSER ACTIVE WSON DSE 6 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 QC
TPS72733DSET ACTIVE WSON DSE 6 250 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 QC
TPS72733YFFR ACTIVE DSBGA YFF 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 ZY
TPS72733YFFT ACTIVE DSBGA YFF 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 ZY
TPS72748DSER ACTIVE WSON DSE 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 KA
TPS72748YFFR ACTIVE DSBGA YFF 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 EY
TPS72748YFFT ACTIVE DSBGA YFF 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 EY
I TEXAS INSTRUMENTS Sample: Sample:
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 3
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS72750YFFR ACTIVE DSBGA YFF 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 CA
TPS72750YFFT ACTIVE DSBGA YFF 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 CA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
I TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS Reel Dlameter Cavtty AD Dimension destgned to accommodate the component wmth Eu Dimension destgned to accommodate the componenl Iength K0 Dtmenston destgned to accommodate the component thickness 7 w Ovevau with at the earner tape i Pt PIlCh between successtve cavtty cemers i T ReelWidIh(W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE C) O O O C) O O O ispmckeIHuIes —> User Dtrecllnn OI Feed \I/ Pockel Quadrams
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS727105YFFR DSBGA YFF 4 3000 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS727105YFFT DSBGA YFF 4 250 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS72710DSER WSON DSE 6 3000 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72710DSER WSON DSE 6 3000 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72710DSET WSON DSE 6 250 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72710DSET WSON DSE 6 250 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72711YFFR DSBGA YFF 4 3000 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS72711YFFT DSBGA YFF 4 250 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS72715DSER WSON DSE 6 3000 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72715DSET WSON DSE 6 250 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72715YFFR DSBGA YFF 4 3000 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q2
TPS72715YFFT DSBGA YFF 4 250 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q2
TPS727185YFFR DSBGA YFF 4 3000 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS727185YFFT DSBGA YFF 4 250 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS72718DSER WSON DSE 6 3000 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72718DSET WSON DSE 6 250 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72718YFFR DSBGA YFF 4 3000 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q2
TPS72718YFFT DSBGA YFF 4 250 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2021
Pack Materials-Page 1
I TEXAS INSTRUMENTS
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS72719DSER WSON DSE 6 3000 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72719DSER WSON DSE 6 3000 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72719DSET WSON DSE 6 250 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72719DSET WSON DSE 6 250 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72719YFFR DSBGA YFF 4 3000 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS72719YFFT DSBGA YFF 4 250 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS72725DSER WSON DSE 6 3000 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72725DSET WSON DSE 6 250 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72727DSER WSON DSE 6 3000 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72727DSER WSON DSE 6 3000 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72727DSET WSON DSE 6 250 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72727DSET WSON DSE 6 250 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS727285DSER WSON DSE 6 3000 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS727285DSER WSON DSE 6 3000 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS727285DSET WSON DSE 6 250 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS727285DSET WSON DSE 6 250 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72728DSER WSON DSE 6 3000 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72728DSER WSON DSE 6 3000 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72728DSET WSON DSE 6 250 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2
TPS72728DSET WSON DSE 6 250 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72728YFFR DSBGA YFF 4 3000 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q2
TPS72728YFFT DSBGA YFF 4 250 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q2
TPS72730DSER WSON DSE 6 3000 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72730DSET WSON DSE 6 250 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72730YFFR DSBGA YFF 4 3000 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS72730YFFT DSBGA YFF 4 250 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS72733DSER WSON DSE 6 3000 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72733DSET WSON DSE 6 250 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72733YFFR DSBGA YFF 4 3000 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS72733YFFT DSBGA YFF 4 250 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS72748DSER WSON DSE 6 3000 178.0 8.4 1.7 1.7 0.95 4.0 8.0 Q2
TPS72748YFFR DSBGA YFF 4 3000 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q2
TPS72748YFFT DSBGA YFF 4 250 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q2
TPS72750YFFR DSBGA YFF 4 3000 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
TPS72750YFFT DSBGA YFF 4 250 180.0 8.4 0.89 1.26 0.69 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2021
Pack Materials-Page 2
I TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS727105YFFR DSBGA YFF 4 3000 182.0 182.0 20.0
TPS727105YFFT DSBGA YFF 4 250 182.0 182.0 20.0
TPS72710DSER WSON DSE 6 3000 200.0 183.0 25.0
TPS72710DSER WSON DSE 6 3000 205.0 200.0 33.0
TPS72710DSET WSON DSE 6 250 200.0 183.0 25.0
TPS72710DSET WSON DSE 6 250 205.0 200.0 33.0
TPS72711YFFR DSBGA YFF 4 3000 182.0 182.0 20.0
TPS72711YFFT DSBGA YFF 4 250 182.0 182.0 20.0
TPS72715DSER WSON DSE 6 3000 200.0 183.0 25.0
TPS72715DSET WSON DSE 6 250 200.0 183.0 25.0
TPS72715YFFR DSBGA YFF 4 3000 182.0 182.0 20.0
TPS72715YFFT DSBGA YFF 4 250 182.0 182.0 20.0
TPS727185YFFR DSBGA YFF 4 3000 182.0 182.0 20.0
TPS727185YFFT DSBGA YFF 4 250 182.0 182.0 20.0
TPS72718DSER WSON DSE 6 3000 205.0 200.0 33.0
TPS72718DSET WSON DSE 6 250 205.0 200.0 33.0
TPS72718YFFR DSBGA YFF 4 3000 182.0 182.0 20.0
TPS72718YFFT DSBGA YFF 4 250 182.0 182.0 20.0
TPS72719DSER WSON DSE 6 3000 205.0 200.0 33.0
TPS72719DSER WSON DSE 6 3000 200.0 183.0 25.0
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2021
Pack Materials-Page 3
I TEXAS INSTRUMENTS
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS72719DSET WSON DSE 6 250 200.0 183.0 25.0
TPS72719DSET WSON DSE 6 250 205.0 200.0 33.0
TPS72719YFFR DSBGA YFF 4 3000 182.0 182.0 20.0
TPS72719YFFT DSBGA YFF 4 250 182.0 182.0 20.0
TPS72725DSER WSON DSE 6 3000 200.0 183.0 25.0
TPS72725DSET WSON DSE 6 250 200.0 183.0 25.0
TPS72727DSER WSON DSE 6 3000 205.0 200.0 33.0
TPS72727DSER WSON DSE 6 3000 200.0 183.0 25.0
TPS72727DSET WSON DSE 6 250 205.0 200.0 33.0
TPS72727DSET WSON DSE 6 250 200.0 183.0 25.0
TPS727285DSER WSON DSE 6 3000 200.0 183.0 25.0
TPS727285DSER WSON DSE 6 3000 205.0 200.0 33.0
TPS727285DSET WSON DSE 6 250 205.0 200.0 33.0
TPS727285DSET WSON DSE 6 250 200.0 183.0 25.0
TPS72728DSER WSON DSE 6 3000 205.0 200.0 33.0
TPS72728DSER WSON DSE 6 3000 200.0 183.0 25.0
TPS72728DSET WSON DSE 6 250 200.0 183.0 25.0
TPS72728DSET WSON DSE 6 250 205.0 200.0 33.0
TPS72728YFFR DSBGA YFF 4 3000 182.0 182.0 20.0
TPS72728YFFT DSBGA YFF 4 250 182.0 182.0 20.0
TPS72730DSER WSON DSE 6 3000 205.0 200.0 33.0
TPS72730DSET WSON DSE 6 250 205.0 200.0 33.0
TPS72730YFFR DSBGA YFF 4 3000 182.0 182.0 20.0
TPS72730YFFT DSBGA YFF 4 250 182.0 182.0 20.0
TPS72733DSER WSON DSE 6 3000 205.0 200.0 33.0
TPS72733DSET WSON DSE 6 250 205.0 200.0 33.0
TPS72733YFFR DSBGA YFF 4 3000 182.0 182.0 20.0
TPS72733YFFT DSBGA YFF 4 250 182.0 182.0 20.0
TPS72748DSER WSON DSE 6 3000 205.0 200.0 33.0
TPS72748YFFR DSBGA YFF 4 3000 182.0 182.0 20.0
TPS72748YFFT DSBGA YFF 4 250 182.0 182.0 20.0
TPS72750YFFR DSBGA YFF 4 3000 182.0 182.0 20.0
TPS72750YFFT DSBGA YFF 4 250 182.0 182.0 20.0
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2021
Pack Materials-Page 4
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