Datenblatt für TMUX1104 von Texas Instruments

Datenblatt - Kommentare/Fehler melden

V'.‘ 1!. B I TEXAS INSTRUMENTS

TMUX1104

A0A1EN

1-of-4

Decoder

A0 A1

GND

VDD

1.8V Logic

Signals

Analog Inputs

LED

Photo

Detector

Bridge Sensor

Thermocouple

Current Sensing

Optical Sensor

Op Amp

Precision

ADC

Op Amp

REF

VREF

TMUX1104

Product

Folder

Order

Now

Technical

Documents

Tools &

Software

Support &

Community

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

TMUX1104 5-V, Low-Leakage-Current, 4:1 Precision Multiplexer

1 Features

1• Wide supply range: 1.08 V to 5.5 V

• Low leakage current: 3 pA

• Low charge injection: 1.5 pC

• Low on-resistance: 2 Ω

• -40°C to +125°C Operating temperature

•1.8 V Logic Compatible

•Fail-Safe Logic

•Rail to Rail Operation

•Bidirectional Signal Path

• Break-before-make switching

• ESD protection HBM: 2000 V

2 Applications

• Ultrasound scanners

• Patient monitoring & diagnostics

• Blood glucose monitors

• Optical networking

• Optical test equipment

• Remote radio units

• Wired networking

• Data acquisition systems

• ATE test equipment

• Factory automation and industrial controls

• Programmable logic controllers (PLC)

• Analog input modules

• SONAR receivers

• Battery monitoring systems

3 Description

The TMUX1104 is a precision complementary metal-

oxide semiconductor (CMOS) multiplexer (MUX). The

TMUX1104 offers a single channel, 4:1 configuration.

Wide operating supply of 1.08 V to 5.5 V allows for

use in a broad array of applications from medical

equipment to industrial systems. The device supports

bidirectional analog and digital signals on the source

(Sx) and drain (D) pins ranging from GND to VDD. All

logic inputs have 1.8 V logic compatible thresholds,

ensuring both TTL and CMOS logic compatibility

when operating in the valid supply voltage range.

Fail-Safe Logic circuitry allows voltages on the control

pins to be applied before the supply pin, protecting

the device from potential damage.

The TMUX1104 is part of the precision switches and

multiplexers family of devices. These devices have

very low on and off leakage currents and low charge

injection, allowing them to be used in high precision

measurement applications. A low supply current of 5

nA and small package options enable use in portable

applications.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

TMUX1104 VSSOP (10) (DGS) 3.00 mm × 3.00 mm

USON (10) (DQA) 2.50 mm x 1.00 mm

(1) For all available packages, see the package option addendum

at the end of the data sheet.

Simplified Schematic Block Diagram

l TEXAS INSTRUMENTS

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

6.5 Electrical Characteristics (VDD = 5 V ±10 %)............ 5

6.6 Electrical Characteristics (VDD = 3.3 V ±10 %)......... 7

6.7 Electrical Characteristics (VDD = 1.8 V ±10 %)......... 9

6.8 Electrical Characteristics (VDD = 1.2 V ±10 %)....... 11

6.9 Typical Characteristics............................................ 13

7 Parameter Measurement Information ................ 16

7.1 On-Resistance ........................................................ 16

7.2 Off-Leakage Current ............................................... 16

7.3 On-Leakage Current ............................................... 17

7.4 Transition Time ....................................................... 17

7.5 Break-Before-Make................................................. 18

7.6 tON(EN) and tOFF(EN).................................................. 18

7.7 Charge Injection...................................................... 19

7.8 Off Isolation............................................................. 19

7.9 Crosstalk ................................................................. 20

7.10 Bandwidth ............................................................. 20

8 Detailed Description............................................ 21

8.1 Functional Block Diagram....................................... 21

8.2 Feature Description................................................. 21

8.3 Device Functional Modes........................................ 23

8.4 Truth Tables............................................................ 23

9 Application and Implementation ........................ 24

9.1 Application Information............................................ 24

9.2 Typical Application ................................................. 24

9.3 Design Requirements.............................................. 24

9.4 Detailed Design Procedure..................................... 25

9.5 Application Curve.................................................... 25

10 Power Supply Recommendations ..................... 25

11 Layout................................................................... 26

11.1 Layout Guidelines ................................................. 26

11.2 Layout Example .................................................... 26

12 Device and Documentation Support ................. 27

12.1 Documentation Support ........................................ 27

12.2 Receiving Notification of Documentation Updates 27

12.3 Community Resources.......................................... 27

12.4 Trademarks........................................................... 27

12.5 Electrostatic Discharge Caution............................ 27

12.6 Glossary................................................................ 27

13 Mechanical, Packaging, and Orderable

Information ........................................................... 27

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision A (December 2018) to Revision B Page

• Deleted the Product Preview note from the DQA package in the Device Information table.................................................. 1

• Deleted the Product Preview note from the DQA package in the Pin Configuration and Functions section......................... 3

• Added DQA (USON) thermal values to Thermal Information ................................................................................................ 4

Changes from Original (November 2018) to Revision A Page

• Changed the document status From: Advanced Information To: Production Mix data.......................................................... 1

l TEXAS INSTRUMENTS

1A0 10 A1

2S1 9 S2

3GND 8 D

4S3 7 S4

5EN 6 VDD

Not to scale

1A0 10 A1

2S1 9 S2

3GND 8 D

4S3 7 S4

5EN 6 VDD

Not to scale

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

5 Pin Configuration and Functions

DGS Package

10-Pin VSSOP

Top View

DQA Package

10-Pin USON

Top View

(1) I = input, O = output, I/O = input and output, P = power

Pin Functions

PIN TYPE(1) DESCRIPTION

NAME DGS, DQA

A0 1 I Address line 0. Controls the switch configuration as shown in Table 1.

S1 2 I/O Source pin 1. Can be an input or output.

GND 3 P Ground (0 V) reference

S3 4 I/O Source pin 3. Can be an input or output.

EN 5 I Active high logic enable. When this pin is low, all switches are turned off. When this pin is high, the

A[1:0] logic inputs determine which switch is turned on.

VDD 6 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation,

connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND.

S4 7 I/O Source pin 4. Can be an input or output.

D 8 I/O Drain pin. Can be an input or output.

S2 9 I/O Source pin 2. Can be an input or output.

A1 10 I Address line 1. Controls the switch configuration as shown in Table 1.

l TEXAS INSTRUMENTS

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.

(3) All voltages are with respect to ground, unless otherwise specified.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1) (2) (3)

MIN MAX UNIT

VDD Supply voltage –0.5 6 V

VSEL or VEN Logic control input pin voltage (EN, A0, A1) –0.5 6 V

ISEL or IEN Logic control input pin current (EN, A0, A1) –30 30 mA

VSor VDSource or drain voltage (Sx, D) –0.5 VDD+0.5 V

ISor ID (CONT) Source or drain continuous current (Sx, D) –30 30 mA

Tstg Storage temperature –65 150 °C

TJJunction temperature 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE UNIT

V(ESD) Electrostatic discharge

Human body model (HBM), per

ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000

Charged device model (CDM), per JEDEC

specification JESD22-C101, all pins(2) ±750

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN NOM MAX UNIT

VDD Positive power supply voltage 1.08 5.5 V

VSor VDSignal path input/output voltage (source or drain pin) (Sx, D) 0 VDD V

VSEL or

VEN Logic control input pin voltage 0 5.5 V

TAAmbient temperature –40 125 °C

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.4 Thermal Information

THERMAL METRIC(1)

TMUX1104

UNITDGS (VSSOP) DQA (USON)

10 PINS 10 PINS

RθJA Junction-to-ambient thermal resistance 193.9 173.0 °C/W

RθJC(top) Junction-to-case (top) thermal resistance 83.1 99.7 °C/W

RθJB Junction-to-board thermal resistance 116.5 73.5 °C/W

ΨJT Junction-to-top characterization parameter 22.0 8.9 °C/W

ΨJB Junction-to-board characterization parameter 114.6 73.0 °C/W

RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W

l TEXAS INSTRUMENTS

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

(1) When VSis 4.5 V, VDis 1.5 V, and vice versa.

6.5 Electrical Characteristics (VDD = 5 V ±10 %)

at TA= 25°C, VDD = 5 V (unless otherwise noted)

PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT

ANALOG SWITCH

RON On-resistance VS= 0 V to VDD

ISD = 10 mA

Refer to On-Resistance

25°C 2 4 Ω

–40°C to +85°C 4.5 Ω

–40°C to +125°C 4.9 Ω

ΔRON On-resistance matching between

channels

VS= 0 V to VDD

ISD = 10 mA

Refer to On-Resistance

25°C 0.13 Ω

–40°C to +85°C 0.4 Ω

–40°C to +125°C 0.5 Ω

RON

FLAT On-resistance flatness VS= 0 V to VDD

ISD = 10 mA

Refer to On-Resistance

25°C 0.85 Ω

–40°C to +85°C 1.6 Ω

–40°C to +125°C 1.6 Ω

IS(OFF) Source off leakage current(1)

VDD = 5 V

Switch Off

VD= 4.5 V / 1.5 V

VS= 1.5 V / 4.5 V

Refer to Off-Leakage Current

25°C –0.08 ±0.005 0.08 nA

–40°C to +85°C –0.3 0.3 nA

–40°C to +125°C –0.9 0.9 nA

ID(OFF) Drain off leakage current(1)

VDD = 5 V

Switch Off

VD= 4.5 V / 1.5 V

VS= 1.5 V / 4.5 V

Refer to Off-Leakage Current

25°C –0.1 ±0.01 0.1 nA

–40°C to +85°C –0.75 0.75 nA

–40°C to +125°C –3.5 3.5 nA

ID(ON)

IS(ON) Channel on leakage current

VDD = 5 V

Switch On

VD= VS= 2.5 V

Refer to On-Leakage Current

25°C –0.025 ±0.003 0.025 nA

–40°C to +85°C –0.3 0.3 nA

–40°C to +125°C –0.95 0.95 nA

ID(ON)

IS(ON) Channel on leakage current

VDD = 5 V

Switch On

VD= VS= 4.5 V / 1.5 V

Refer to On-Leakage Current

25°C –0.1 ±0.01 0.1 nA

–40°C to +85°C –0.75 0.75 nA

–40°C to +125°C –3.5 3.5 nA

LOGIC INPUTS (EN, A0, A1)

VIH Input logic high –40°C to +125°C 1.49 5.5 V

VIL Input logic low –40°C to +125°C 0 0.87 V

IIH

IIL Input leakage current 25°C ±0.005 µA

IIH

IIL Input leakage current –40°C to +125°C ±0.05 µA

CIN Logic input capacitance 25°C 1 pF

CIN Logic input capacitance –40°C to +125°C 2 pF

POWER SUPPLY

IDD VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.005 µA

–40°C to +125°C 1 µA

l TEXAS INSTRUMENTS

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

Electrical Characteristics (VDD = 5 V ±10 %) (continued)

at TA= 25°C, VDD = 5 V (unless otherwise noted)

PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT

DYNAMIC CHARACTERISTICS

tTRAN Transition time between channels VS= 3 V

RL= 200 Ω, CL= 15 pF

Refer to Transition Time

25°C 14 ns

–40°C to +85°C 18 ns

–40°C to +125°C 19 ns

tOPEN

(BBM) Break before make time VS= 3 V

RL= 200 Ω, CL= 15 pF

Refer to Break-Before-Make

25°C 8 ns

–40°C to +85°C 1 ns

–40°C to +125°C 1 ns

tON(EN) Enable turn-on time VS= 3 V

RL= 200 Ω, CL= 15 pF

Refer to tON(EN) and tOFF(EN)

25°C 12 ns

–40°C to +85°C 17 ns

–40°C to +125°C 18 ns

tOFF(EN) Enable turn-off time VS= 3 V

RL= 200 Ω, CL= 15 pF

Refer to tON(EN) and tOFF(EN)

25°C 5 ns

–40°C to +85°C 8 ns

–40°C to +125°C 9 ns

QCCharge Injection VS= 1 V

RS= 0 Ω, CL= 1 nF

Refer to Charge Injection 25°C 1.5 pC

OISO Off Isolation

RL= 50 Ω, CL= 5 pF

f = 1 MHz

Refer to Off Isolation 25°C –65 dB

RL= 50 Ω, CL= 5 pF

f = 10 MHz

Refer to Off Isolation 25°C –45 dB

XTALK Crosstalk

RL= 50 Ω, CL= 5 pF

f = 1 MHz

Refer to Crosstalk 25°C –65 dB

RL= 50 Ω, CL= 5 pF

f = 10 MHz

Refer to Crosstalk 25°C –45 dB

BW Bandwidth RL= 50 Ω, CL= 5 pF

Refer to Bandwidth 25°C 155 MHz

CSOFF Source off capacitance f = 1 MHz 25°C 6 pF

CDOFF Drain off capacitance f = 1 MHz 25°C 28 pF

CSON

CDON On capacitance f = 1 MHz 25°C 35 pF

l TEXAS INSTRUMENTS

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

(1) When VSis 3 V, VDis 1 V, and vice versa.

6.6 Electrical Characteristics (VDD = 3.3 V ±10 %)

at TA= 25°C, VDD = 3.3 V (unless otherwise noted)

PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT

ANALOG SWITCH

RON On-resistance VS= 0 V to VDD

ISD = 10 mA

Refer to On-Resistance

25°C 3.7 8.8 Ω

–40°C to +85°C 9.5 Ω

–40°C to +125°C 9.8 Ω

ΔRON On-resistance matching between

channels

VS= 0 V to VDD

ISD = 10 mA

Refer to On-Resistance

25°C 0.13 Ω

–40°C to +85°C 0.4 Ω

–40°C to +125°C 0.5 Ω

RON

FLAT On-resistance flatness VS= 0 V to VDD

ISD = 10 mA

Refer to On-Resistance

25°C 1.9 Ω

–40°C to +85°C 2 Ω

–40°C to +125°C 2.2 Ω

IS(OFF) Source off leakage current(1)

VDD = 3.3 V

Switch Off

VD= 3 V / 1 V

VS= 1 V / 3 V

Refer to Off-Leakage Current

25°C –0.05 ±0.001 0.05 nA

–40°C to +85°C –0.1 0.1 nA

–40°C to +125°C –0.5 0.5 nA

ID(OFF) Drain off leakage current(1)

VDD = 3.3 V

Switch Off

VD= 3 V / 1 V

VS= 1 V / 3 V

Refer to Off-Leakage Current

25°C –0.1 ±0.005 0.1 nA

–40°C to +85°C –0.5 0.5 nA

–40°C to +125°C –2 2 nA

ID(ON)

IS(ON) Channel on leakage current

VDD = 3.3 V

Switch On

VD= VS= 3 V / 1 V

Refer to On-Leakage Current

25°C –0.1 ±0.005 0.1 nA

–40°C to +85°C –0.5 0.5 nA

–40°C to +125°C –2 2 nA

LOGIC INPUTS (EN, A0, A1)

VIH Input logic high –40°C to +125°C 1.35 5.5 V

VIL Input logic low –40°C to +125°C 0 0.8 V

IIH

IIL Input leakage current 25°C ±0.005 µA

IIH

IIL Input leakage current –40°C to +125°C ±0.05 µA

CIN Logic input capacitance 25°C 1 pF

CIN Logic input capacitance –40°C to +125°C 2 pF

POWER SUPPLY

IDD VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.005 µA

–40°C to +125°C 1 µA

l TEXAS INSTRUMENTS

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

Electrical Characteristics (VDD = 3.3 V ±10 %) (continued)

at TA= 25°C, VDD = 3.3 V (unless otherwise noted)

PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT

DYNAMIC CHARACTERISTICS

tTRAN Transition time between channels VS= 2 V

RL= 200 Ω, CL= 15 pF

Refer to Transition Time

25°C 15 ns

–40°C to +85°C 21 ns

–40°C to +125°C 22 ns

tOPEN

(BBM) Break before make time VS= 2 V

RL= 200 Ω, CL= 15 pF

Refer to Break-Before-Make

25°C 9 ns

–40°C to +85°C 1 ns

–40°C to +125°C 1 ns

tON(EN) Enable turn-on time VS= 2 V

RL= 200 Ω, CL= 15 pF

Refer to tON(EN) and tOFF(EN)

25°C 14 ns

–40°C to +85°C 21 ns

–40°C to +125°C 21 ns

tOFF(EN) Enable turn-off time VS= 2 V

RL= 200 Ω, CL= 15 pF

Refer to tON(EN) and tOFF(EN)

25°C 7 ns

–40°C to +85°C 9 ns

–40°C to +125°C 10 ns

QCCharge Injection VS= 1 V

RS= 0 Ω, CL= 1 nF

Refer to Charge Injection 25°C –1.5 pC

OISO Off Isolation

RL= 50 Ω, CL= 5 pF

f = 1 MHz

Refer to Off Isolation 25°C –65 dB

RL= 50 Ω, CL= 5 pF

f = 10 MHz

Refer to Off Isolation 25°C –45 dB

XTALK Crosstalk

RL= 50 Ω, CL= 5 pF

f = 1 MHz

Refer to Crosstalk 25°C –65 dB

RL= 50 Ω, CL= 5 pF

f = 10 MHz

Refer to Crosstalk 25°C –45 dB

BW Bandwidth RL= 50 Ω, CL= 5 pF

Refer to Bandwidth 25°C 155 MHz

CSOFF Source off capacitance f = 1 MHz 25°C 6 pF

CDOFF Drain off capacitance f = 1 MHz 25°C 28 pF

CSON

CDON On capacitance f = 1 MHz 25°C 35 pF

l TEXAS INSTRUMENTS

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

(1) When VSis 1.62 V, VDis 1 V, and vice versa.

6.7 Electrical Characteristics (VDD = 1.8 V ±10 %)

at TA= 25°C, VDD = 1.8 V (unless otherwise noted)

PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT

ANALOG SWITCH

RON On-resistance VS= 0 V to VDD

ISD = 10 mA

Refer to On-Resistance

25°C 40 Ω

–40°C to +85°C 80 Ω

–40°C to +125°C 80 Ω

ΔRON On-resistance matching between

channels

VS= 0 V to VDD

ISD = 10 mA

Refer to On-Resistance

25°C 0.4 Ω

–40°C to +85°C 1.5 Ω

–40°C to +125°C 1.5 Ω

IS(OFF) Source off leakage current(1)

VDD = 1.98 V

Switch Off

VD= 1.62 V / 1 V

VS= 1 V / 1.62 V

Refer to Off-Leakage Current

25°C –0.05 ±0.003 0.05 nA

–40°C to +85°C –0.1 0.1 nA

–40°C to +125°C –0.5 0.5 nA

ID(OFF) Drain off leakage current(1)

VDD = 1.98 V

Switch Off

VD= 1.62 V / 1 V

VS= 1 V / 1.62 V

Refer to Off-Leakage Current

25°C –0.1 ±0.005 0.1 nA

–40°C to +85°C –0.5 0.5 nA

–40°C to +125°C –2 2 nA

ID(ON)

IS(ON) Channel on leakage current

VDD = 1.98 V

Switch On

VD= VS= 1.62 V / 1 V

Refer to On-Leakage Current

25°C –0.1 ±0.005 0.1 nA

–40°C to +85°C –0.5 0.5 nA

–40°C to +125°C –2 2 nA

LOGIC INPUTS (EN, A0, A1)

VIH Input logic high –40°C to +125°C 1.07 5.5 V

VIL Input logic low –40°C to +125°C 0 0.68 V

IIH

IIL Input leakage current 25°C ±0.005 µA

IIH

IIL Input leakage current –40°C to +125°C ±0.05 µA

CIN Logic input capacitance 25°C 1 pF

CIN Logic input capacitance –40°C to +125°C 2 pF

POWER SUPPLY

IDD VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.001 µA

–40°C to +125°C 0.85 µA

l TEXAS INSTRUMENTS

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

Electrical Characteristics (VDD = 1.8 V ±10 %) (continued)

at TA= 25°C, VDD = 1.8 V (unless otherwise noted)

PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT

DYNAMIC CHARACTERISTICS

tTRAN Transition time between channels VS= 1 V

RL= 200 Ω, CL= 15 pF

Refer to Transition Time

25°C 28 ns

–40°C to +85°C 44 ns

–40°C to +125°C 44 ns

tOPEN

(BBM) Break before make time VS= 1 V

RL= 200 Ω, CL= 15 pF

Refer to Break-Before-Make

25°C 16 ns

–40°C to +85°C 1 ns

–40°C to +125°C 1 ns

tON(EN) Enable turn-on time VS= 1 V

RL= 200 Ω, CL= 15 pF

Refer to tON(EN) and tOFF(EN)

25°C 25 ns

–40°C to +85°C 41 ns

–40°C to +125°C 41 ns

tOFF(EN) Enable turn-off time VS= 1 V

RL= 200 Ω, CL= 15 pF

Refer to tON(EN) and tOFF(EN)

25°C 13 ns

–40°C to +85°C 23 ns

–40°C to +125°C 23 ns

QCCharge Injection VS= 1 V

RS= 0 Ω, CL= 1 nF

Refer to Charge Injection 25°C –0.5 pC

OISO Off Isolation

RL= 50 Ω, CL= 5 pF

f = 1 MHz

Refer to Off Isolation 25°C –65 dB

RL= 50 Ω, CL= 5 pF

f = 10 MHz

Refer to Off Isolation 25°C –45 dB

XTALK Crosstalk

RL= 50 Ω, CL= 5 pF

f = 1 MHz

Refer to Crosstalk 25°C –65 dB

RL= 50 Ω, CL= 5 pF

f = 10 MHz

Refer to Crosstalk 25°C –45 dB

BW Bandwidth RL= 50 Ω, CL= 5 pF

Refer to Bandwidth 25°C 140 MHz

CSOFF Source off capacitance f = 1 MHz 25°C 6 pF

CDOFF Drain off capacitance f = 1 MHz 25°C 28 pF

CSON

CDON On capacitance f = 1 MHz 25°C 35 pF

l TEXAS INSTRUMENTS

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

(1) When VSis 1 V, VDis 0.8 V, and vice versa.

6.8 Electrical Characteristics (VDD = 1.2 V ±10 %)

PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT

ANALOG SWITCH

RON On-resistance VS= 0 V to VDD

ISD = 10 mA

Refer to On-Resistance

25°C 70 Ω

–40°C to +85°C 105 Ω

–40°C to +125°C 105 Ω

ΔRON On-resistance matching between

channels

VS= 0 V to VDD

ISD = 10 mA

Refer to On-Resistance

25°C 0.4 Ω

–40°C to +85°C 1.5 Ω

–40°C to +125°C 1.5 Ω

IS(OFF) Source off leakage current(1)

VDD = 1.32 V

Switch Off

VD= 1 V / 0.8 V

VS= 0.8 V / 1 V

Refer to Off-Leakage Current

25°C –0.05 ±0.003 0.05 nA

–40°C to +85°C –0.1 0.1 nA

–40°C to +125°C –0.5 0.5 nA

ID(OFF) Drain off leakage current(1)

VDD = 1.32 V

Switch Off

VD= 1 V / 0.8 V

VS= 0.8 V / 1 V

Refer to Off-Leakage Current

25°C –0.1 ±0.005 0.1 nA

–40°C to +85°C –0.5 0.5 nA

–40°C to +125°C –2 2 nA

ID(ON)

IS(ON) Channel on leakage current

VDD = 1.32 V

Switch On

VD= VS= 1 V / 0.8 V

Refer to On-Leakage Current

25°C –0.1 ±0.005 0.1 nA

–40°C to +85°C –0.5 0.5 nA

–40°C to +125°C –2 2 nA

LOGIC INPUTS (EN, A0, A1)

VIH Input logic high –40°C to +125°C 0.96 5.5 V

VIL Input logic low –40°C to +125°C 0 0.36 V

IIH

IIL Input leakage current 25°C ±0.005 µA

IIH

IIL Input leakage current –40°C to +125°C ±0.05 µA

CIN Logic input capacitance 25°C 1 pF

CIN Logic input capacitance –40°C to +125°C 2 pF

POWER SUPPLY

IDD VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.001 µA

–40°C to +125°C 0.7 µA

l TEXAS INSTRUMENTS

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

Electrical Characteristics (VDD = 1.2 V ±10 %) (continued)

PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT

DYNAMIC CHARACTERISTICS

tTRAN Transition time between channels VS= 1 V

RL= 200 Ω, CL= 15 pF

Refer to Transition Time

25°C 55 ns

–40°C to +85°C 190 ns

–40°C to +125°C 190 ns

tOPEN

(BBM) Break before make time VS= 1 V

RL= 200 Ω, CL= 15 pF

Refer to Break-Before-Make

25°C 28 ns

–40°C to +85°C 1 ns

–40°C to +125°C 1 ns

tON(EN) Enable turn-on time VS= 1 V

RL= 200 Ω, CL= 15 pF

Refer to tON(EN) and tOFF(EN)

25°C 50 ns

–40°C to +85°C 175 ns

–40°C to +125°C 175 ns

tOFF(EN) Enable turn-off time VS= 1 V

RL= 200 Ω, CL= 15 pF

Refer to tON(EN) and tOFF(EN)

25°C 35 ns

–40°C to +85°C 135 ns

–40°C to +125°C 135 ns

QCCharge Injection VS= 1 V

RS= 0 Ω, CL= 1 nF

Refer to Charge Injection 25°C –0.5 pC

OISO Off Isolation

RL= 50 Ω, CL= 5 pF

f = 1 MHz

Refer to Off Isolation 25°C –65 dB

RL= 50 Ω, CL= 5 pF

f = 10 MHz

Refer to Off Isolation 25°C –45 dB

XTALK Crosstalk

RL= 50 Ω, CL= 5 pF

f = 1 MHz

Refer to Crosstalk 25°C –65 dB

RL= 50 Ω, CL= 5 pF

f = 10 MHz

Refer to Crosstalk 25°C –45 dB

BW Bandwidth RL= 50 Ω, CL= 5 pF

Refer to Bandwidth 25°C 125 MHz

CSOFF Source off capacitance f = 1 MHz 25°C 7 pF

CDOFF Drain off capacitance f = 1 MHz 25°C 32 pF

CSON

CDON On capacitance f = 1 MHz 25°C 40 pF

l TEXAS INSTRUMENTS H 14)? // W 400

VS or VD - Source or Drain Voltage (V)

On-Leakage (pA)

0 0.5 1 1.5 2 2.5 3 3.5 4

-40

-30

-20

-10

VDD = 1.32 V VDD = 1.98 V VDD = 3.63 V

D005

VS or VD - Source or Drain Voltage (V)

On-Leakage (pA)

0 1 2 3 4 5

-400

-300

-200

-100

100

200

300

400

D006

VS or VD - Source or Drain Voltage (V)

On Resistance (:)

0 0.5 1 1.5 2 2.5 3 3.5

TA = 25qC

TA = 125qC

TA = 85qC

TA = -40qC

D003

VS or VD - Source or Drain Voltage (V)

On Resistance (:)

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

VDD = 1.62 V

VDD = 1.98 V

VDD = 1.08 V

VDD = 1.32 V

D004

VS or VD - Source or Drain Voltage (V)

On Resistance (:)

0 1 2 3 4 5 5.5

VDD = 5.5 V

VDD = 4.5 V

VDD = 3.63 V

VDD = 3 V

D001

VS or VD - Source or Drain Voltage (V)

On Resistance (:)

0 1 2 3 4 5

0.5

1.5

2.5

3.5

4.5

TA = 125qC

TA = 25qC

TA = 85qC

TA = -40qC

D002

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

6.9 Typical Characteristics

at TA= 25°C, VDD = 5 V (unless otherwise noted)

TA= 25°C

Figure 1. On-Resistance vs Source or Drain Voltage

VDD = 5 V

Figure 2. On-Resistance vs Temperature

VDD = 3.3 V

Figure 3. On-Resistance vs Temperature

TA= 25°C

Figure 4. On-Resistance vs Source or Drain Voltage

TA= 25°C

Figure 5. On-Leakage vs Source or Drain Voltage

VDD = 5 V

Figure 6. On-Leakage vs Source or Drain Voltage

l TEXAS INSTRUMENTS D4 1400

VS - Source Voltage (V)

Charge Injection (pC)

0 1 2 3 4 5

-20

-15

-10

-5

VDD = 5 V

VDD = 3.3 V

D011

VS - Source Voltage (V)

Charge Injection (pC)

0 0.5 1 1.5 2

-5

-3

-1

VDD = 1.8 V

VDD = 1.2 V

D012

Temperature (qC)

Supply Current (PA)

-40 -20 0 20 40 60 80 100 120 140

-0.1

0.1

0.2

0.3

0.4

VDD = 5 V

VDD = 3.3 V

VDD = 1.8 V

VDD = 1.2 V

D009

Logic Voltage (V)

Supply Current (PA)

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

200

400

600

800

1000

1200

1400

VDD = 5 VVDD = 3.3 V

D010

Temperature (qC)

Leakage Current (nA)

-40 -20 0 20 40 60 80 100 120

-1

-0.75

-0.5

-0.25

0.25

0.5

0.75

ID(OFF)

I(ON)

IS(OFF)

D007

Temperature (qC)

Leakage Current (nA)

-40 -20 0 20 40 60 80 100 120

-3.5

-2.5

-1.5

-0.5

0.5

1.5

2.5

3.5

I(ON)

ID(OFF)

IS(OFF)

D008

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

Typical Characteristics (continued)

VDD = 3.3 V

Figure 7. Leakage Current vs Temperature

VDD = 5 V

Figure 8. Leakage Current vs Temperature

VSEL = 5.5 V

Figure 9. Supply Current vs Temperature

TA= 25°C

Figure 10. Supply Current vs Logic Voltage

TA= -40°C to 125°C

Figure 11. Charge Injection vs Source Voltage

TA= -40°C to 125°C

Figure 12. Charge Injection vs Source Voltage

l TEXAS INSTRUMENTS

Frequency (Hz)

Gain (dB)

-6

-5

-4

-3

-2

-1

1M 10M 100M

D017

VDD - Supply Voltage (V)

Time (ns)

0.5 1.5 2.5 3.5 4.5 5.5

FALLING

RISING

D015

Frequency (Hz)

Magnitude (dB)

-90

-80

-70

-60

-50

-40

-30

-20

-10

100k 1M 10M 100M

D016

VDD - Supply Voltage (V)

Time (ns)

1.5 2 2.5 3 3.5 4 4.5 5 5.5

TOFF(EN)

TON(EN)

D013

Temperature (qC)

Time (ns)

-60 -30 0 30 60 90 120 150

TOFF(EN)

TON(EN)

D014

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

Typical Characteristics (continued)

TA= 25°C

Figure 13. TON (EN) and TOFF (EN) vs Supply Voltage

VDD = 5 V

Figure 14. TON (EN) and TOFF (EN) vs Temperature

TA= 25°C

Figure 15. Output TTRANSITION vs Supply Voltage

TA= 25°C

Figure 16. Xtalk and Off-Isolation vs Frequency

TA= 25°C

Figure 17. On Response vs Frequency

dﬂwi \

VDD

GND

ID (OFF)

VDD

GND

Is (OFF)

ISD

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

7 Parameter Measurement Information

7.1 On-Resistance

The on-resistance of a device is the ohmic resistance between the source (Sx) and drain (D) pins of the device.

The on-resistance varies with input voltage and supply voltage. The symbol RON is used to denote on-resistance.

The measurement setup used to measure RON is shown in Figure 18. Voltage (V) and current (ISD) are measured

using this setup, and RON is computed with RON =V/ISD:

Figure 18. On-Resistance Measurement Setup

7.2 Off-Leakage Current

There are two types of leakage currents associated with a switch during the off state:

1. Source off-leakage current

2. Drain off-leakage current

Source leakage current is defined as the leakage current flowing into or out of the source pin when the switch is

off. This current is denoted by the symbol IS(OFF).

Drain leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is off.

This current is denoted by the symbol ID(OFF).

The setup used to measure both off-leakage currents is shown in Figure 19.

Figure 19. Off-Leakage Measurement Setup

VIH VIL

tTRANSITION

10%

90%

OUTPUT

0 V

ADDRESS

DRIVE

(VSEL)

VDD

tTRANSITION

OUTPUT

RLCL

GND

VSEL

0 V

tr < 5ns tf < 5ns

VDD

0.1…F

VDD

GND

ID (ON)

VDD

GND

IS (ON)

N.C.

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

7.3 On-Leakage Current

Source on-leakage current is defined as the leakage current flowing into or out of the source pin when the switch

is on. This current is denoted by the symbol IS(ON).

Drain on-leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is

on. This current is denoted by the symbol ID(ON).

Either the source pin or drain pin is left floating during the measurement. Figure 20 shows the circuit used for

measuring the on-leakage current, denoted by IS(ON) or ID(ON).

Figure 20. On-Leakage Measurement Setup

7.4 Transition Time

Transition time is defined as the time taken by the output of the device to rise or fall 10% after the address signal

has risen or fallen past the logic threshold. The 10% transition measurement is utilized to provide the timing of

the device. System level timing can then account for the time constant added from the load resistance and load

capacitance. Figure 21 shows the setup used to measure transition time, denoted by the symbol tTRANSITION.

Figure 21. Transition-Time Measurement Setup

EN A0

GND

VEN

VDD

0 V

ENABLE

DRIVE

(VEN)VIH

VIL

tON (EN) tOFF (EN)

90%

10%

OUTPUT

0 V

tr < 5ns tf < 5ns

VDD

0.1…F

OUTPUT

RLCL

VDD

0 V

tBBM 1

90%

Output

0 V

tOPEN (BBM) = min ( tBBM 1, tBBM 2)

tBBM 2

ADDRESS

DRIVE

(VSEL)tr < 5ns tf < 5ns

GND

VSEL

VDD

0.1…F

OUTPUT

RLCL

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

7.5 Break-Before-Make

Break-before-make delay is a safety feature that prevents two inputs from connecting when the device is

switching. The output first breaks from the on-state switch before making the connection with the next on-state

switch. The time delay between the break and the make is known as break-before-make delay. Figure 22 shows

the setup used to measure break-before-make delay, denoted by the symbol tOPEN(BBM).

Figure 22. Break-Before-Make Delay Measurement Setup

7.6 tON(EN) and tOFF(EN)

Turn-on time is defined as the time taken by the output of the device to rise to 10% after the enable has risen

past the logic threshold. The 10% measurement is utilized to provide the timing of the device. System level

timing can then account for the time constant added from the load resistance and load capacitance. Figure 23

shows the setup used to measure turn-on time, denoted by the symbol tON(EN).

Turn-off time is defined as the time taken by the output of the device to fall to 90% after the enable has fallen

past the logic threshold. The 90% measurement is utilized to provide the timing of the device. System level

timing can then account for the time constant added from the load resistance and load capacitance. Figure 23

shows the setup used to measure turn-off time, denoted by the symbol tOFF(EN).

Figure 23. Turn-On and Turn-Off Time Measurement Setup

OUT

Off Isolation 20 Log V

§ ·

˜ ¨ ¸

GND

NETWORK

ANALYZER

VOUT

50Q

VSIG

50Q

VDD

0.1µF

OUTPUT

GND

VOUT

Output

0 V

VDD

QC = CL × VOUT

VOUT

VEN

VDD

0.1…F

VEN

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

7.7 Charge Injection

The TMUX1104 has a transmission-gate topology. Any mismatch in capacitance between the NMOS and PMOS

transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal.

The amount of charge injected into the source or drain of the device is known as charge injection, and is denoted

by the symbol QC.Figure 24 shows the setup used to measure charge injection from source (Sx) to drain (D).

Figure 24. Charge-Injection Measurement Setup

7.8 Off Isolation

Off isolation is defined as the ratio of the signal at the drain pin (D) of the device when a signal is applied to the

source pin (Sx) of an off-channel. Figure 25 shows the setup used to measure, and the equation used to

calculate off isolation.

Figure 25. Off Isolation Measurement Setup

(1)

l TEXAS INSTRUMENTS {7+

GND

NETWORK

ANALYZER

VOUT

50Q

VSIG

50Q

VDD

0.1µF

50Q

OUT

Channel-to-Channel Crosstalk 20 Log V

§ ·

˜ ¨ ¸

NETWORK

ANALYZER

GND

VSIG

50Q

VOUT

50Q

VDD

0.1µF

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

7.9 Crosstalk

Crosstalk is defined as the ratio of the signal at the drain pin (D) of a different channel, when a signal is applied

at the source pin (Sx) of an on-channel. Figure 26 shows the setup used to measure, and the equation used to

calculate crosstalk.

Figure 26. Crosstalk Measurement Setup

(2)

7.10 Bandwidth

Bandwidth is defined as the range of frequencies that are attenuated by less than 3 dB when the input is applied

to the source pin (Sx) of an on-channel, and the output is measured at the drain pin (D) of the device. Figure 27

shows the setup used to measure bandwidth.

Figure 27. Bandwidth Measurement Setup

l TEXAS INSTRUMENTS

TMUX1104

A0A1EN

1-of-4

Decoder

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

8 Detailed Description

8.1 Functional Block Diagram

The TMUX1104 is an 4:1, 1-channel (single-ended) multiplexer or demultiplexer. Each input is turned on or

turned off based on the state of the address lines and enable pin.

Figure 28. TMUX1104 Functional Block Diagram

8.2 Feature Description

8.2.1 Bidirectional Operation

The TMUX1104 conducts equally well from source (Sx) to drain (Dx) or from drain (Dx) to source (Sx). Each

channel has very similar characteristics in both directions and supports both analog and digital signals.

8.2.2 Rail to Rail Operation

The valid signal path input/output voltage for TMUX1104 ranges from GND to VDD.

8.2.3 1.8 V Logic Compatible Inputs

The TMUX1104 has 1.8-V logic compatible control for all logic control inputs. The logic input thresholds scale

with supply but still provide 1.8-V logic control when operating at 5.5 V supply voltage. 1.8-V logic level inputs

allows the TMUX1104 to interface with processors that have lower logic I/O rails and eliminates the need for an

external translator, which saves both space and BOM cost. For more information on 1.8 V logic implementations

refer to Simplifying Design with 1.8 V logic Muxes and Switches

8.2.4 Fail-Safe Logic

The TMUX1104 supports Fail-Safe Logic on the control input pins (EN, A0, A1) allowing for operation up to 5.5

V, regardless of the state of the supply pin. This feature allows voltages on the control pins to be applied before

the supply pin, protecting the device from potential damage. Fail-Safe Logic minimizes system complexity by

removing the need for power supply sequencing on the logic control pins. For example, the Fail-Safe Logic

feature allows the select pins of the TMUX1104 to be ramped to 5.5 V while VDD = 0 V. Additionally, the feature

enables operation of the TMUX1104 with VDD = 1.2 V while allowing the select pins to interface with a logic level

of another device up to 5.5 V.

l TEXAS INSTRUMENTS

CGDP

CGDN

CGSN

CGSP

OFF ON

Temperature (qC)

Leakage Current (nA)

-40 -20 0 20 40 60 80 100 120

-3.5

-2.5

-1.5

-0.5

0.5

1.5

2.5

3.5

I(ON)

ID(OFF)

IS(OFF)

D008

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

Feature Description (continued)

8.2.5 Ultra-low Leakage Current

The TMUX1104 provides extremely low on-leakage and off-leakage currents. The TMUX1104 is capable of

switching signals from high source-impedance inputs into a high input-impedance op amp with minimal offset

error because of the ultra-low leakage currents. Figure 29 shows typical leakage currents of the TMUX1104

versus temperature.

Figure 29. Leakage Current vs Temperature

8.2.6 Ultra-low Charge Injection

The TMUX1104 has a transmission gate topology, as shown in Figure 30. Any mismatch in the stray capacitance

associated with the NMOS and PMOS causes an output level change whenever the switch is opened or closed.

Figure 30. Transmission Gate Topology

l TEXAS INSTRUMENTS

VS - Source Voltage (V)

Charge Injection (pC)

0 1 2 3 4 5

-20

-15

-10

-5

VDD = 5 V

VDD = 3.3 V

D011

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

Feature Description (continued)

The TMUX1104 has special charge-injection cancellation circuitry that reduces the source-to-drain charge

injection to 1.5 pC at VS= 1 V as shown in Figure 31.

Figure 31. Charge Injection vs Source Voltage

8.3 Device Functional Modes

When the EN pin of the TMUX1104 is pulled high, one of the switches is closed based on the state of the

address lines. When the EN pin is pulled low, all the switches are in an open state regardless of the state of the

address lines. The control pins can be as high as 5.5 V.

8.4 Truth Tables

Table 1 show the truth tables for the TMUX1104.

(1) X denotes don't care.

Table 1. TMUX1104 Truth Table

EN A1 A0 Selected Input Connected To Drain (D) Pin

0 X(1) X(1) All channels are off

1 0 0 S1

1 0 1 S2

1 1 0 S3

1 1 1 S4

l TEXAS INSTRUMENTS

Analog Inputs

LED Photo

Detector

Bridge Sensor

Thermocouple

Current

Sensing

Optical Sensor

...

Gain / Filter

Network

OPA333

ADS8864

OPA333

REF

3.3V

GND

VDD

TMUX1104

A0 A1

1.8V Logic

Signals

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TMUX11xx family offers ulta-low input/output leakage currents and low charge injection. These devices

operate up to 5.5 V, and offer true rail-to-rail input and output of both analog and digital signals. The TMUX1104

has a low on-capacitance which allows faster settling time when multiplexing inputs in the time domain. These

features make the TMUX11xx devices a family of precision, high-performance switches and multiplexers for low-

voltage applications.

9.2 Typical Application

Figure 32 shows a 16-bit, 4 input, multiplexed, data-acquisition system. This example is typical in industrial

applications that require low distortion for precision measurements. The circuit uses the ADS8864, a 16-bit, 400-

kSPS successive-approximation-resistor (SAR) analog-to-digital converter (ADC), along with a precision

amplifier, and a 4 input mux.

Figure 32. Multiplexing Signals to External ADC

9.3 Design Requirements

For this design example, use the parameters listed in Table 2.

Table 2. Design Parameters

PARAMETERS VALUES

Supply (VDD) 3.3 V

I/O signal range 0 V to VDD (Rail to Rail)

Control logic thresholds 1.8 V compatible

l TEXAS INSTRUMENTS

VS or VD - Source or Drain Voltage (V)

On-Leakage (pA)

0 0.5 1 1.5 2 2.5 3 3.5 4

-40

-30

-20

-10

VDD = 1.32 V VDD = 1.98 V VDD = 3.63 V

D005

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

9.4 Detailed Design Procedure

The TMUX1104 can be operated without any external components except for the supply decoupling capacitors. If

the desired power-up state is disabled, the enable pin should have a weak pull-down resistor and be controlled

by the MCU via GPIO. All inputs being muxed to the ADC must fall within the recommend operating conditions of

the TMUX1104, including signal range and continuous current. For this design with a supply of 3.3V the signal

range can be 0 V to 3.3 V, and the max continuous current can be 30 mA.

The design example highlights a multiplexed data-acquisition system for highest system linearity and fast settling.

The overall system block diagram is illustrated in Figure 32. The circuit is a multichannel data-acquisition signal

chain consisting of an input low-pass filter, mux, mux output buffer, SAR ADC driver, and a reference buffer. The

architecture provides a cost-effective solution for fast sampling of multiple channels using a single ADC.

9.5 Application Curve

The TMUX1104 is capable of switching signals from high source-impedance inputs into a high input-impedance

op amp with minimal offset error because of the ultra-low leakage currents.

TA= 25°C

Figure 33. On-Leakage vs Source or Drain Voltage

10 Power Supply Recommendations

The TMUX1104 operates across a wide supply range of 1.08 V to 5.5 V. Do not exceed the absolute maximum

ratings because stresses beyond the listed ratings can cause permanent damage to the devices.

Power-supply bypassing improves noise margin and prevents switching noise propagation from the VDD supply to

other components. Good power-supply decoupling is important to achieve optimum performance. For improved

supply noise immunity, use a supply decoupling capacitor ranging from 0.1 μF to 10 μF from VDD to ground.

Place the bypass capacitors as close to the power supply pins of the device as possible using low-impedance

connections. TI recommends using multi-layer ceramic chip capacitors (MLCCs) that offer low equivalent series

resistance (ESR) and inductance (ESL) characteristics for power-supply decoupling purposes. For very sensitive

systems, or for systems in harsh noise environments, avoiding the use of vias for connecting the capacitors to

the device pins may offer superior noise immunity. The use of multiple vias in parallel lowers the overall

inductance and is beneficial for connections to ground planes.

l TEXAS INSTRUMENTS WORST BETTER /

GND

VDD

TMUX1104

Via to

GND plane C

Wide (low inductance)

trace for power

WORST BETTER BEST

1W min.

TMUX1104

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

www.ti.com

Product Folder Links: TMUX1104

11 Layout

11.1 Layout Guidelines

11.1.1 Layout Information

When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs primarily because of

the change of width of the trace. At the apex of the turn, the trace width increases to 1.414 times the width. This

increase upsets the transmission-line characteristics, especially the distributed capacitance and self–inductance

of the trace which results in the reflection. Not all PCB traces can be straight and therefore some traces must

turn corners.Figure 34 shows progressively better techniques of rounding corners. Only the last example (BEST)

maintains constant trace width and minimizes reflections.

Figure 34. Trace Example

Route high-speed signals using a minimum of vias and corners which reduces signal reflections and

impedance changes. When a via must be used, increase the clearance size around it to minimize its

capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of

picking up interference from the other layers of the board. Be careful when designing test points, through-

hole pins are not recommended at high frequencies.

Figure 35 illustrates an example of a PCB layout with the TMUX1104. Some key considerations are:

• Decouple the VDD pin with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure that the

capacitor voltage rating is sufficient for the VDD supply.

• Keep the input lines as short as possible.

• Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup.

• Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible, and only make perpendicular crossings when necessary.

11.2 Layout Example

Figure 35. TMUX1104 Layout Example

l TEXAS INSTRUMENTS

TMUX1104

www.ti.com

SCDS392B –NOVEMBER 2018–REVISED JULY 2019

Product Folder Links: TMUX1104

12 Device and Documentation Support

12.1 Documentation Support

12.1.1 Related Documentation

Texas Instruments, True Differential, 4 x 2 MUX, Analog Front End, Simultaneous-Sampling ADC Circuit.

Texas Instruments, Improve Stability Issues with Low CON Multiplexers.

Texas Instruments, Simplifying Design with 1.8 V logic Muxes and Switches.

Texas Instruments, Eliminate Power Sequencing with Powered-off Protection Signal Switches.

Texas Instruments, System-Level Protection for High-Voltage Analog Multiplexers.

Texas Instruments, QFN/SON PCB Attachment.

Texas Instruments, Quad Flatpack No-Lead Logic Packages.

12.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper

right corner, click on Alert me to register and receive a weekly digest of any product information that has

changed. For change details, review the revision history included in any revised document.

12.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective

contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help

solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

12.4 Trademarks

E2E is a trademark of Texas Instruments.

12.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

12.6 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

I TEXAS INSTRUMENTS Sample: Sample:

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead finish/

Ball material

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

TMUX1104DGSR ACTIVE VSSOP DGS 10 2500 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 1D7

TMUX1104DQAR ACTIVE USON DQA 10 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 104

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

I TEXAS INSTRUMENTS

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 2

I TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS 7 “K0 '«m» Reel Diame|er AD Dimension deswgned to accommodate the componem wwdlh E0 Dimension desxgned to accommodate the componenl \ength KO Dimenslun deswgned to accommodate the componem thickness 7 w OveraH wwdm loe earner cape i p1 Pitch between successwe cavuy cemers f T Reel Width (W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE O O O D O O D O Sprockemoles ,,,,,,,,,,, ‘ User Direcllon 0' Feed Pockel Quadrams

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

TMUX1104DGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

TMUX1104DQAR USON DQA 10 3000 180.0 9.5 1.18 2.68 0.72 4.0 8.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 17-Jul-2020

Pack Materials-Page 1

I TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TMUX1104DGSR VSSOP DGS 10 2500 364.0 364.0 27.0

TMUX1104DQAR USON DQA 10 3000 189.0 185.0 36.0

PACKAGE MATERIALS INFORMATION

www.ti.com 17-Jul-2020

Pack Materials-Page 2

DGSOO10A I

www.ti.com

PACKAGE OUTLINE

TYP

5.05

4.75

1.1 MAX

8X 0.5

10X 0.27

0.17

0.15

0.05

TYP

0.23

0.13

0 - 8

0.25

GAGE PLANE

0.7

0.4

NOTE 3

3.1

2.9

NOTE 4

3.1

2.9

4221984/A 05/2015

VSSOP - 1.1 mm max heightDGS0010A

SMALL OUTLINE PACKAGE

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed 0.15 mm per side.

4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.

5. Reference JEDEC registration MO-187, variation BA.

110

0.1 C A B

PIN 1 ID

AREA

SEATING PLANE

0.1 C

SEE DETAIL A

DETAIL A

TYPICAL

SCALE 3.200

DGSOO10A

www.ti.com

EXAMPLE BOARD LAYOUT

(4.4)

0.05 MAX

ALL AROUND 0.05 MIN

ALL AROUND

10X (1.45)

10X (0.3)

8X (0.5)

(R )

TYP

0.05

4221984/A 05/2015

VSSOP - 1.1 mm max heightDGS0010A

SMALL OUTLINE PACKAGE

SYMM

LAND PATTERN EXAMPLE

SCALE:10X

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

NOT TO SCALE

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

DGSOO10A

www.ti.com

EXAMPLE STENCIL DESIGN

(4.4)

8X (0.5)

10X (0.3)

10X (1.45)

(R ) TYP0.05

4221984/A 05/2015

VSSOP - 1.1 mm max heightDGS0010A

SMALL OUTLINE PACKAGE

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

SYMM

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:10X

DQA0010A % 0.45 0.35 1@ A@ SEQ 5®

www.ti.com

PACKAGE OUTLINE

8X 0.25

0.15

10X 0.43

0.30

4X 0.5

0.55 MAX

0.05

0.00

2X 0.45

0.35

B1.1

0.9

2.6

2.4

(0.13) TYP

(R )0.125

USON - 0.55 mm max heightDQA0010A

PLASTIC SMALL OUTLINE - NO LEAD

4220328/A 12/2015

PIN 1 INDEX AREA

SEATING PLANE

0.08 C

(OPTIONAL)

PIN 1 ID

0.1 C A B

0.05 C

0.1 C A B

0.05

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

SCALE 6.000

DQA0010A

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

4X (0.5)

(0.835)

8X (0.2)

10X (0.565)

(R ) TYP0.05

2X (0.4)

USON - 0.55 mm max heightDQA0010A

PLASTIC SMALL OUTLINE - NO LEAD

4220328/A 12/2015

SYMM

LAND PATTERN EXAMPLE

SCALE:30X

NOTES: (continued)

3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).

SOLDER MASK

OPENING

SOLDER MASK

METAL UNDER

SOLDER MASK

DEFINED

METAL

SOLDER MASK

OPENING

SOLDER MASK DETAILS

NON SOLDER MASK

DEFINED

(PREFERRED)

DQA0010A

www.ti.com

EXAMPLE STENCIL DESIGN

8X (0.2)

10X (0.565)

4X (0.5)

2X (0.36)

(0.835)

(R ) TYP0.05

USON - 0.55 mm max heightDQA0010A

PLASTIC SMALL OUTLINE - NO LEAD

4220328/A 12/2015

NOTES: (continued)

4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

SOLDER PASTE EXAMPLE

BASED ON 0.1 mm THICK STENCIL

EXPOSED PADS 3 & 8:

90% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE

SCALE:40X

SYMM

METAL

TYP

IMPORTANT NOTICE AND DISCLAIMER

TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE

DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”

AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY

IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD

PARTY INTELLECTUAL PROPERTY RIGHTS.

These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate

TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable

standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you

permission to use these resources only for development of an application that uses the TI products described in the resource. Other

reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third

party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims,

damages, costs, losses, and liabilities arising out of your use of these resources.

TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on

ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable

warranties or warranty disclaimers for TI products.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

Datenblatt für TMUX1104 von Texas Instruments

INFORMATION

HILFE

KONTAKT

FOLGEN SIE UNS