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User's Guide

SLAU219A–August 2007–Revised January 2014

TLV320AIC3101EVM and TLV320AIC3101EVM-PDK

This User's Guide describes the characteristics, operation, and use of the TLV320AIC3101EVM, both by

itself and as part of the TLV320AIC3101EVM-PDK. This evaluation module (EVM) is a complete stereo

audio codec with several inputs and outputs, extensive audio routing, mixing, and effects capabilities. A

complete circuit description, schematic diagram, and bill of materials are included.

The following related documents are available through the Texas Instruments web site at www.ti.com.

Table 1. EVM-Compatible Device Data Sheets

Device Literature Number

TLV320AIC3101 SLAS520

TAS1020B SLES025

REG1117-3.3 SBVS001

TPS767D318 SLVS209

SN74LVC125A SCAS290

SN74LVC1G125 SCES223

SN74LVC1G07 SCES296

Contents

1 EVM Overview ............................................................................................................... 3

2 EVM Description and Basics .............................................................................................. 3

3 TLV320AIC3101EVM-PDK Setup and Installation ..................................................................... 8

4 TLV320AIC3101EVM Software .......................................................................................... 10

Appendix A EVM Connector Descriptions ................................................................................... 34

Appendix B TLV320AIC3101EVM Schematic ............................................................................... 38

Appendix C TLV320AIC3101EVM Layout Views ........................................................................... 40

Appendix D TLV320AIC3101EVM Bill of Materials ......................................................................... 43

Appendix E USB-MODEVM Schematic ...................................................................................... 44

Appendix F USB-MODEVM Layout Views .................................................................................. 46

Appendix G USB-MODEVM Bill of Materials ................................................................................ 48

Appendix H USB-MODEVM Protocol ......................................................................................... 50

List of Figures

1 TLV320AIC3101EVM-PDK Block Diagram ............................................................................. 4

2 Default Software Screen .................................................................................................. 9

3 Device Selection Window ................................................................................................ 10

4 Default Configuration Tab ................................................................................................ 12

5 Audio Input/ADC Tab ..................................................................................................... 13

6 Bypass Paths .............................................................................................................. 14

7 Audio Interface Tab ...................................................................................................... 15

8 Clocks Tab ................................................................................................................. 16

9 AGC Tab ................................................................................................................... 18

10 Left AGC Settings ......................................................................................................... 19

Microsoft, Windows are registered trademarks of Microsoft Corporation.

SPI is a trademark of Motorola, Inc.

VISA, LabVIEW are trademarks of National Instruments Corporation.

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11 Advanced................................................................................................................... 19

12 Filters Tab ................................................................................................................. 20

13 ADC High-Pass Filters ................................................................................................... 21

14 ADC High-Pass Filter Settings .......................................................................................... 21

15 DAC Filters ................................................................................................................. 22

16 De-emphasis Filters....................................................................................................... 22

17 Enabling Filters ........................................................................................................... 23

18 Shelf Filters ................................................................................................................ 23

19 EQ Filters .................................................................................................................. 24

20 Analog Simulation Filters ................................................................................................ 24

21 Preset Filters .............................................................................................................. 25

22 User Filters ................................................................................................................ 25

23 3-D Effect Settings ........................................................................................................ 26

24 Output Stage Configuration Tab ........................................................................................ 27

25 DAC/Line Outputs Tab ................................................................................................... 29

26 High-Power Outputs Tab ................................................................................................ 31

27 Command Line Interface Tab ........................................................................................... 32

28 File Menu .................................................................................................................. 33

29 TLV320AIC3101EVM Schematic........................................................................................ 38

30 TLV320AIC3101EVM Schematic Interface ............................................................................ 39

31 TLV320AIC3101EVM Assembly Layer ................................................................................. 40

32 TLV320AIC3101EVM Top Layer ........................................................................................ 40

33 TLV320AIC3101EVM Layer 3 ........................................................................................... 41

34 TLV320AIC3101EVM Layer 4 ........................................................................................... 41

35 TLV320AIC3101EVM Silk Screen....................................................................................... 42

36 TLV320AIC3101EVM Bottom Layer .................................................................................... 42

37 USB-MODEVM Interface Board Schematic (1 of 2) .................................................................. 44

38 USB-MODEVM Interface Board Schematic (2 of 2) .................................................................. 45

39 USB-MODEVM Assembly Layer ........................................................................................ 46

40 USB-MODEVM Top Layer ............................................................................................... 46

41 USB-MODEVM Bottom Layer ........................................................................................... 47

List of Tables

1 EVM-Compatible Device Data Sheets ................................................................................... 1

2 USB-MODEVM SW2 Settings............................................................................................. 5

3 USB-MODEVM Jumpers................................................................................................... 5

4 List of Jumpers .............................................................................................................. 6

5 Analog Interface Pinout................................................................................................... 34

6 Alternate Analog Connectors ............................................................................................ 35

7 Digital Interface Pinout.................................................................................................... 36

8 Power Supply Pinout...................................................................................................... 37

9 TLV320AIC3101EVM Bill of Materials.................................................................................. 43

10 USB-MODEVM Bill of Materials ......................................................................................... 48

11 USB Control Endpoint HIDSETREPORT Request.................................................................... 50

12 Data Packet Configuration ............................................................................................... 50

13 GPIO Pin Assignments ................................................................................................... 53

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EVM Overview

1 EVM Overview

1.1 Features

The features of the TLV320AIC3101EVM include:

• Full-featured evaluation board for the TLV320AIC3101 stereo audio codec.

• Modular design for use with a variety of digital signal processor (DSP) and microcontroller interface

boards.

• USB connection to PC provides power, control, and streaming audio data for easy evaluation.

• An onboard microphone for ADC evaluation.

• Connection points for external control and digital audio signals for quick connection to other

circuits/input devices.

The TLV320AIC3101EVM-PDK is a complete evaluation kit, which includes a universal serial bus (USB)-

based motherboard and evaluation software for use with a personal computer running the Microsoft®

Windows®operating system (Windows 2000 or Windows XP).

1.2 Introduction

The TLV320AIC3101EVM uses the Texas Instruments modular EVM form factor, which allows direct

evaluation of the device performance and operating characteristics, and eases software development and

system prototyping. This EVM is compatible with the 5-6K Interface Board (SLAU104) and the HPA-MCU

Interface Board (SLAU106) from Texas Instruments and additional third-party boards which support TI's

modular EVM format.

The TLV320AIC3101EVM-PDK is a complete evaluation/demonstration kit, which includes a USB-based

motherboard called the USB-MODEVM Interface Board and evaluation software for use with a personal

computer (PC) running the Microsoft Windows operating systems.

The TLV320AIC3101EVM-PDK operates with one USB cable connecting to a PC. The USB connection

provides power, control, and streaming audio data to the EVM for reduced setup and configuration. The

EVM also allow external control signals, audio data, and power for advanced operation, which permits

prototyping and connecting to the rest of the development or system evaluation.

2 EVM Description and Basics

This section provides information on the analog input and output, digital control, power, and general

connection of the TLV320AIC3101EVM.

2.1 TLV320AIC3101EVM-PDK Block Diagram

The TLV320AIC3101EVM-PDK consists of two separate circuit boards, the USB-MODEVM and the

TLV320AIC3101EVM. The USB-MODEVM is built around a TAS1020B streaming audio USB controller

with an 8051-based core. The motherboard features two positions for modular EVMs, or one double-wide

serial modular EVM can be installed. The TLV320AIC3101EVM is one of the double-wide modular EVMs

that is designed to work with the USB-MODEVM.

The simple diagram of Figure 1 shows how the TLV320AIC3101EVM is connected to the USB-MODEVM.

The USB-MODEVM Interface Board is intended to be used in USB mode, where control of the installed

EVM is accomplished using the onboard USB controller device. Provision is made, however, for driving all

the data buses (I2C, SPI™, I2S/AC97) externally. The source of these signals is controlled by SW2 on the

USB-MODEVM. See Table 2 for details on the switch settings.

The USB-MODEVM has two EVM positions that allow for the connection of two small evaluation modules

or one larger evaluation module. The TLV320AIC3101EVM is designed to fit over both of the smaller

evaluation module slots as shown in Figure 1.

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EVM Description and Basics

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2.1.1 USB-MODEVM Interface Board

The simple diagram in Figure 1 shows only the basic features of the USB-MODEVM Interface Board.

Because the TLV320AIC3101EVM is a double-wide modular EVM, it is installed with connections to both

EVM positions, which connects the TLV320AIC3101 digital control interface to the I2C port, realized by

using the TAS1020B, as well as the TAS1020B digital audio interface.

In the factory configuration, the board is ready to use with the TLV320AIC3101EVM. To view all the

functions and configuration options available on the USB-MODEVM board, see the USB-MODEVM

Interface Board schematic in Appendix E.

Figure 1. TLV320AIC3101EVM-PDK Block Diagram

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EVM Description and Basics

2.2 Default Configuration and Connections

2.2.1 USB-MODEVM

Table 2 provides a list of the SW2 settings on the USB-MODEVM. For use with the TLV320AIC3101EVM,

SW-2 positions 1 through 7 should be set to ON, whereas SW-2.8 should be set to OFF.

Table 2. USB-MODEVM SW2 Settings

SW-2 Switch

Number Label Switch Description

1 A0 USB-MODEVM EEPROM I2C address A0

ON: A0 = 0

OFF: A0 = 1

2 A1 USB-MODEVM EEPROM I2C address A1

ON: A1 = 0

OFF: A1 = 1

3 A2 USB-MODEVM EEPROM I2C address A2

ON: A2 = 0

OFF: A2 = 1

4 USB I2S I2S bus source selection

ON: I2S bus connects to TAS1020

OFF: I2S bus connects to USB-MODEVM J14

5 USB MCK I2S bus MCLK source selection

ON: MCLK connects to TAS1020

OFF: MCLK connects to USB-MODEVM J14

6 USB SPI SPI bus source selection

ON: SPI bus connects to TAS1020

OFF: SPI bus connects to USB-MODEVM J15

7 USB RST RST source selection

ON: EVM reset signal comes from TAS1020

OFF: EVM reset signal comes from USB-MODEVM J15

8 EXT MCK External MCLK selection

ON: MCLK signal is provided from USB-MODEVM J10

OFF: MCLK signal comes from either selection of SW2-5

Table 3 provides a list of USB-MODEVM jumpers found on the EVM.

Table 3. USB-MODEVM Jumpers

Jumper Default Position Jumper Description

JMP1 Installed Connects analog and digital +5 V supplies

JMP2 Open Connects analog and digital grounds

JMP3 Open Connects I2C SDA pull-up to IOVDD

JMP4 Open Connects I2C SCL pull-up to IOVDD

JMP5 2-3 When connecting 2-3, SS comes from FSX; when connecting 1-2, SS

comes from CNTL

JMP6 1-2 When connecting 1-2, +5 VD comes from USB; when connecting 2-3, +5

VD comes from U2

JMP7 1-2 When connecting 1-2, MCLKI comes from USB; when connecting 2-3,

MCLKI comes from AVSS/DVSS

JMP8 Open Connects resistor across EXT MCLK

Windows 7 Instructions

For use of the MODEVM motherboard on Windows 7 machines, the most up-to-date version of National

Instrument’s VISA™ drivers must be installed (ni.com). After this is installed, the USB-MODEVM Windows

XP/Windows Vista/Windows 7 driver must also be installed (SLAC521).

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2.2.2 TLV320AIC3101 Jumper Locations

Table 4 provides a list of jumpers found on the EVM and their factory default conditions. After this is

installed, the USB-MODEVM Windows XP/Windows Vista/Windows 7 driver must also be installed

(SLAC521).

Table 4. List of Jumpers

Jumper Default Position Jumper Description

JMP1 Installed Connects analog and digital grounds

JMP2 Open Selects onboard EEPROM as firmware source

JMP3 Installed Connects onboard Mic to IN2L

JMP4 Installed Connects onboard Mic to IN2R

JMP5 Installed Provides a means of measuring IOVDD current

JMP6 Installed Provides a means of measuring DVDD current

JMP7 Installed Provides a means of measuring DVRDD current

JMP8 Installed Provides a means of measuring AVDD_DAC current

JMP9 Open When installed, allows the USB-MODEVM to hardware reset

the device under user control

JMP10 2-3 When connecting 2-3, mic bias comes from the MICBIAS pin

on the device; when connecting 1-2, mic bias is supplied from

the power supply through a resistor, which the user must

install

JMP11 Installed When installed, shorts across the output capacitor on

HPLOUT; remove this jumper if using AC-coupled output drive

JMP12 Installed When installed, shorts HPLCOM and HPRCOM. Use only if

these signals are set to constant VCM

JMP13 Installed When installed, shorts across the output capacitor on

HPLCOM; remove this jumper if using AC-coupled output drive

JMP14 Installed When installed, shorts across the output capacitor on

HPROUT; remove this jumper if using AC-coupled output drive

JMP15 Installed When installed, shorts across the output capacitor on

HPRCOM; remove this jumper if using AC-coupled output

drive

JMP16 2-3 When connecting 2-3, IOVDD is set to +3.3 VD; when

connecting 1-2, IOVDD and DVDD are shorted at +1.8 VD

2.3 Analog Signal Connections

2.3.1 Analog Inputs

The analog inputs to the EVM can be connected through two different methods. The analog input sources

can be applied directly to J1 (top or bottom side) or through the analog headers (J6-8 and J14) around the

edge of the board. The connection details of each header/connector can be found in Appendix A.

2.3.2 Analog Output

The analog outputs to the EVM can be connected through two different methods. The analog outputs are

available from the J1 and J2 (top or bottom) or they may be accessed through J9, J10, J11, J12, and J13

at the edges of the board. The connection details can be found in Appendix A.

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EVM Description and Basics

2.4 Digital Signal Connections

2.4.1 Digital Inputs and Outputs

The digital inputs and outputs of the EVM can be monitored through J4 and J5. If external signals need to

be connected to the EVM, digital inputs should be connected via J14 and J15 on the USB-MODEVM and

the SW2 switch should be changed accordingly (see Section 2.2.1). The connector details are available in

Section A.2.

2.4.2 Digital Controls

The digital control signals can be applied directly to J4 and J5 (top or bottom side). The modular

TLV320AIC3101EVM also can be connected directly to a DSP interface board, such as the 5-6K Interface

Board or the HPA-MCU Interface Board, or to the USB-MODEVM Interface Board if purchased as part of

the TLV320AIC3101EVM-PDK. See the product folders on the TI Web site for these evaluation modules

or the TLV320AIC3101 for a current list of compatible interface and/or accessory boards.

2.5 Power Connections

The TLV320AIC3101EVM can be powered independently when being used in stand-alone operation or by

the USB-MODEVM when it is plugged onto the motherboard.

2.5.1 Stand-Alone Operation

When used as a stand-alone EVM, power is applied to J3 directly; ensure that the supplies are referenced

to the appropriate grounds on that connector.

CAUTION

Verify that all power supplies are within the safe operating limits shown in the

TLV320AIC3101 data sheet (SLAS520) before applying power to the EVM.

J3 provides connection to the common power bus for the TLV320AIC3101EVM. Power is supplied on the

pins listed in Table 8.

The TLV320AIC3101EVM-PDK motherboard (the USB-MODEVM Interface board) supplies power to J3 of

the TLV320AIC3101EVM. Power for the motherboard is supplied either through its USB connection or via

terminal blocks on that board.

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2.5.2 USB-MODEVM Operation

The USB-MODEVM Interface Board can be powered from several different sources:

• USB

• 6-Vdc to 10-Vdc ac/dc external wall supply (not included)

• Laboratory power supply

When powered from the USB connection, JMP6 should have a shunt from pins 1–2 (this is the default

factory configuration). When powered from 6 Vdc to 10 Vdc, either through the J8 terminal block or J9

barrel jack, JMP6 should have a shunt installed on pins 2–3. If power is applied in any of these ways,

onboard regulators generate the required supply voltages and no further power supplies are necessary.

If laboratory supplies are used to provide the individual voltages required by the USB-MODEVM Interface

Board, JMP6 should have no shunt installed. Voltages then are applied to J2 (+5 VA), J3 (+5 VD), J4

(+1.8 VD), and J5 (+3.3 VD). The +1.8 VD and +3.3 VD can also be generated on the board by the

onboard regulators from the +5-VD supply; to enable this configuration, the switches on SW1 need to be

set to enable the regulators by placing them in the ON position (lower position, looking at the board with

text reading right-side up). If +1.8 VD and +3.3 VD are supplied externally, disable the onboard regulators

by placing SW1 switches in the OFF position.

Each power supply voltage has an LED (D1-D7) that lights when the power supplies are active.

3 TLV320AIC3101EVM-PDK Setup and Installation

The following section provides information on using the TLV320AIC3101EVM-PDK, including setup,

program installation, and program usage.

NOTE: If using the EVM in stand-alone mode, the software should be installed per the following

procedure, but the hardware configuration may be different.

3.1 Software Installation

1. Locate the installation file on the CD-ROM included with the EVM or download the latest version of the

software located on the AIC3101 product page. If downloading the software from the TI Web site, an

option is available to allow the user to be notified when the software is updated.

2. Unzip the installation file by clicking on the self-extracting zip file.

3. Install the EVM software by double-clicking the Setup executable file and follow the directions. Users

may be prompted to restart their computers.

This should install all the TLV320AIC310x software and required drivers onto the PC.

3.2 EVM Connections

1. Ensure that the TLV320AIC3101EVM is installed on the USB-MODEVM Interface Board, aligning J1,

J2, J3, J4, and J5 with the corresponding connectors on the USB-MODEVM Interface Board.

2. Verify that the jumpers and switches are in their default conditions.

3. Attach a USB cable from the PC to the USB-MODEVM Interface Board. The default configuration

provides power, control signals, and streaming audio via the USB interface from the PC. On the USB-

MODEVM Interface Board, LEDs D3–6 should light to indicate that the power is being supplied from

the USB.

4. For the first connection, the PC should recognize new hardware and begin an initialization process.

The user may be prompted to identify the location of the drivers or allow the PC to automatically

search for them. Allow the automatic detection option.

5. Once the PC confirms that the hardware is operational, D2 on the USB-MODEVM Interface Board

should light to indicate that the firmware has been loaded and the EVM is ready for use. If the LED is

not lit, verify that the drivers were installed, unplug the USB cable, and restart the procedure at Step 3.

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TLV320AIC3101EVM-PDK Setup and Installation

After the TLV320AIC3101EVM-PDK software installation is complete, evaluation and development with

the TLV320AIC3101 can begin.

The TLV320AIC310xEVM software can now be launched. The user should see an initial screen that looks

similar to Figure 2.

Figure 2. Default Software Screen

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4 TLV320AIC3101EVM Software

The following section discusses the details and operation of the EVM software.

NOTE: For configuration of the codec, the TLV320AIC3101 block diagram located in the

TLV320AIC3101 data sheet (SLAS520) is a good reference to help determine the signal

routing.

4.1 Device Selection for Operation With AIC3101EVM

The software that is installed provides operation for several devices. An initial window should appear that

looks like Figure 3. For operation with the TLV320AIC3101EVM, the user should select AIC3101 from the

pull-down menu and click Accept. The software will take a few seconds to configure the software for

operation before proceeding. A progress bar should appear and show the status of the configuration.

Figure 3. Device Selection Window

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4.2 Front Page Indicators and Functions

Figure 2 illustrates the main screen of the EVM software. The indicators and buttons located above the

tabbed section of the front page are visible regardless of which tab is currently being selected.

At the top left of the screen is an Interface indicator. This indicator shows which interface is selected for

controlling the TLV320AIC3101, either I2C or SPI.

To the right of the Interface indicator is a group box called Firmware. This box indicates where the

firmware being used is operating from—in this release, the firmware is on the USB-MODEVM, so the user

should see USB-MODEVM in the box labeled Located On:. The version of the firmware appears in the

Version box below this.

To the right, the next group box contains controls for resetting the TLV320AIC3101. A software reset can

be done by writing to a register in the TLV320AIC3101, and this is accomplished by pushing the button

labeled Software Reset. The TLV320AIC3101 also may be reset by toggling a pin on the

TLV320AIC3101, which is done by pushing the Hardware Reset button.

CAUTION

In order to perform a hardware reset, the RESET jumper (JMP19) must be

installed, and SW2–7 on the USB-MODEVM Interface Board must be turned

OFF. Failure to do either of these steps results in not generating a hardware

reset or causing unstable operation of the EVM, which may require cycling

power to the USB-MODEVM Interface Board.

Below the Firmware box, the Device Connected LED should be green when the EVM is connected. If the

indicator is red, the EVM is not properly connected to the PC. Disconnect the EVM and verify that the

drivers were correctly installed; then reconnect and try restarting the software.

On the upper right portion of the screen, several indicators are located which provide the status of various

portions of the TLV320AIC3101. These indicators are activated by pressing the Indicator Updates button

below the Device Connected LED. These indicators, as well as the other indicators on this panel, are

updated only when the software's front panel is inactive, once every 20 ms.

The ADC Overflow and DAC Overflow indicators light when the overflow flags are set in the

TLV320AIC3101. Below these indicators are the AGC Noise Threshold Exceeded indicators that show

when the AGC noise threshold is exceeded. To the far right of the screen, the Short Circuit Detect

indicators show when a short-circuit condition is detected, if this feature has been enabled. Below the

short-circuit indicators, the AGC Gain Applied indicators use a bar graph to show the amount of gain

which has been applied by the AGC, and indicators that light when the AGC is saturated.

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4.3 Preset Configuration Tab

The Preset Configuration tab (Figure 4) provides several different preset configurations of the codec. The

Preset Configurations buttons allow the user to choose from the provided defaults. When the selection is

made, the Preset Configuration Description shows a summary of the codec setup associated with the

choice made. If the choice is acceptable, the Load button can be pressed, and the preset configuration is

loaded into the codec. The user can select the Command Line Interface tab (see Figure 27) to view the

actual settings that were programmed into the codec.

Figure 4. Default Configuration Tab

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4.4 Audio Input/ADC Tab

The Audio Input/ADC tab allows control of the analog input mixer and the ADC. The controls are

displayed to look similar to an audio mixing console (see Figure 5).

Figure 5. Audio Input/ADC Tab

Each analog input channel has a vertical strip that corresponds to that channel. By default, all inputs are

muted when the TLV320AIC3101 is powered up.

To route an analog input to the ADC:

1. Select the Input Mode button to correctly show if the input signal is single-ended (SE) or fully-

differential (Diff). Inputs that are single-ended should be made to the positive signal terminal.

2. Click on the button of the analog input channel that corresponds to the correct ADC. The caption of the

button should change to Active. Note that the user can connect some channels to both ADCs, whereas

others can only connect to one ADC.

3. Adjust the Level control to the desired attenuation for the connected channel. This level adjustment

can be done independently for each connection.

The TLV320AIC3101 offers a programmable microphone bias that can either be powered down or set to

2.0 V, 2.5 V, or the power supply voltage of the ADC (AVDD_ADC). Control of the microphone bias (mic

bias) voltage is accomplished by using the Mic Bias pull-down menu button above the last two channel

strips. To use the onboard microphone, JMP2 and JMP3 must be installed and nothing should be plugged

into J6. In order for the mic bias settings in the software to take effect, JMP1 should be set to connect

positions 2 and 3, so that mic bias is controlled by the TLV320AIC3101.

In the upper right portion of this tab are controls for Weak Common Mode Bias. Enabling these controls

results in unselected inputs to the ADC channels to be weakly biased to the ADC common mode voltage.

Below these controls are the controls for the ADC PGA, including the master volume controls for the ADC

inputs. Each channel of the ADC can be powered up or down, as needed, using the Powered Up buttons.

PGA soft-stepping for each channel is selected using the pull-down menu control. The two large knobs set

the actual ADC PGA Gain and allow adjustment of the PGA gains from 0 dB to 59.5 dB in 0.5-dB steps

(excluding Mute). At the extreme counterclockwise rotation, the channel is muted. Rotating the knob

clockwise increases the PGA gain, which is displayed in the box directly above the volume control.

SLAU219A–August 2007–Revised January 2014 TLV320AIC3101EVM and TLV320AIC3101EVM-PDK

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4.5 Bypass Paths Tab

The Bypass Paths tab (Figure 6)shows the active and passive bypass paths available for control.

Figure 6. Bypass Paths

The passive analog bypass paths allow the inputs to be routed straight through the device to the outputs

without turning on any of the internal circuitry. This provides a signal path through the device with minimal

power consumption.

The active bypass paths allow the inputs to bypass the ADC and DAC functional blocks and be routed to

the analog output mixers to be summed into the output amplifiers.

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4.6 Audio Interface Tab

The Audio Interface tab (Figure 7) allows configuration of the audio digital data interface to the

TLV320AIC3101.

Figure 7. Audio Interface Tab

The interface mode can be selected using the Transfer Mode control—selecting either I2S mode, DSP

mode, or Right- or Left-Justified modes. Word length can be selected using the Word Length control, and

the bit clock rate also can be selected using the Bit Clock rate control. The Data Word Offset, used in

TDM mode (see the TLV320AIC3101 data sheet, SLAS520) also can be selected on this tab.

Along the bottom of this tab are controls for choosing the BCLK and WCLK as either inputs or outputs.

With the codec configured in Slave mode, both the BCLK and WCLK are set to inputs. If the codec is in

Master mode, then BCLK and WCLK are configured as outputs. Additionally, two buttons provide the

options for placing the DOUT line in a 3-state output mode when there is no valid data and transmitting

BCLK and WCLK when the codec is powered down.

Re-synchronization (labeled ReSync on the tab) of the audio bus is enabled using the controls in the

lower right corner of this screen. Re-synchronization is done if the group delay changes by more than

±FS/4 for the ADC or DAC sample rates (see the TLV320AIC3101 data sheet). The channels can be soft-

muted when doing re-synchronization if the Soft Mute button is enabled.

In the upper right corner of this tab is the Digital Mic Functionality control. The TLV320AIC3101 can

accept a data stream from a digital microphone, which would have its clock pin connected to the

TLV320AIC3101 GPIO1 pin, and the mic data connected to the GPIO2 pin. Once the digital microphone

functionality is enabled, the Digital Mic/ADC Selection selection allows the user to choose if one or two

digital microphones are connected to the codec. If only one digital microphone is connected, then the

SLAU219A–August 2007–Revised January 2014 TLV320AIC3101EVM and TLV320AIC3101EVM-PDK

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remaining ADC can be used with an analog input signal from the analog input pins. Refer to Section H.2

for a discussion of setting the GPI pin options. The TLV320AIC3101 can provide a modulator clock to the

digital microphone with over sampling ratios (OR) of 128, 64, or 32. For a detailed discussion of how to

connect a digital microphone on this platform, see the application report Using the Digital Microphone

Function on TLV320AIC3101 with AIC33EVM/USB-MODEVM System (SLAA275).

The default mode for the EVM is configured as 44.1 kHz, 16-bit, I2C words, and the codec is a slave

(BCLK and WCLK are supplied to the codec externally). For use with the PC software and the USB-

MODEVM Interface Board, the default settings should be used; no change to the software is required.

4.7 Clocks Tab

The TLV320AIC3101 provides a phase-locked loop (PLL) that allows flexibility in the clock generation for

the ADC and DAC sample rates. The Clocks tab contains the controls that can be used to configure the

TLV320AIC3101 for operation with a wide range of master clocks. See the Audio Clock Generation

Processing illustration in the TLV320AIC3101 data sheet (SLAS520) for further details on selecting the

correct clock settings.

For use with the PC software and the USB-MODEVM Interface Board, the clock settings must be set a

certain way. If the settings are changed from the default settings which allow operation from the USB-

MODEVM clock reference, the EVM settings can be restored automatically by pushing the Load EVM

Clock Settings button at the bottom of this tab. Note that changing any of the clock settings from the

values loaded when this button is pushed may result in the EVM not working properly with the PC

software or USB interface. If an external audio bus is used (audio not driven over the USB bus), then

settings can be changed to any valid combination. See Figure 8.

Figure 8. Clocks Tab

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4.7.1 Configuring Codec Clocks and Fsref Calculation

The codec clock source is chosen by the CODEC_CLK Source control. When this control is set to

CLKDIV_OUT, the PLL is not used; when set to PLLDIV_OUT, the PLL is used to generate the clocks.

NOTE: Per the TLV320AIC3101 data sheet (SLAS520), the codec should be configured to allow the

value of Fsref to fall between 39 kHz and 53 kHz.

4.7.1.1 Use Without PLL

Setting up the TLV320AIC3101 for clocking without using the PLL permits the lowest power consumption

by the codec. The CLKDIV_IN source can be selected as either MCLK,GPIO2, or BCLK; the default is

MCLK. The CLKDIV_IN frequency then is entered into the CLKDIV_IN box, in megahertz (MHz). The

default value shown, 11.2896 MHz, is the frequency used on the USB-MODEVM board. This value is

divided by the value of Q, which can be set from 2 to 17; the resulting CLKDIV_OUT frequency is shown

in the indicator next to the Qcontrol. The resultant frequency is shown as the Actual Fsref.

4.7.1.2 Use With PLL

When PLLDIV_OUT is selected as the codec clock source, the PLL is used. The PLL clock source is

chosen using the PLLCLK_IN control, and may be set to either MCLK,GPIO2, or BCLK. The PLLCLK_IN

frequency then is entered into the PLLCLK_IN Source box.

The PLL_OUT and PLLDIV_OUT indicators show the resulting PLL output frequencies with the values set

for the P, K, and R parameters of the PLL See the TLV320AIC3101 data sheet (SLAS520) for an

explanation of these parameters. The parameters can be set by clicking on the up/down arrows of the P,

K, and Rcombo boxes, or they can be typed into these boxes.

The values also can be calculated by the PC software. To use the PC software to find the ideal values of

P, K, and R for a given PLL input frequency and desired Fsref:

1. Verify that the correct reference frequency is entered into the PLLCLK_IN Source box in megahertz

(MHz).

2. The desired Fsref should be set using the Fsref switch.

3. Push the Search for Ideal Settings button. The software starts searching for ideal combinations of P,

K, and R which achieve the desired Fsref. The possible settings for these parameters are displayed in

the spreadsheet-like table labeled Possible Settings.

4. Click on a row in this table to select the P, K, and R values located in that row. Notice that when this is

done, the software updates the P, K, R, PLL_OUT, and PLLDIV_OUT readings, as well as the Actual

Fsref and Error displays. The values show the calculations based on the values that were selected.

This process does not actually load the values into the TLV320AIC3101; however, it only updates the

displays in the software. If more than one row exists, the user can choose the other rows to see which

of the possible settings comes closest to the ideal settings.

When a suitable combination of P, K, and R have been chosen, pressing the Load Settings into Device?

button downloads these values into the appropriate registers on the TLV320AIC3101.

4.7.1.3 Setting ADC and DAC Sampling Rates

The Fsref frequency that determines either enabling or bypassing the PLL (see Section 4.7.1.1 or

Section 4.7.1.2) is used to determine the actual ADC and DAC sampling rates. Using the NADC and

NDAC factors, the sampling rates are derived from the Fsref. If dual-rate mode is desired, this option can

be enabled for either the ADC or DAC by pressing the corresponding Dual Rate Mode button. The ADC

and DAC sampling rates are shown in the box to the right of each control.

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4.8 AGC Tab

The AGC tab (see Figure 9) consists of two identical sets of controls, one for the left channel and the

other for the right channel. The AGC function is described in the TLV320AIC3101 data sheet (SLAS520).

Figure 9. AGC Tab

The AGC can be enabled for each channel using the Enable AGC button. Target gain, Attack time in

milliseconds, Decay time in milliseconds, and the Maximum PGA Gain Allowed can all be set,

respectively, using the four corresponding knobs in each channel.

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The TLV320AIC3101 allows for the Attack and Decay times of the AGC to be set up in two different

modes: standard and advanced. The Left/Right AGC Settings button determines the mode selection.

The Standard mode provides several preset times that can be selected by adjustments made to the

Attack and Decay knobs. If finer control over the times is required, then the Advanced mode is selected

to change the settings. When the Advanced mode is enabled, two tabs should appear that allow separate,

advanced control of the Attack and Delay times of the AGC (see Figure 10 and Figure 11). These options

allow selection of the base time as well as a multiplier to achieve the actual times shown in the

corresponding text box. The Use advanced settings? button should be enabled to program the registers

with the correct values selected via the pull-down options for base time and multiplier.

Figure 10. Left AGC Settings

Figure 11. Advanced

Noise gate functions, such as Hysteresis,Enable Clip stepping,Threshold (dB),Signal Detect

Debounce (ms), and Noise Detect Debounce (ms) are set using the corresponding controls in the

Noise Gate group box for each channel.

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4.9 Filters Tab

The TLV320AIC3101 has an advanced feature set for applying digital filtering to audio signals. This tab

controls all of the filter features of the TLV320AIC3101. In order to use this tab and have plotting of filter

responses correct, the DAC sample rate must be set correctly. Therefore, the clocks must be set up

correctly in the software following the discussion in Section 4.7. See Figure 12.

Figure 12. Filters Tab

The AIC3101 digital filtering is available to both the ADC and DAC. The ADC has optional high-pass

filtering and allows the digital output from the ADC through digital effects filtering before exiting the codec

through the PCM interface. Likewise, the digital audio data can be routed through the digital effects

filtering before passing through the optional de-emphasis filter before the DAC. The digital effects filtering

can only be connected to either the ADC or DAC, not both at the same time.

The Filter tab (Figure 12) is divided into several areas. The left side of the tab is used to select between

the DAC or ADC filters and assist in the selection and calculation of the desired filter coefficients. The right

side of the tab shows a frequency response plot of the digital effects filter selected and the coefficients

that are programmed into the device. The plots show the magnitude and phase response of each biquad

section, plus the combined responses of the two biquad filters. Note that the plot shows only the

responses of the effect filters, not the combined response of those filters along with the de-emphasis and

ADC high-pass filters.

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4.9.1 ADC Filters

4.9.1.1 High-Pass Filter

The TLV320AIC3101 ADC provides the option of enabling a high-pass filter, which helps to reduce the

effects of DC offsets in the system. The tab in Figure 13 shows the options for programming various filters

associated with the ADC. The high-pass filter has two modes: standard and programmable.

Figure 13. ADC High-Pass Filters

The standard high-pass filter option (Figure 14) allows for the selection of the high-pass filter frequency

from several preset options that can be chosen with the Left ADC HP Filter and Right ADC HP Filter

controls. The four options for this setting are disabled, or three different corner frequencies which are

based on the ADC sample rate.

Figure 14. ADC High-Pass Filter Settings

For custom filter requirements, the programmable function allows custom coefficients to achieve a

different filter than provided by the preset filters. The controls for the programmable high-pass filter are

located under the Programmable Filters heading. The process is described in the following steps:

1. Enter the filter coefficients in the HP Filter controls near the bottom of the tab.

2. Press the Download Coefficients button to download the coefficients to the codec registers.

3. Enable the Programmable High-Pass Filters by selecting the Left ADC and Right ADC buttons.

The programmable high-pass filter should now be correctly programmed and enabled. The ADC can be

enabled with the high-pass filter.

4.9.1.2 Digital Effects Filter - ADC

The ADC digital outputs stream can be routed through the digital effects filter in the codec to allow custom

audio performance. The digital effects filter cannot operate on both the ADC or DAC at the same time.

The digital effects filter operation is discussed in Section 4.9.3.

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4.9.2 DAC Filters

The DAC Filters tab is illustrated in Figure 15.

Figure 15. DAC Filters

4.9.2.1 De-emphasis Filters

The de-emphasis filters used in the TLV320AIC3101 can be programmed as described in the

TLV320AIC3101 data sheet (SLAS520), using the tab shown in Figure 16. Enter the coefficients for the

de-emphasis filter response desired. While on this tab, the de-emphasis response is shown on the Effect

Filter Response graph; however, note that this response is not included in graphs of other effect

responses when on the other filter design tabs.

Figure 16. De-emphasis Filters

4.9.2.2 DAC Digital Effects Filter

The digital audio input stream can be routed through the digital effects filter in the codec before routing to

the DAC to allow custom audio performance. The digital effects filter cannot operate on both the ADC or

DAC at the same time. The digital effects filter operation is discussed in Section 4.9.3.

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4.9.3 Digital Effects Filters

The digital effect filters (the biquad filters) of the TLV320AIC3101 are selected using the check boxes

shown in Figure 17. The De-emphasis filters are described in the TLV320AIC3101 data sheet (SLAS520),

and their coefficients can be changed (see Figure 15).

Figure 17. Enabling Filters

When designing filters for use with TLV320AIC3101, the software allows for several different filter types to

be used. These options are shown on a tab control in the lower left corner of the screen. When a filter

type is selected and suitable input parameters defined, the response is shown in the Effect Filter

Response graph. Regardless of the setting for enabling the Effect Filter, the filter coefficients are not

loaded into the TLV320AIC3101 until the Download Coefficients button is pressed. To avoid noise during

the update of coefficients, it is recommended that the user uncheck the Effect Filter enable check boxes

before downloading coefficients. Once the desired coefficients are in the TLV320AIC3101, enable the

Effect Filters by checking the boxes again.

4.9.3.1 Shelf Filters

A shelf filter is a simple filter that applies a gain (positive or negative) to frequencies above or below a

certain corner frequency. As shown in Figure 18, in Bass mode a shelf filter applies a gain to frequencies

below the corner frequency; in Treble mode the gain is applied to frequencies above the corner frequency.

Figure 18. Shelf Filters

To use these filters, enter the gain desired and the corner frequency. Choose the mode to use (Bass or

Treble); the responses are plotted on the Effect Filter Response graph.

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4.9.3.2 EQ Filters

EQ, or parametric, filters can be designed on this tab (see Figure 19). Enter a gain, bandwidth, and a

center frequency (Fc). Either bandpass (positive gain) or band-reject (negative gain) filters can be created

Figure 19. EQ Filters

4.9.3.3 Analog Simulation Filters

Biquads are good at simulating analog filter designs. For each biquad section on this tab, enter the

desired analog filter type to simulate (Butterworth, Chebyshev, Inverse Chebyshev, Elliptic, or Bessel).

Parameter entry boxes appropriate to the filter type are shown (ripple, for example, with Chebyshev filters,

and so forth). Enter the desired design parameters and the response is shown. (See Figure 20.)

Figure 20. Analog Simulation Filters

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4.9.3.4 Preset Filters

Many applications are designed to provide preset filters common for certain types of program material.

The tab in Figure 21 allows selection of one of four preset filter responses - Rock, Jazz, Classical, or Pop.

Figure 21. Preset Filters

4.9.3.5 User Filters

If filter coefficients are known, they can be entered directly on the tab shown in Figure 22 for both biquads

for both left and right channels. The filter response does not show on the Effect Filter Response graph for

user filters.

Figure 22. User Filters

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4.9.3.6 3-D Effect

The 3-D effect is described in the TLV320AIC3101 data sheet (SLAS520). It uses the two biquad sections

differently than most other effect filter settings. To use this effect properly, ensure that the appropriate

coefficients are already loaded into the two biquad sections. The User Filters tab may be used to load the

coefficients. See Figure 23.

Figure 23. 3-D Effect Settings

To enable the 3-D effect, check the 3-D Effect On box. The Depth knob controls the value of the 3-D

Attenuation Coefficient.

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4.10 Output Stage Configuration Tab

The Output Stage Configuration tab (Figure 24) allows for setting various features of the output drivers.

Figure 24. Output Stage Configuration Tab

The Configuration control may be set as either Fully Differential or Pseudo-Differential. This control

determines if the output stage is being used to drive a fully differential output load or a output load where

one of the outputs is referenced to a common-mode voltage (pseudo-differential).

The output Coupling control can be chosen as either Capless or AC-coupled. This setting should

correspond to the setting of the hardware switch (SW1) on the TLV320AIC3101EVM.

The common-mode voltage of the outputs can be set to 1.35 V, 1.5 V, 1.65 V, or 1.8 V using the

Common Mode Voltage control.

The TLV320AIC3101 offers several options to help reduce the turnon/off pop of the output amplifiers. The

Power-On Delay of the output drivers can be set using the corresponding control from 0 μs up to 4 s.

Ramp-Up Step Timing also can be adjusted from 0 ms to 4 ms. The outputs can be set to soft-step their

volume changes, using the Output Volume Soft Stepping control, and set to step once per Fs period,

once per two Fs periods, or soft-stepping can be disabled altogether.

The high-power outputs of the TLV320AIC3101 can be configured to go to a weak common-mode voltage

when powered down. The source of this weak common-mode voltage can be set on this tab with the

Weak Output CM Voltage Source drop-down. Choices for the source are either a resistor divider off the

AVDD_DAC supply, or a bandgap reference. See the TLV320AIC3101 data sheet for more details on this

option.

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Headset detection features are enabled using the Enable button in the Headset Detection group box.

When enabled, the indicators in the HS/Button Detect group box light when either a button press or

headset is detected. When a headset is detected, the type of headset is displayed in the Detection Type

indicator. Debounce times for detection are set using the Jack Detect Debounce and Button Press

Debounce controls, which offer debounce times in varying numbers of milliseconds. See the

TLV320AIC3101 data sheet (SLAS520) for a discussion of headset detection.

Output short-circuit protection can be enabled in the Short Circuit Protection group box. The short-circuit

protection function can use a current-limit mode, where the drivers limit current output if a short-circuit

condition is detected, or in a mode where the drivers power down when such a condition exists.

The I2C Bus Error Detection button allows the user to enable circuitry which sets a register bit (register

107, D0) if an I2C bus error is detected.

28 TLV320AIC3101EVM and TLV320AIC3101EVM-PDK SLAU219A–August 2007–Revised January 2014

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l TEXAS INSTRUMENTS n. {I} Tums hamuMu-‘r: V320AIC3101EVM Evaluation Tool my!“ W, «mm Ohiovwbw we.“ m. xzc . Rm m . mt . mom 0 Mom 0 w”. m“ mcw . mom . 5" . a... M . 7. r 2 _ hccmgzwsmuExch ﬁGCGanW 7 WM “w“ '“‘ L- - Mam“. Imam” “Mum?” ‘ WC 0 met 0 R - _ cmmﬂ m. mm" m m mum mg“ m on” off 4m.) v off (mu) v m; 4) ’ m2: ’ van} 4) 'm. mg Wm»: ‘ WWW 1 mum. ‘ cm \ m ‘ m, “MW, ‘Wmmwm 1 mmmms ‘ weszzcmwmn 1m we Mmr 3‘5 20") mg: mm m m m mm; m: v mm m Pwed L» m m mg U 0mm: mm m m mam m: 4‘ as we now '7 3m m m:

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TLV320AIC3101EVM Software

4.11 DAC/Line Outputs Tab

The DAC/Line Outputs tab controls the DAC power and volume, as well as the routing of digital data to

the DACs and the analog line output from the DACs. (See Figure 25.)

Figure 25. DAC/Line Outputs Tab

4.11.1 DAC Controls

On the left side of this tab are controls for the left and right DACs.

Similar to the ADC controls, the DAC controls are set up to allow powering of each DAC individually and

setting the output level. Each channel's level can be set independently using the corresponding Volume

knob. Alternately, by checking the Slave to Right box, the left-channel Volume can be made to track the

right-channel Volume knob setting; checking the Slave to Left box causes the right-channel Volume knob

to track the left-channel Volume knob setting.

Data going to the DACs is selected using the drop-down boxes under the Left and Right DAC Datapath.

Each DAC channel can be selected to be off, use left-channel data, use right-channel data, or use a mono

mix of the left and right data.

Analog audio coming from the DACs is routed to outputs using the Output Path controls in each DAC

control panel. The DAC output can be mixed with the analog inputs (LINE2L, LINE2R, PGA_L, PGA_R)

and routed to the Line or High Power outputs using the mixer controls for these outputs on this tab (for the

line outputs) or on the High Power Outputs tab (for the high-power outputs). If the DAC is to be routed

directly to either the Line or HP outputs, these can be selected as choices in the Output Path control.

Note that if the Line or HP outputs are selected as the Output Path, the mixer controls on this tab and the

High Power Outputs tab have no effect.

SLAU219A–August 2007–Revised January 2014 TLV320AIC3101EVM and TLV320AIC3101EVM-PDK

l TEXAS INSTRUMENTS

TLV320AIC3101EVM Software

www.ti.com

4.11.2 Line Output Mixers

On the right side of this tab are horizontal panels where the analog output mixing functions for the line

outputs are located.

Each line output master volume is controlled by the knob at the far right of these panels, below the line

output labels. The output amplifier gain can be muted or set at a value between 0 dB and 9 dB in 1-dB

steps. Power/Enabled status for the line output also can be controlled using the button below this master

output knob (Powered Up).

If the DAC Output Path control is set to Mix with Analog Inputs, the six knobs in each panel can be used

to set the individual level of signals routed and mixed to the line output. LINE2L, LINE2R, PGA_L, PGA_R,

DAC_L, and DAC_R levels can each be set to create a custom mix of signals presented to that particular

line output. Note: if the DAC Output Path control is set to anything other than Mix with Analog Inputs,

these controls have no effect.

30 TLV320AIC3101EVM and TLV320AIC3101EVM-PDK SLAU219A–August 2007–Revised January 2014

Submit Documentation Feedback

l TEXAS INSTRUMENTS FI-“M “m m... w, m. 32.. 5“ 0 3:” mun—m {1618!me mam"... ALIA] TLVJZOAIC 3101EVM Evaluahon Tool mm wowm gunman m. m: . MW. W O «a: . M . mcw Q W0". hammemExmo “BMW ”5:. Mac. L- - \ R- — Ctr-Ind u. Mum mm!“ ‘ Hams?!” 1mm” mm m: ‘ans ”mum‘s ‘ Wﬂaandwanw Rowan-w; ‘Wcmwm 0 um um mu m} m; mu MM man» 3 Us WWW d d d d d 55):: (mm) gum 5AM“ gum gm; JM "1; 5; “(ZR W) PU} M) F‘cwzvem‘r ,,’ mm mm WWW mmmm f d J d d d (:va 'v/me 31m: We gum 9m: um m m): mg mm M; 7' MW (m WWW WM” V [J «J a a (Em 1) m Arm ,3 m 11m. ma mcm mu mg pm.“ g D WWW d d J (Em. 1m. Jim gm 3mm:

www.ti.com

TLV320AIC3101EVM Software

4.12 High Power Outputs Tab

The tab shown in Figure 26, contains four horizontal groupings of controls, one for each of the high-power

outputs. Each output has a mixer to mix the LINE2L, LINE2R, PGA_L, PGA_R, DAC_L, and DAC_R

signals, assuming that the DACs are not routed directly to the high-power outputs (see Section 4.11).

Figure 26. High-Power Outputs Tab

At the left of each output strip is a Powered Up button that controls whether or not the corresponding

output is powered up. The When Powered Down button allows the outputs to be placed in a 3-state

output mode or driven weakly to the output common-mode voltage.

The HPxCOM outputs (HPLCOM and HPRCOM) can be used as independent output channels or can be

used as complementary signals to the HPLOUT and HPROUT outputs. In these complementary

configurations, the HPxCOM outputs can be selected as Differential of HPxOUT signals to the

corresponding outputs or may be set to be a common-mode voltage (Constant VCM Out). When used in

these configurations, the Powered Up button for the HPxCOM output is disabled, as the power mode for

that output tracks the power status of the HPL or HPR output that the COM output is tracking.

The HPRCOM Config selector allows a couple of additional options compared to the HPLCOM Config

selector. Differential of HPLCOM allows the HPRCOM to be the complementary signal of HPLCOM for

driving a differential load between the HPxCOM outputs. The selector also allows Ext.

Feedback/HPLCOM constant VCM as an option. This option is used when the high-power outputs are

configured for Capless output drive, where HPLCOM is configured as Constant VCM Out. The feedback

option provides feedback to the output and lowers the output impedance of HPLCOM.

At the right side of the output strip is a master volume knob for that output, which allows the output

amplifier gain to be muted or set from 0 dB to 9 dB in 1-dB steps.

SLAU219A–August 2007–Revised January 2014 TLV320AIC3101EVM and TLV320AIC3101EVM-PDK

l TEXAS INSTRUMENTS u uxonh 1mm m , ,1: Nay {I} [FXAS INSTRUMENTS T V370AIC3101EVM Evaluation Tool mm m. m.“ Ax cm m M». 9m (mm Dean m 0 at?" Le" . x... . mom . Mom 0 :91. Vlvm mm m... m . mm . mic“ . MW" . www.mamw Axukwhd om. (ml-d — usn W m. - 7 b1 mu m m L - mm»... mm,” “W 0 ”6C 0 ‘ _- _ Mum/AM \ amaswum j Mvimafaie \ 0006 \ gs: \ ram \ DM/Lmomvutx { wwwcwmw j umpmomuu j nzsetcamwamm cmm m“. (mm mm W 'W M“ (as . 2 ‘ J m. Cum-m1 mm Mm E] J mg m. m mm mm I ﬁx am am on f‘ 12: imﬂ Nude ﬁKFhIW WdMestud r an 5 mm an.» 1) 1 r 351 m means Mews r me new (Ward M.»

TLV320AIC3101EVM Software

www.ti.com

4.13 Command Line Interface Tab

A simple scripting language controls the TAS1020 on the USB-MODEVM Interface Board from the

LabVIEW™ based PC software. The main program controls, described previously, simply write a script

which is handed off to an interpreter that sends the appropriate data to the correct USB endpoint. Because

this system is script-based, provision is made in this tab for the user to view the scripting commands

created as the controls are manipulated, as well as load and execute other scripts that have been written

and saved (see Figure 27). This design allows the software to be used as a quick test tool or to help

provide troubleshooting information in the rare event that the user encounters a problem with this EVM.

Figure 27. Command Line Interface Tab

A script is loaded into the command buffer, either by operating the controls on the other tabs or by loading

a script file. When executed, the return packets of data which result from each command are displayed in

the Read Data array control. When executing several commands, the Read Data control shows only the

results of the last command. To see the results after every executed command, use the logging function

that appears in the File menu.

The File menu (Figure 28) provides some options for working with scripts. The first option, Open

Command File..., loads a command file script into the command buffer. This script then can be executed

by pressing the Execute Command Buffer button.

The second option is Log Script and Results..., which opens a file save dialog box. Choose a location for a

log file to be written using this file save dialog. When the Execute Command Buffer button is pressed,

the script runs and the script, along with resulting data read back during the script, is saved to the file

specified. The log file is a standard text file that can be opened with any text editor and looks much like

the source script file, but with the additional information of the result of each script command executed.

32 TLV320AIC3101EVM and TLV320AIC3101EVM-PDK SLAU219A–August 2007–Revised January 2014

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l TEXAS INSTRUMENTS Help Open Command File... Log Script and Results... Recently Opened Files... D

www.ti.com

TLV320AIC3101EVM Software

The third menu item is a submenu of Recently Opened Files. This is simply a list of script files that have

previously been opened, allowing fast access to commonly used script files. The final menu item is Exit,

which terminates the TLV320AIC3101EVM software.

Figure 28. File Menu

Under the Help menu is an About... menu item which displays information about the TLV320AIC3101EVM

software.

The actual USB protocol used as well as instructions on writing scripts are detailed in the following

subsections. Although it is unnecessary to understand or use either the protocol or the scripts directly,

understanding them can be helpful to some users.

SLAU219A–August 2007–Revised January 2014 TLV320AIC3101EVM and TLV320AIC3101EVM-PDK

l TEXAS INSTRUMENTS www.5amtec.com

www.ti.com

Appendix A EVM Connector Descriptions

This appendix contains the connection details for each of the main header connectors on the EVMs.

A.1 Analog Interface Connectors

A.1.1 Analog Dual-Row Header Details (J13 and J14)

For maximum flexibility, the TLV320AIC3101EVM is designed for easy interfacing to multiple analog

sources. Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-

pin, dual-row header/socket combination at J13 and J14. These headers/sockets provide access to the

analog input and output pins of the device. Consult Samtec at www.samtec.com or call 1-800-SAMTEC-9

for a variety of mating connector options. Table 5 summarizes the analog interface pinout for the

TLV320AIC3101EVM.

Table 5. Analog Interface Pinout

PIN NUMBER SIGNAL DESCRIPTION

J1.1 HPLCOM High-power output driver (left minus or multifunctional)

J1.2 HPLOUT High-power output driver (left plus)

J1.3 HPRCOM High-power output driver (right minus or multifunctional)

J1.4 HPROUT High-power output driver (right plus)

J1.5 LINE1LM MIC1 or LINE1 analog input (left minus or multifunctional)

J1.6 LINE1LP MIC1 or LINE1 analog input (left plus or multifunctional)

J1.7 LINE1RM MIC1 or LINE1 analog input (right minus or multifunctional)

J1.8 LINE1RP MIC1 or LINE1 analog input (right plus or multifunctional)

J1.9 AGND Analog ground

J1.10 MIC3L MIC3 input (left or multifunctional)

J1.11 AGND Analog ground

J1.12 MIC3R MIC3 input (right or multifunctional)

J1.13 AGND Analog ground

J1.14 MICBIAS Microphone bias voltage output

J1.15 NC Not connected

J1.16 MICDET Microphone detect

J1.17 AGND Analog ground

J1.18 NC Not connected

J1.19 AGND Analog ground

J1.20 NC Not connected

J2.1 LINE2RM MIC2 or LINE2 analog input (right minus or multifunctional)

J2.2 LINE2RP MIC2 or LINE2 analog input (right plus or multifunctional)

J2.3 LINE2LM MIC2 or LINE2 analog input (left minus or multifunctional)

J2.4 LINE2RP MIC2 or LINE2 analog input (left plus or multifunctional)

J2.5 NC Not connected

J2.6 NC Not connected

J2.7 LEFT_LOP Left line output (plus)

J2.8 LEFT_LOM Left line output (minus)

J2.9 AGND Analog ground

J2.10 RIGHT_LOP Right line output (plus)

J2.11 AGND Analog ground

J2.12 RIGHT_LOM Right line output (minus)

J2.13 AGND Analog ground

J2.14 NC Not connected

J2.15 NC Not connected

J2.16 NC Not connected

J2.17 AGND Analog ground

34 EVM Connector Descriptions SLAU219A–August 2007–Revised January 2014

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l TEXAS INSTRUMENTS

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Analog Interface Connectors

Table 5. Analog Interface Pinout (continued)

PIN NUMBER SIGNAL DESCRIPTION

J2.18 NC Not connected

J2.19 AGND Analog ground

J2.20 NC Not connected

A.1.2 Analog Screw Terminal Details (J1-5 and J8-12)

In addition to the analog headers, the analog inputs and outputs also can be accessed through alternate

connectors, either screw terminals or audio jacks. The stereo microphone input also is tied to J8 and the

stereo headphone output (the HP set of outputs) is available at J9.

Table 6 summarizes the screw terminals available on the TLV320AIC3101EVM.

Table 6. Alternate Analog Connectors

DESIGNATOR PIN 1 PIN 2 PIN 3

J6 IN1LP IN1LM AGND

J14 IN1RP IN1RM

J7 AGND IN2R IN2L

J10 LEFT OUT + LEFT OUT –

J11 RIGHT OUT + RIGHT OUT –

J12 AGND (–) HPLCOM (+) HPLOUT

J13 AGND (–) HPRCOM (+) HPROUT

SLAU219A–August 2007–Revised January 2014 EVM Connector Descriptions

l TEXAS INSTRUMENTS www.5amtec.c0m

Digital Interface Connectors (J4 and J5)

www.ti.com

A.2 Digital Interface Connectors (J4 and J5)

The TLV320AIC3101EVM is designed to easily interface with multiple control platforms. Samtec part

numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin, dual-row

header/socket combination at J4 and J5. These headers/sockets provide access to the digital control and

serial data pins of the device. Consult Samtec at www.samtec.com or call 1-800- SAMTEC-9 for a variety

of mating connector options. Table 7 summarizes the digital interface pinout for the TLV320AIC3101EVM.

Table 7. Digital Interface Pinout

PIN NUMBER SIGNAL DESCRIPTION

J4.1 NC Not connected

J4.2 GPIO1 General-purpose input/output No. 1

J4.3 SCLK SPI serial clock

J4.4 DGND Digital ground

J4.5 NC Not connected

J4.6 GPIO2 General-purpose input/output No. 2

J4.7 SS SPI chip select

J4.8 RESET INPUT Reset signal input to AIC33EVM

J4.9 NC Not connected

J4.10 DGND Digital ground

J4.11 MOSI SPI MOSI slave serial data input

J4.12 SPI SELECT Select pin (SPI vs I2C control mode)

J4.13 MISO SPI MISO slave serial data output

J4.14 AIC33 RESET Reset

J4.15 NC Not connected

J4.16 SCL I2C serial clock

J4.17 NC Not connected

J4.18 DGND Digital ground

J4.19 NC Not connected

J4.20 SDA I2C serial data input/output

J5.1 NC Not connected

J5.2 NC Not connected

J5.3 BCLK Audio serial data bus bit clock (input/output)

J5.4 DGND Digital ground

J5.5 NC Not connected

J5.6 NC Not connected

J5.7 WCLK Audio serial data bus word clock (input/output)

J5.8 NC Not connected

J5.9 NC Not connected

J5.10 DGND Digital ground

J5.11 DIN Audio serial data bus data input (input)

J5.12 NC Not connected

J5.13 DOUT Audio serial data bus data output (output)

J5.14 NC Not connected

J5.15 NC Not connected

J5.16 SCL I2C serial clock

J5.17 MCLK Master clock input

J5.18 DGND Digital ground

J5.19 NC Not connected

J5.20 SDA I2C serial data input/output

36 EVM Connector Descriptions SLAU219A–August 2007–Revised January 2014

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l TEXAS INSTRUMENTS

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Power Supply Connector Pin Header, J3

Note that J5 comprises the signals needed for an I2S serial digital audio interface; the control interface (I2C

and RESET) signals are routed to J4. I2C is actually routed to both connectors; however, the device is

connected only to J4.

A.3 Power Supply Connector Pin Header, J3

J3 provides connection to the common power bus for the TLV320AIC3101EVM. Power is supplied on the

pins listed in Table 8.

Table 8. Power Supply Pinout

SIGNAL PIN NUMBER SIGNAL

NC J3.1 J3.2 NC

+5VA J3.3 J3.4 NC

DGND J3.5 J3.6 AGND

DVDD (1.8V) J3.7 J3.8 NC

IOVDD (3.3V) J3.9 J3.10 NC

The TLV320AIC3101EVM-PDK motherboard (the USB-MODEVM Interface Board) supplies power to J3 of

the TLV320AIC3101EVM. Power for the motherboard is supplied either through its USB connection or via

terminal blocks on that board.

SLAU219A–August 2007–Revised January 2014 EVM Connector Descriptions

l TEXAS INSTRUMENTS ’9 Texas INSTRUMENTS

1 2 3 4 5 6

54321

Revision History

REV ECN Number Approved

6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA

TITLE

SHEET OF FILE

SIZE DATE REV29-Nov-2006

DRAWN BY

ENGINEER

DATA ACQUISITION PRODUCTS

HIGH PERFORMANCE ANALOG DIVISION

SEMICONDUCTOR GROUP

BOB BENJAMIN

RICK DOWNS

1 2

TLV320AIC3101EVM

DVDD

2.7K

2.2K

SJ1-3515-SMT

C18

0.1uF

C13

10uF

JMP10

MIC BIAS SEL

+3.3VA

TP14

AVSS

TP5

MICBIAS

C14

10uF

DOCUMENT CONTROL NO.

DOUT

DIN

WCLK

BCLK

MCLK

IOVDD

C22

47uF

C21 47uF

MK1

MD9745APZ-F

EXT MIC IN

MICROPHONE

6487259

C20

10uF

IOVDD

SW1

ESW_EG4208

0.1uF

C11

0.1uF

C10

0.1uF

J10

LEFT OUT

J11

RIGHT OUT

PLUS

MINUS

PLUS

MINUS

TP15

RESET

TP10

DIN

TP11

WCLK

TP9

DOUT

TP12

BCLK

TP13

MCLK

TP8

IN2R

TP20

HPLOUT

TP19

HPROUT

TP26

HPRCOM

TP23

RIGHT+

TP22

LEFT-

TP24

RIGHT-

TP27

LEFT+

TP16

SCL

TP17

SDA

TP21

DRVSS

TP25

HPLCOM

2.7K

HEADSET OUTPUT

C17

C15

SDA

C12

0.1uF

10uF

1 2

JMP8

1 2

JMP7

1 2

JMP5

JMP6

SCL

100K

RESET

AVDD_DAC

DRVDD

IN2L

IN2R

TP28

IN1RP

TP29

IN1RM

C19

0.1uF

2.2K

TP7

IN2L

C16

SJ1-3515-SMT

PLUS

MINUS

PLUS

MINUS

1 2

JMP12

HPCOM

IN2L

IN2R

HPLOUT

HPROUT

HPLCOM

HPRCOM

JMP4

JMP3 C15, C16, and C17

are not installed, but

can be used to filter

noise.

C27

0.1uF

C28

0.1uF

MICBIAS

IN1RP

IN1RM

LEFT_LOM

RIGHT_LOM

LEFT_LOP

RIGHT_LOP

IN2L

IN2R

J13

HPR OUT

J12

HPL OUT

C23

47uF

C24

47uF

C25

47uF

C26

47uF

1 2

JMP11

HPLOUT

1 2

JMP13

HPLCOM

1 2

JMP14

HPROUT

1 2

JMP15

HPRCOM

IN2

IN1L

IN1R

TP3

IN1LP

TP4

IN1LM

0.1uF

IN1LP

IN1LM

IN1L

J14

IN1R

IN1LP

IN1LM

IN2L

SCL

8SDA

DIN 4

DOUT 5

WCLK 3

MCLK 1

BCLK 2

RESET

IOVDD 7

DVDD 32

DVSS

DRVDD 18

AVDD_DAC 25

AVSS_DAC

DRVSS

AVSS_ADC

IN1RP

IN1RM

MICBIAS

HPLOUT 19

HPLCOM 20

HPROUT 23

HPRCOM 22

LEFT_LOP 27

LEFT_LOM 28

RIGHT_LOP 29

RIGHT_LOM 30

DRVDD 24

IN2R

TLV320AIC3101IRHB

TP30

FLP

TP31

FLC

TP32

FRP

TP33

FRC

C29

47nF

C30

47nF

C32

47nF

C31

47nF

R10

100

R11

100

R12

100

R13

100

C33

47nF

C34

47nF

C35

47nF

C36

47nF

R14

100

R15

100

R16

100

R17

100

www.ti.com

Appendix B TLV320AIC3101EVM Schematic

The schematic diagrams for the modular TLV320AIC3101EVM are illustrated in Figure 29 and Figure 30.

Figure 29. TLV320AIC3101EVM Schematic

38 TLV320AIC3101EVM Schematic SLAU219A–August 2007–Revised January 2014

Submit Documentation Feedback

l TEXAS INSTRUMENTS TEXAS INSTRUMENTS

1 2 3 4 5 6

54321

6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA

TITLE

SHEET OF FILE

SIZE DATE REV29-Nov-2006

DRAWN BY

ENGINEER

REVISION HISTORY

REV ENGINEERING CHANGE NUMBER APPROVED

DATA ACQUISITION PRODUCTS

HIGH-PERFORMANCE ANALOG DIVISION

SEMICONDUCTOR GROUP

RICK DOWNS

BOB BENJAMIN

2 2

TLV320AIC3101EVM INTERFACE

DOCUMENT CONTROL NO. 6487259

GPIO0 2

DGND 4

GPIO1 6

GPIO2 8

DGND 10

GPIO3 12

GPIO4 14

SCL 16

DGND 18

SDA 20

CNTL

CLKX

CLKR

FSX

FSR

INT

TOUT

GPIO5

DAUGHTER-SERIAL

1 2

JMP1

A0(+) 2

A1(+) 4

A2(+) 6

A3(+) 8

A4 10

A5 12

A6 14

A7 16

REF- 18

REF+ 20

A0(-)

A1(-)

A2(-)

A3(-)

AGND

VCOM

AGND

DAUGHTER-ANALOG

GPIO0 2

DGND 4

GPIO1 6

GPIO2 8

DGND 10

GPIO3 12

GPIO4 14

SCL 16

DGND 18

SDA 20

CNTL

CLKX

CLKR

FSX

FSR

INT

TOUT

GPIO5

DAUGHTER-SERIAL

A0(+) 2

A1(+) 4

A2(+) 6

A3(+) 8

A4 10

A5 12

A6 14

A7 16

REF- 18

REF+ 20

A0(-)

A1(-)

A2(-)

A3(-)

AGND

VCOM

AGND

DAUGHTER-ANALOG

MCLK

BCLK

WCLK

DIN

DOUT

RESET

SDA

SCL

TP1

AGND

TP2

DGND

J1A (TOP) = SAM_TSM-110-01-L-DV-P

J1B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K

J4A (TOP) = SAM_TSM-110-01-L-DV-P

J4B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K

J2A (TOP) = SAM_TSM-110-01-L-DV-P

J2B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K

J5A (TOP) = SAM_TSM-110-01-L-DV-P

J5B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K

J3A (TOP) = SAM_TSM-105-01-L-DV-P

J3B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K

IN2L

IN2R

HPLOUT

HPROUT

HPLCOM

HPRCOM

DRVDD

AVDD_DAC

MICBIAS

IN1RM

IN1LM

IN1LP

LEFT_LOP

RIGHT_LOP

LEFT_LOM

RIGHT_LOM

+5VA

VIN

3VOUT 2

GND

REG1117-3.3

+5VA

10uF

0.1uF

10uF

+3.3VA

VCC

VSS

SDA 5

SCL 6

24AA64I/SN

0.1uF

IOVDD

2.7K

JMP2

1 2

JMP9

RESET

-VA 2

-5VA 4

AGND 6

VD1 8

+5VD 10

+VA

+5VA

DGND

+1.8VD

+3.3VD

DAUGHTER-POWER

IN1RP

TP6 TP18

DVDD

IOVDD

JMP16

IOVDD

www.ti.com

Appendix B

Figure 30. TLV320AIC3101EVM Schematic Interface

SLAU219A–August 2007–Revised January 2014 TLV320AIC3101EVM Schematic

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l TEXAS INSTRUMENTS on ma ﬁnémﬂfﬁmﬂ ‘ 3 965:2» m Egan»? r—‘ r.“ ”Eli” “‘PEJM,‘ 3‘ .~ I 93% 3%: ﬂ 333mm“ ﬂan :TLV320A|C3101EVM ¥ - in? mm WEXAS NSIRUMBHS -mEa-w “hm m g; m . a Mot-L P13“ «unnum- mums“ miﬂiﬁ)

www.ti.com

Appendix C TLV320AIC3101EVM Layout Views

The board layouts for the modular TLV320AIC3101EVM are illustrated in Figure 31 through Figure 36.

Figure 31. TLV320AIC3101EVM Assembly Layer

Figure 32. TLV320AIC3101EVM Top Layer

40 TLV320AIC3101EVM Layout Views SLAU219A–August 2007–Revised January 2014

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‘5‘ TEXAS INSTRUMENTS m 8888: 88883 m 88888 88888 88888 88888 88888 88888 O m m 0 U I .H. 00 o w 0 rx % r\ on 8888me m m mm 88888 8 cm W 88888 mo 88:8 8 8888 8 mo 88888 88888 0 o 0 ac o o o oo v00 00 000 000 00 8 000 000 00 OO

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Appendix C

Figure 33. TLV320AIC3101EVM Layer 3

Figure 34. TLV320AIC3101EVM Layer 4

SLAU219A–August 2007–Revised January 2014 TLV320AIC3101EVM Layout Views

l TEXAS INSTRUMENTS . . . I .. .0 .c n _ no 0.". . :. o u. . . . . ..-- o :: L.- ' :: -. J: == -' .55 95: E“ ' " can In. '3: : M ﬂ -- - - -- -- . - -- ‘ ‘ = '0 0' -- -- -- -- .. z: -- g.‘ --. -- 00 -- -- u .- o .0 a .. I- .... .. _ I. I . o - o .... . I... . . . t I. ...l O I u. . .. o .._ ' 35' ' a o 0 9a, . ' -- . -- . -- -— -- ° :: 0. .-- -- O -- -- . .-: -- - -- 3: -- . -- m -- [ [

Appendix C

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Figure 35. TLV320AIC3101EVM Silk Screen

Figure 36. TLV320AIC3101EVM Bottom Layer

42 TLV320AIC3101EVM Layout Views SLAU219A–August 2007–Revised January 2014

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Appendix D TLV320AIC3101EVM Bill of Materials

The complete bill of materials for the modular TLV320AIC3101EVM is provided in Table 9.

Table 9. TLV320AIC3101EVM Bill of Materials

Qty Value Ref Des Description Mfg Mfg Part No.

2 0 R7, R8 1/4W 5% Chip Resistor Panasonic ERJ-8GEY0R00V

8 100 R10-R17 1/10W 1% Chip Resistor Panasonic ERJ-3EKF1000V

2 2.2K R5, R6 1/4W 5% Chip Resistor Panasonic ERJ-8GEYJ222V

3 2.7K R1, R2, R3 1/10W 5% Chip Resistor Panasonic ERJ-3GEYJ272V

1 100K R9 1/10W 5% Chip Resistor Panasonic ERJ-3GEYJ104V

1 NI R4 Chip Resistor

8 47nF C29-C36 50V Ceramic Chip Capacitor, ±10%, X7R TDK C1608X7R1H473K

6 0.1μF C5, C6, C9-C12 16V Ceramic Chip Capacitor, ±10%, X7R TDK C1608X7R1C104K

6 0.1μF C7-C8, C18-C19, 100V Ceramic Chip Capacitor, ±10%, X7R TDK C3216X7R2A104K

C27-C28

7 10μF C1-C4, C13, C14, C20 6.3V Ceramic Chip Capacitor, ±10%, X5R TDK C3216X5R0J106K

6 47μF C21-C26 6.3V Ceramic Chip Capacitor, ±20%, X5R TDK C3225X5R0J476M

2 NI C16, C17 Ceramic Chip Capacitor

1 NI C15 Ceramic Chip Capacitor

1 U3 Audio Codec Texas Instruments TLV320AIC3101IRHB

1 U1 3.3V LDO Voltage Regulator Texas Instruments REG1117-3.3

1 U2 64K I2C EEPROM MicroChip 24AA64-I/SN

2 J10, J11 Screw Terminal Block, 2 Position On Shore Technology ED555/2DS

5 J6-J7, J12-J14 Screw Terminal Block, 3 Position On Shore Technology ED555/3DS

2 J8, J9 3,5 mm Audio Jack, T-R-S, SMD CUI Inc. SJ1-3515-SMT

4 J1A, J2A, J4A, J5A 20 Pin SMT Plug Samtec TSM-110-01-L-DV-P

4 J1B, J2B, J4B, J5B 20 pin SMT Socket Samtec SSW-110-22-F-D-VS-K

1 J3A 10 Pin SMT Plug Samtec TSM-105-01-L-DV-P

1 J3B 10 pin SMT Socket Samtec SSW-105-22-F-D-VS-K

1 N/A TLV320AIC3101EVM PWB Texas Instruments 6487258

10 JMP1-JMP4, JMP9, 2 Position Jumper , 0.1" spacing Samtec TSW-102-07-L-S

JMP11-JMP15

4 JMP5-JMP8 Bus Wire (18-22 Gauge)

2 JMP10, JMP16 3 Position Jumper , 0.1" spacing Samtec TSW-103-07-L-S

1 MK1 Omnidirectional Microphone Cartridge Knowles Acoustics MD9745APZ-F

1 SW1 4PDT Right Angle Switch E-Switch EG4208

31 TP3-TP33 Miniature Test Point Terminal Keystone Electronics 5000

2 TP1, TP2 Multipurpose Test Point Terminal Keystone Electronics 5011

12 N/A Header Shorting Block Samtec SNT-100-BK-T

ATTENTION: All components should RoHS-compliant. Some part number may be either leaded or RoHS. Verify purchased components are RoHS compliant.

SLAU219A–August 2007–Revised January 2014 TLV320AIC3101EVM Bill of Materials

l TEXAS INSTRUMENTS

1 2 3 4 5 6

54321

6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA

TITLE

SHEET OF FILE

SIZE DATE REV3-Apr-2007

DRAWN BY

ENGINEER

REVISION HISTORY

REV ENGINEERING CHANGE NUMBER APPROVED

DATA ACQUISITION PRODUCTS

HIGH PERFORMANCE ANALOG DIVISION

SEMICONDUCTOR GROUP

RICK DOWNS

ROBERT BENJAMIN

C:\Work\USB-MODEVM\USB Motherboard - ModEvm.ddb - Documents\SCH\USB Interface

1 2

USB-MODEVM INTERFACE

CUI-STACK PJ102-BH

YELLOW

2.5 MM

6VDC-10VDC IN

C15

0.1uF

DOCUMENT CONTROL NO.

CSCHNE 32

CRESET 34

CSYNC 35

CDATI 36

CSCLK 37

MCLKO1 39

MCLKO2 40

RESET 41

VREN 42

SDA 43

SCL 44

XTALO

XTALI

PLLFILI

PLLFILO

MCLKI

PUR

MRESET

DVSS

AVSS

TEST

EXTEN

CDATO 38

RSTO

P3.0

P3.1

P3.2/XINT

P3.3

P3.4

P3.5

AVDD 2

DVDD 33

DVDD 21

DVDD 8

P1.0 23

P1.1 24

P1.2 25

P1.3 26

P1.4 27

P1.5 29

P1.6 30

P1.7 31

TAS1020BPFB

VCC 1

D- 2

D+ 3

GND 4

897-30-004-90-000000

1.5K

R10

27.4

R11

27.4 C13

47pF

C14

47pF

JMP6

PWR SELECT

C20

100pF

C21

.001uF

R12

3.09K

MA-505 6.000M-C0

C18

33pF

C19

33pF

+3.3VD

VCC

VSS

SDA 5

SCL 6

24LC64I/SN

+3.3VD

0.1uF

TP9

TP10

2.7K

+3.3VD

MCLK

BCLK

LRCLK

I2SDIN

I2SDOUT

INT

MISO

MOSI

SCLK

R13

649

+3.3VD

C10

0.1uF

C11

0.1uF

C12

0.1uF

USB SLAVE CONN

EXT PWR IN

6.00 MHZ

6463996

RED

IOVDD

C23

0.1uF

C22

0.1uF

IOVDD

C27

0.1uF

+3.3VD

C26

0.1uF

+3.3VD

IOVDD

+3.3VD

IOVDD

TP11

MRESET

3.3VD ENABLE

1.8VD ENABLE C17

0.33uF

10uF

1GND

1EN

1IN

2GND

2EN

2IN

12 2OUT 17

2OUT 18

2RESET 22

1OUT 23

1OUT 24

1RESET 28

TPS767D318PWP

R17

100K

+3.3VD

10uF

SML-LX0603IW-TR

SML-LX0603YW-TR

SML-LX0603GW-TR

R19

220

GREEN

USB I2S

USB MCK

USB SPI

USB I2S

USB MCK

+1.8VD

RESET

C24

0.1uF

USB ACTIVE

USB RST

7 8

9 10

11 12

J15

EXTERNAL SPI

7 8

9 10

11 12

J14

EXTERNAL AUDIO DATA PWR_DWN

J10

EXT MCLK

R20

+3.3VD

SW2

SW DIP-8

EXT MCK

EXTERNAL I2C

IOVDD

SDA

SCL

+5VD

R15

10K

R16

10K

SW1

REGULATOR ENABLE

VIN

3VOUT 2

GND

REG1117-5D1

DL4001 C16

0.33uF

10uF

P3.3

P3.4

P3.5

P1.0

P1.1

P1.2

P1.3

ED555/2DS TP6

SML-LX0603GW-TR

R14

390

GREEN

U10

SN74LVC1G125DBV

C28

0.1uF RA1

10K

VREF1

2VREF2 7

EN 8

GND

1SCL2 6

SDA2 5

SCL1

3SDA1

U11

PCA9306DCT

C30

0.1uF R23

200k

C31

0.1uF

+3.3VD

GND

2EN

3OUT 5

FB 4

U14

TPS73201DBV

116

215

314

413

512

611

710

SW3

IOVDD SELECT

C25

10uF

1.2V

1.4V

1.6V

1.8V

2.0V

2.5V

3.0V

3.3V

R27

25.5k

R29

28k

R35

46.4k

R36

30.9k

R34

36.5k

R32

48.7k

R31

32.4k

R33

39.2k

R25

22.1k

R26

137k

R28

76.8k

R30

56.2k

R18

30.1k

R37

52.3k

C37

0.1uF

VCCA 1

DIR1 2

1A1 4

1A2 5

2A1 6

2A2 7

DIR2 3

GND 8

GND

OE2

2B2

10 2B1

11 1B2

12 1B1

OE1

15 VCCB

SN74AVC4T245PW

+3.3VD C34

0.1uF

VCCA 1

GND 2

VCCB

DIR

SN74AVC1T45DBV

C42

0.1uF

VCCA 1

GND 2

VCCB

DIR

SN74AVC1T45DBV

C35

0.1uF

IOVDD

VCCA

DIR1

1A1

1A2

2A1

2A2

DIR2

GND

8GND 9

OE2 14

2B2 10

2B1 11

1B2 12

1B1 13

OE1 15

VCCB 16

U12

SN74AVC4T245PW

+3.3VDIOVDD C32

0.1uF

C33

0.1uF

EXT MCK

VCCA 1

DIR1 2

1A1 4

1A2 5

2A1 6

2A2 7

DIR2 3

GND 8

GND

OE2

2B2

10 2B1

11 1B2

12 1B1

OE1

15 VCCB

SN74AVC4T245PW

C43

0.1uF

+3.3VD

U17

SN74AUP1G125DBV

C40

0.1uF

IOVDD

JMP7

JPR-1X3

JMP8

JPR-2X1

2 4

U15

SN74LVC1G126DBV

+3.3VD C41

0.1uF

VCCA

GND

VCCB 6

DIR 5

U13

SN74AVC1T45DBV

C36

0.1uF

C38

0.1uF

+3.3VDIOVDD

IOVDD

+3.3VD

C39

0.1uF

SML-LX0603GW-TR

R24

220

GREEN

IOVDD

P3.1-P3.2

C44

1uF

+3.3VD

2 4

U16

SN74LVC1G06DBV

R38

10M

IOVDD

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Appendix E USB-MODEVM Schematic

The schematic diagrams for the USB-MODEVM interface board (included only in the TLV320AIC3101EVM-PDK) are illustrated in Figure 37 and

Figure 38.

Figure 37. USB-MODEVM Interface Board Schematic (1 of 2)

44 USB-MODEVM Schematic SLAU219A–August 2007–Revised January 2014

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l TEXAS INSTRUMENTS 4:? TEXAS INSTRUMENTS

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54321

6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA

TITLE

SHEET OF FILE

SIZE DATE REV3-Apr-2007

DRAWN BY

ENGINEER

REVISION HISTORY

REV ENGINEERING CHANGE NUMBER APPROVED

DATA ACQUISITION PRODUCTS

HIGH-PERFORMANCE ANALOG DIVISION

SEMICONDUCTOR GROUP

RICK DOWNS

ROBERT BENJAMIN

C:\Work\USB-MODEVM\USB Motherboard - ModEvm.ddb - Documents\SCH\Daughtercard Interface

2 2

USB-MODEVM INTERFACE

DOCUMENT CONTROL NO. 6463996

GPIO0 2

DGND 4

GPIO1 6

GPIO2 8

DGND 10

GPIO3 12

GPIO4 14

SCL 16

DGND 18

SDA 20

CNTL

CLKX

CLKR

FSX

FSR

INT

TOUT

GPIO5

J12

DAUGHTER-SERIAL

+5VD

+5VA

1 2

JMP2

1 2

JMP1

JPR-2X1

+5VA +5VD

+5VA

+5VD

+5VA +5VD

10uF

+1.8VD

+3.3VD

10uF

-5VA

10uF

A0(+) 2

A1(+) 4

A2(+) 6

A3(+) 8

A4 10

A5 12

A6 14

A7 16

REF- 18

REF+ 20

A0(-)

A1(-)

A2(-)

A3(-)

AGND

VCOM

AGND

J11

DAUGHTER-ANALOG

GPIO0 2

DGND 4

GPIO1 6

GPIO2 8

DGND 10

GPIO3 12

GPIO4 14

SCL 16

DGND 18

SDA 20

CNTL

CLKX

CLKR

FSX

FSR

INT

TOUT

GPIO5

J17

DAUGHTER-SERIAL

+5VD

+5VA

A0(+) 2

A1(+) 4

A2(+) 6

A3(+) 8

A4 10

A5 12

A6 14

A7 16

REF- 18

REF+ 20

A0(-)

A1(-)

A2(-)

A3(-)

AGND

VCOM

AGND

J16

DAUGHTER-ANALOG

+1.8VD

+3.3VD

+1.8VD

+3.3VD

JMP5

JMP3

JMP4

2.7K

IOVDD

-5VA

MCLK

BCLK

LRCLK

I2SDIN

I2SDOUT

MISO

MOSI

SCLK

RESET

P3.1-P3.2

PWR_DWN

P3.3

P3.4

P3.5

P1.0

SDA

SCL

P1.1

P1.2

P1.3

TP1 TP2 TP3

TP5

TP4

TP7

AGND

TP8

DGND

R21

390

R22

390

SML-LX0603GW-TR

GREEN

SML-LX0603GW-TR

GREEN

J11A (TOP) = SAM_TSM-110-01-L-DV-P

J11B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K

J12A (TOP) = SAM_TSM-110-01-L-DV-P

J12B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K

J13A (TOP) = SAM_TSM-105-01-L-DV-P

J13B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K

J16A (TOP) = SAM_TSM-110-01-L-DV-P

J16B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K

J17A (TOP) = SAM_TSM-110-01-L-DV-P

J17B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K

J18A (TOP) = SAM_TSM-105-01-L-DV-P

J18B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K

-VA 2

-5VA 4

AGND 6

VD1 8

+5VD 10

+VA

+5VA

DGND

+1.8VD

+3.3VD

J13

DAUGHTER-POWER

-VA 2

-5VA 4

AGND 6

VD1 8

+5VD 10

+VA

+5VA

DGND

+1.8VD

+3.3VD

J18

DAUGHTER-POWER

GND

A10

A11

12 B11 13

B10 14

B9 15

B8 16

B7 17

B6 18

B5 19

B4 20

B3 21

B2 22

B1 23

GATE 24

SN74TVC3010PW

IOVDD

+3.3VD

200k

C29

0.1uF

IOVDD

200k

+3.3VD

RA2

10k

IOVDD

INT

IOVDD

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Appendix E

Figure 38. USB-MODEVM Interface Board Schematic (2 of 2)

SLAU219A–August 2007–Revised January 2014 USB-MODEVM Schematic

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Appendix F USB-MODEVM Layout Views

The USB-MODEVM interface board layouts (included only in the TLV320AIC3101EVM-PDK) are

illustrated in Figure 39 through Figure 41.

Figure 39. USB-MODEVM Assembly Layer

Figure 40. USB-MODEVM Top Layer

46 USB-MODEVM Layout Views SLAU219A–August 2007–Revised January 2014

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Appendix F

Figure 41. USB-MODEVM Bottom Layer

SLAU219A–August 2007–Revised January 2014 USB-MODEVM Layout Views

l TEXAS INSTRUMENTS

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Appendix G USB-MODEVM Bill of Materials

The complete bill of materials for the USB-MODEVM interface board (included only in the

TLV320AIC3101EVM-PDK) is shown in Table 10.

Table 10. USB-MODEVM Bill of Materials

Designators Description Manufacturer Mfg. Part Number

R4 10Ω1/10W 5% Chip Resistor Panasonic ERJ-3GEYJ1300V

R10, R11 27.4Ω1/16W 1% Chip Resistor Panasonic ERJ-3EKF27R4V

R20 75Ω1/4W 1% Chip Resistor Panasonic ERJ-14NF75R0U

R19 220Ω1/10W 5% Chip Resistor Panasonic ERJ-3GEYJ221V

R14, R21, R22 390Ω1/10W 5% Chip Resistor Panasonic ERJ-3GEYJ391V

R13 649Ω1/16W 1% Chip Resistor Panasonic ERJ-3EKF6490V

R9 1.5KΩ1/10W 5% Chip Resistor Panasonic ERJ-3GEYJ1352V

R1–R3, R5–R8 2.7KΩ1/10W 5% Chip Resistor Panasonic ERJ-3GEYJ272V

R12 3.09KΩ1/16W 1% Chip Resistor Panasonic ERJ-3EKF3091V

R15, R16 10KΩ1/10W 5% Chip Resistor Panasonic ERJ-3GEYJ1303V

R17, R18 100kΩ1/10W 5%Chip Resistor Panasonic ERJ-3GEYJ1304V

RA1 10KΩ1/8W Octal Isolated Resistor Array CTS Corporation 742C163103JTR

C18, C19 33pF 50V Ceramic Chip Capacitor, ±5%, NPO TDK C1608C0G1H330J

C13, C14 47pF 50V Ceramic Chip Capacitor, ±5%, NPO TDK C1608C0G1H470J

C20 100pF 50V Ceramic Chip Capacitor, ±5%, NPO TDK C1608C0G1H101J

C21 1000pF 50V Ceramic Chip Capacitor, ±5%, NPO TDK C1608C0G1H102J

C15 0.1μF 16V Ceramic Chip Capacitor, ±10%, X7R TDK C1608X7R1C104K

C16, C17 0.33μF 16V Ceramic Chip Capacitor, ±20%, Y5V TDK C1608X5R1C334K

C9–C12, C22–C28 1μF 6.3V Ceramic Chip Capacitor, ±10%, X5R TDK C1608X5R0J1305K

C1–C8 10μF 6.3V Ceramic Chip Capacitor, ±10%, X5R TDK C3216X5R0J1306K

D1 50V, 1A, Diode MELF SMD Micro Commercial DL4001

Components

D2 Yellow Light Emitting Diode Lumex SML-LX0603YW-TR

D3– D7 Green Light Emitting Diode Lumex SML-LX0603GW-TR

D5 Red Light Emitting Diode Lumex SML-LX0603IW-TR

Q1, Q2 N-Channel MOSFET Zetex ZXMN6A07F

X1 6MHz Crystal SMD Epson MA-505 6.000M-C0

U8 USB Streaming Controller Texas Instruments TAS1020BPFB

U2 5V LDO Regulator Texas Instruments REG1117-5

U9 3.3V/1.8V Dual Output LDO Regulator Texas Instruments TPS767D318PWP

U3, U4 Quad, 3-State Buffers Texas Instruments SN74LVC125APW

U5–U7 Single IC Buffer Driver with Open Drain o/p Texas Instruments SN74LVC1G07DBVR

U10 Single 3-State Buffer Texas Instruments SN74LVC1G125DBVR

U1 Microchip 24LC64I/SN

64K 2-Wire Serial EEPROM I2C

USB-MODEVM PCB Texas Instruments 6463995

TP1–TP6, TP9–TP11 Miniature test point terminal Keystone Electronics 5000

TP7, TP8 Multipurpose test point terminal Keystone Electronics 5011

J7 USB Type B Slave Connector Thru-Hole Mill-Max 897-30-004-90-000000

J1, J2–J5, J8 2-position terminal block On Shore Technology ED555/2DS

J9 2.5mm power connector CUI Stack PJ-102B

J130 BNC connector, female, PC mount AMP/Tyco 414305-1

J131A, J132A, J21A, J22A 20-pin SMT plug Samtec TSM-110-01-L-DV-P

J131B, J132B, J21B, J22B 20-pin SMT socket Samtec SSW-110-22-F-D-VS-K

J133A, J23A 10-pin SMT plug Samtec TSM-105-01-L-DV-P

J133B, J23B 10-pin SMT socket Samtec SSW-105-22-F-D-VS-K

J6 4-pin double row header (2x2) 0.1" Samtec TSW-102-07-L-D

48 USB-MODEVM Bill of Materials SLAU219A–August 2007–Revised January 2014

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Appendix G

Table 10. USB-MODEVM Bill of Materials (continued)

Designators Description Manufacturer Mfg. Part Number

J134, J135 12-pin double row header (2x6) 0.1" Samtec TSW-106-07-L-D

JMP1–JMP4 2-position jumper, 0.1" spacing Samtec TSW-102-07-L-S

JMP8–JMP14 2-position jumper, 0.1" spacing Samtec TSW-102-07-L-S

JMP5, JMP6 3-position jumper, 0.1" spacing Samtec TSW-103-07-L-S

JMP7 3-position dual row jumper, 0.1" spacing Samtec TSW-103-07-L-D

SW1 SMT, half-pitch 2-position switch C&K Division, ITT TDA02H0SK1

SW2 SMT, half-pitch 8-position switch C&K Division, ITT TDA08H0SK1

Jumper plug Samtec SNT-100-BK-T

SLAU219A–August 2007–Revised January 2014 USB-MODEVM Bill of Materials

l TEXAS INSTRUMENTS

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Appendix H USB-MODEVM Protocol

H.1 USB-MODEVM Protocol

The USB-MODEVM is defined to be a vendor-specific class and is identified on the PC system as an NI-

VISA device. Because the TAS1020 has several routines in its ROM which are designed for use with HID-

class devices, HID-like structures are used, even though the USB-MODEVM is not an HID-class device.

Data is passed from the PC to the TAS1020 using the control endpoint.

Data is sent in an HIDSETREPORT (see Table 11):

Table 11. USB Control Endpoint

HIDSETREPORT Request

Part Value Description

bmRequestType 0x21 00100001

bRequest 0x09 SET_REPORT

wValue 0x00 don't care

wIndex 0x03 HID interface is index 3

wLength calculated by host

Data Data packet as described below

The data packet consists of the following bytes, shown in Table 12:

Table 12. Data Packet Configuration

BYTE NUMBER TYPE DESCRIPTION

0 Interface Specifies serial interface and operation. The two values are logically ORed.

Operation:

READ 0x00

WRITE 0x10

Interface:

GPIO 0x08

SPI_16 0x04

I2C_FAST 0x02

I2C_STD 0x01

SPI_8 0x00

1 I2C Slave Address Slave address of I2C device or MSB of 16-bit reg addr for SPI

2 Length Length of data to write/read (number of bytes)

3 Register address Address of register for I2C or 8-bit SPI; LSB of 16-bit address for SPI

4..64 Data Up to 60 data bytes could be written at a time. EP0 maximum length is 64. The return

packet is limited to 42 bytes, so advise only sending 32 bytes at any one time.

Example usage:

Write two bytes (AA, 55) to device starting at register 5 of an I2C device with address A0:

[0] 0x11

[1] 0xA0

[2] 0x02

[3] 0x05

[4] 0xAA

[5] 0x55

50 USB-MODEVM Protocol SLAU219A–August 2007–Revised January 2014

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USB-MODEVM Protocol

Do the same with a fast mode I2C device:

[0] 0x12

[1] 0xA0

[2] 0x02

[3] 0x05

[4] 0xAA

[5] 0x55

Now with an SPI device which uses an 8-bit register address:

[0] 0x10

[1] 0xA0

[2] 0x02

[3] 0x05

[4] 0xAA

[5] 0x55

Now let's do a 16-bit register address, as found on parts like the TSC2101. Assume the register address

(command word) is 0x10E0:

[0] 0x14

[1] 0x10 --> Note: the I2C address now serves as MSB of reg addr.

[2] 0x02

[3] 0xE0

[4] 0xAA

[5] 0x55

In each case, the TAS1020 will return, in an HID interrupt packet, the following:

[0] interface byte | status

status:

REQ_ERROR 0x80

INTF_ERROR 0x40

REQ_DONE 0x20

[1] for I2C interfaces, the I2C address as sent

for SPI interfaces, the read back data from SPI line for transmission of the corresponding byte

[2] length as sent

[3] for I2C interfaces, the reg address as sent

for SPI interfaces, the read back data from SPI line for transmission of the corresponding byte

[4..60] echo of data packet sent

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USB-MODEVM Protocol

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If the command is sent with no problem, the returning byte [0] should be the same as the sent one

logically ORed with 0x20 - in our first example above, the returning packet should be:

[0] 0x31

[1] 0xA0

[2] 0x02

[3] 0x05

[4] 0xAA

[5] 0x55

If for some reason the interface fails (for example, the I2C device does not acknowledge), it would come

back as:

[0] 0x51 --> interface | INTF_ERROR

[1] 0xA0

[2] 0x02

[3] 0x05

[4] 0xAA

[5] 0x55

If the request is malformed, that is, the interface byte (byte [0]) takes on a value which is not described

above, the return packet would be:

[0] 0x93 --> the user sent 0x13, which is not valid, so 0x93 returned

[1] 0xA0

[2] 0x02

[3] 0x05

[4] 0xAA

[5] 0x55

Examples above used writes. Reading is similar:

Read two bytes from device starting at register 5 of an I2C device with address A0:

[0] 0x01

[1] 0xA0

[2] 0x02

[3] 0x05

The return packet should be

[0] 0x21

[1] 0xA0

[2] 0x02

[3] 0x05

[4] 0xAA

[5] 0x55

assuming that the values we wrote above starting at Register 5 were actually written to the device.

52 USB-MODEVM Protocol SLAU219A–August 2007–Revised January 2014

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GPIO Capability

H.2 GPIO Capability

The USB-MODEVM has seven GPIO lines. Access them by specifying the interface to be 0x08, and then

using the standard format for packets—but addresses are unnecessary. The GPIO lines are mapped into

one byte (see Table 13):

Table 13. GPIO Pin Assignments

Bit76543210

x P3.5 P3.4 P3.3 P1.3 P1.2 P1.1 P1.0

Example: write P3.5 to a 1, set all others to 0:

[0] 0x18 --> write, GPIO

[1] 0x00 --> this value is ignored

[2] 0x01 --> length - ALWAYS a 1

[3] 0x00 --> this value is ignored

[4] 0x40 --> 01000000

The user may also read back from the GPIO to see the state of the pins. Let's say we just wrote the

previous example to the port pins.

Example: read the GPIO

[0] 0x08 --> read, GPIO

[1] 0x00 --> this value is ignored

[2] 0x01 --> length - ALWAYS a 1

[3] 0x00 --> this value is ignored

The return packet should be:

[0] 0x28

[1] 0x00

[2] 0x01

[3] 0x00

[4] 0x40

H.3 Writing Scripts

A script is simply a text file that contains data to send to the serial control buses. The scripting language is

quite simple, as is the parser for the language. Therefore, the program is not forgiving about mistakes

made in the source script file, but the formatting of the file is simple. Consequently, mistakes should be

rare.

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Each line in a script file is one command. There is no provision for extending lines beyond one line. A line

is terminated by a carriage return.

The first character of a line is the command. The commands are:

ISet interface bus to use

rRead from the serial control bus

wWrite to the serial control bus

#Comment

bBreak

dDelay

The first command, I, sets the interface to use the commands that follow. This command must be followed

by one of the following parameters:

i2cstd Standard mode I2C bus

i2cfast Fast mode I2C bus

spi8 SPI bus with 8-bit register addressing

spi16 SPI bus with 16-bit register addressing

gpio Use the USB-MODEVM GPIO capability

For example, if a fast mode I2C bus is to be used, the script begins with:

I i2cfast

No data follows the break command. Anything following a comment command is ignored by the parser,

provided that it is on the same line. The delay command allows the user to specify a time, in milliseconds,

that the script pauses before proceeding.

NOTE: Unlike all other numbers used in the script commands, the delay time is entered in decimal

format. Also, note that because of latency in the USB bus as well as the time it takes the

processor on the USB-MODEVM to handle requests, the delay time may not be precise.

A series of byte values follows either a read or write command. Each byte value is expressed in

hexadecimal, and each byte must be separated by a space. Commands are interpreted and sent to the

TAS1020 by the program using the protocol described in Section H.1.

The first byte following a read or write command is the I2C slave address of the device (if I2C is used) or

the first data byte to write (if SPI is used—note that SPI interfaces are not standardized on protocols, so

the meaning of this byte varies with the device being addressed on the SPI bus). The second byte is the

starting register address that data is written to (again, with I2C; SPI varies—see Section H.1 for additional

information about what variations may be necessary for a particular SPI mode). Following these two bytes

are data, if writing. If reading, the third byte value is the number of bytes to read, (expressed in

hexadecimal).

For example, to write the values 0xAA 0x55 to an I2C device with a slave address of 0x90, starting at a

#example script

I i2cfast

w 90 03 AA 55

r 90 03 2

This script begins with a comment, specifies that a fast I2C bus is used, then writes 0xAA 0x55 to the I2C

slave device at address 0x90, writing the values into registers 0x03 and 0x04. The script then reads back

two bytes from the same device starting at register address 0x03. Note that the slave device value does

not change. It is unnecessary to set the R/W bit for I2C devices in the script; the read or write command

does that.

54 USB-MODEVM Protocol SLAU219A–August 2007–Revised January 2014

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Writing Scripts

The following is an example of using an SPI device that requires 16-bit register addresses:

# setup TSC2101 for input and output

# uses SPI16 interface

# this script sets up DAC and ADC at full volume,

input from onboard mic

# Page 2: Audio control registers

w 10 00 00 00 80 00 00 00 45 31 44 FD 40 00 31

w 13 60 11 20 00 00 00 80 7F 00 C5 FE 31 40 7C 00 02

00 C4 00 00 00 23 10 FE 00 FE 00

Note that blank lines are allowed. However, ensure that the script does not end with a blank line. Although

ending with a blank line does not cause the script to fail, the program does execute that line, and

therefore, may prevent the user from seeing data that was written or read on the previous command.

In this example, the first two bytes of each command are the command word to send to the TSC2101

(0x1000, 0x1360). These are followed by data to write to the device starting at the address specified in the

command word. The second line may wrap in the viewer being used to look like more than one line;

careful examination shows, however, that only one carriage return is on that line, following the last 00.

Any text editor can be used to write these scripts; Jedit is an editor that is highly recommended for general

usage. For more information, go to: http://www.jedit.org.

Once the script is written, it can be used in the command window by running the program and then

selecting Open Command File... from the File menu. Locate the script, and open it. The script then is

displayed in the command buffer. The user may also edit the script once it is in the buffer, but saving of

the command buffer is not possible at this time. (This feature may be added at a later date.)

Once the script is in the command buffer, it can be executed by pressing the Execute Command Buffer

button. If breakpoints are in the script, the script executes to that point, and the user is presented with a

dialog box with a button to press to continue executing the script. When ready to proceed, the user

pushes that button, and the script continues.

The following is an example of a (partial) script with breakpoints:

# setup AIC33 for input and output

# uses I2C interface

I i2cfast

# reg 07 - codec datapath

w 30 07 8A

r 30 07 1

d 1000

# regs 15/16 - ADC volume, unmute and set to

0dB

w 30 0F 00 00

r 30 0F 2

This script writes the value 8A at register 7, then reads it back to verify that the write was good. A delay of

1000 ms (one second) is placed after the read to pause the script operation. When the script continues,

the values 00 00 are written, starting at register 0F. This output is verified by reading two bytes and

pausing the script again, this time with a break. The script does not continue until the user allows it to by

pressing OK in the dialog box that is displayed due to the break.

SLAU219A–August 2007–Revised January 2014 USB-MODEVM Protocol

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Revision History

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Revision History

Changes from Original (August 2007) to A Revision ..................................................................................................... Page

• Added table describing the USB-MODEVM jumpers. ............................................................................... 5

• Added instructions concerning Windows 7 driver installation ....................................................................... 5

• Changed contents of the List of Jumpers. ............................................................................................ 6

• Changed USB-MODEVM schematics to revision D. ............................................................................... 44

• Added USB-MODEVM revision D board layout views. ............................................................................ 46

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

56 Revision History SLAU219A–August 2007–Revised January 2014

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Wireless Connectivity www.ti.com/wirelessconnectivity

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Datenblatt für TLV320AIC3101EVM(-PDK) Guide von Texas Instruments

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