Datenblatt für TPS25820, TPS25821 von Texas Instruments

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Control Signals
Power Switch
Status Signals
Type-C DFP
Status Signals
USB Type-C
Connector
VBUS
IN
EN
REF
GND
OUT
FAULT
CC1
CC2
SINK
POL
Thermal Pad
TPS25820/21
CHG
4.5 V ± 5.5V
Bus Power
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Copyright © 2017, Texas Instruments Incorporated
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS25820
,
TPS25821
SLVSE24C –NOVEMBER 2017REVISED AUGUST 2019
TPS25820, TPS25821 USB Type-C
TM
1.5-A Source Controller and Power Switch
1
1 Features
1 USB Type-CTM Rel. 1.3 Compliant Source
Controller
STD/1.5-A Current Capability Advertisement on
CC Lines
Connector Attach/Detach Detection
Super Speed Polarity Determination
• VBUS and VCONN (TPS25820) Application and
Discharge with Internal Fixed Current Limit
1.0-µA (typ) Operating Current with Nothing
Attached to the Type-C Connector
• 64-m(typ) High-Side OUT MOSFET
Meets USB Current-Limiting Requirements
1.7-A OUT Current Limit with ±7% Accuracy
Fast Overcurrent Response – 1.5 μs (Typical)
CC1 and CC2 ±8-kV Contact and ±15-kV Air
Discharge ESD Rating (IEC-61000-4-2)
IEC/UL Certificates
US-33101-UL: IEC 60950-1:2005;
AMD1:2009, AMD2:2013
US-33102-UL: IEC 62368-1:2014
2 Applications
USB 2.0 or 3.x Type-C Host and Hub Ports
Notebook/Desktop PCs and Tablets
LCD Monitor/Docking Station and Charging
Cradles
Type-C USB Wall Chargers, Power Bank, and
CLAs
Set-Top Box and Audio/Video Systems
3 Description
The TPS25820/21 is a USB Type-C source controller
with an integrated 1.5 A-rated USB power switch. The
TPS25820/21 monitors the Type-C configuration
channel (CC) lines to determine when a USB sink is
attached. If a sink is attached, the TPS25820/21
applies power to VBUS and communicates the
selectable VBUS current sourcing capability to the sink
via the pass through CC line. If the sink is attached
with an electronically marked cable, the TPS25820
also applies VCONN power to the cable VCONN pin. The
TPS25821 does not apply VCONN power and is for
functions where VCONN is not needed such as USB
2.0 and data-less charging implementations.
The TPS25820/21 draws 1.0 μA (typ) when nothing is
attached. The FAULT output signals when the switch
is in an overcurrent or overtemperature condition. The
SINK output signals when a sink is attached and the
POL output signals the polarity of the cable super-
speed lines.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
TPS25820 WSON (12) 3.00 mm x 2.00 mm
TPS25821 WSON (12) 3.00 mm x 2.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Device Comparison
PART NUMBER VCONN
TPS25820 Yes
TPS25821 No
Simplified Schematic
l TEXAS INSTRUMENTS
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TPS25820
,
TPS25821
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings ............................................................ 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics........................................... 5
6.6 Switching Characteristics.......................................... 7
6.7 Typical Characteristics.............................................. 9
7 Detailed Description............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagrams ..................................... 12
7.3 Feature Description................................................. 13
7.4 Device Functional Modes........................................ 15
8 Application and Implementation ........................ 16
8.1 Application Information............................................ 16
8.2 Typical Applications ................................................ 16
9 Power Supply Recommendations...................... 22
10 Layout................................................................... 23
10.1 Layout Guidelines ................................................. 23
10.2 Layout Example .................................................... 24
11 Device and Documentation Support ................. 25
11.1 Device Support .................................................... 25
11.2 Documentation Support ....................................... 25
11.3 Related Links ........................................................ 25
11.4 Receiving Notification of Documentation Updates 25
11.5 Community Resources.......................................... 25
11.6 Trademarks........................................................... 25
11.7 Electrostatic Discharge Caution............................ 25
11.8 Glossary................................................................ 26
12 Mechanical, Packaging, and Orderable
Information ........................................................... 26
4 Revision History
Changes from Revision B (February 2019) to Revision C Page
Added US-33102-UL: IEC 62368-1:2014 to the Features section......................................................................................... 1
Changes from Revision A (December 2017) to Revision B Page
Added the IEC/UL Certificate No. to the Features section..................................................................................................... 1
Changes from Original (November 2017) to Revision A Page
Changed TPS25821 from Product Preview to Production Data ........................................................................................... 1
*9 TEXAS INSTRUMENTS O
1IN 12 OUT
2IN 11 CC2
3CHG 10 GND
4EN 9 CC1
5FAULT 8 REF
6SINK 7 POL
Not to scale
Thermal
Pad
3
TPS25820
,
TPS25821
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5 Pin Configuration and Functions
DSS Package
12-Pin WSON
Top View
Pin Functions
PIN I/O DESCRIPTION
NAME NUMBER
IN 1, 2 I Device input supply. VBUS internal power switch input supply. VCONN internal power switch input supply for the
TPS25820.
CHG 3 I Charge logic input to select between standard USB or 1.5-A Type-C current sourcing ability.
EN 4 I Logic input to turn the device on and off.
FAULT 5 O Open-drain logic output that asserts when the device is in overtemperature and/or VBUS is in current limit condition.
SINK 6 O Open-drain logic output that asserts when a Type-C Sink is identified on the CC lines.
POL 7 O Open-drain logic output that signals which Type-C CC pin is connected to the cable CC line. This gives the
information needed to mux the super speed lines. Asserted when the CC2 pin is connected to the cable CC line.
REF 8 I Analog input used to make a current reference. Connect a 0.5%, 100-ppm, 100-kresistor between this pin and
GND.
CC1 9 I/O Analog input/output that connects to the Type-C receptacle CC1 pin.
GND 10 – Ground
CC2 11 I/O Analog input/output that connects to the Type-C receptacle CC2 pin.
OUT 12 O VBUS power switch output.
Thermal Pad Thermal pad on bottom of package.
l TEXAS INSTRUMENTS
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TPS25820
,
TPS25821
SLVSE24C –NOVEMBER 2017REVISED AUGUST 2019
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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range, voltages are respect to GND (unless otherwise noted) (1)
MIN MAX UNIT
Pin voltage, V IN, EN, CHG, REF, OUT, FAULT, CC1, CC2, SINK, POL –0.3 6 V
Pin positive source current, ISRC OUT, REF, CC1, CC2 Internally
limited A
Pin positive sink current, ISNK
OUT (while applying VBUS) 2.5 A
CC1, CC2 (while TPS25820 applying VCONN) 1 A
FAULT, SINK, POL Internally
limited mA
Operating junction temperature, TJ–40 180 °C
Storage temperature range, Tstg –65 150 °C
(1) Electrostatic discharge (ESD) to measure device sensitivity/immunity to damage caused by assembly line electrostatic discharges into
the device.
(2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(4) Surges per IEC61000-4-2, 1999 applied between CC1/CC2 and output ground of the TPS25820EVM-835.
6.2 ESD Ratings
VALUE UNIT
V(ESD) (1) Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(2) ±2000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101(3) ±500
IEC61000-4-2 contact discharge, CC1 and CC2(4) ±8000
IEC61000-4-2 air-gap discharge, CC1 and CC2(4) ±15000
6.3 Recommended Operating Conditions
Voltages are with respect to GND (unless otherwise noted)
MIN NOM MAX UNIT
VISupply voltage IN 4.5 5.5 V
VIInput voltage EN, CHG 0 5.5 V
VIH High-level input voltage EN, CHG 2 V
VIL Low-level voltage EN, CHG 0.8 V
VPU Pull-up voltage Used on FAULT, SINK, POL 0 5.5 V
ISRC Positive source current OUT 1.5 A
CC1 or CC2 when supplying VCONN 250 mA
ISNK Positive sink current (100 ms
moving average)
SINK, POL 5 mA
FAULT 10
ISNK_PULSE Positive repetitive pulse sink current FAULT, SINK, POL Internally
Limited mA
TJOperating junction temperature –40 125 °C
l TEXAS INSTRUMENTS
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,
TPS25821
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(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.4 Thermal Information
THERMAL METRIC(1)
TPS25820,
TPS25821 UNIT
DSS (WSON)
12 PINS
RθJA Junction-to-ambient thermal resistance 57.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 53.7 °C/W
RθJB Junction-to-board thermal resistance 24.1 °C/W
ψJT Junction-to-top characterization parameter 1.6 °C/W
ψJB Junction-to-board characterization parameter 24.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 7.4 °C/W
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
6.5 Electrical Characteristics
–40°C TJ125°C, 4.5 V VIN 5.5 V, VEN = VCHG = VIN, RREF = 100 k. Typical values are at 25°C. All voltages are with
respect to GND. IOUT and IOS defined positive out of the indicated pin (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OUT - POWER SWITCH
RDS(on) On resistance(1)
TJ= 25°C, IOUT = 1.5 A 64 70
mΩ–40°C TJ85°C, IOUT = 1.5 A 64 85
–40°C TJ125°C, IOUT = 1.5 A 64 98
IREV OUT to IN reverse leakage current VOUT = 5.5 V, 0 VIN 5.5 V, VEN = 0 V,
–40°C TJ85°C, measure IIN 0 3 µA
OUT - CURRENT LIMIT
IOS Short circuit current limit (1) 1.6 1.72 1.84 A
RREF = 10 4.0
OUT - DISCHARGE
Discharge resistance VOUT = 4 V 400 500 600 Ω
Bleed discharge resistance VOUT = 4 V, No Sink termination on CC
lines, time > tw_OUT_DCHG 90 150 250 kΩ
VTH Rising threshold for not
discharged 800 mV
REF
IOS Short circuit current RREF = 10 Ω9.5 17.5 µA
VOOutput voltage 0.78 0.8 0.82 V
FAULT
VOL Output low voltage I FAULT = 1 mA 250 mV
IOFF Off-state leakage V FAULT = 5.5 V 1 µA
CC1/CC2 - VCONN POWER SWITCH (TPS25820)
RDS(on) On resistance
TJ= 25°C, ICCx = 250 mA 480 530
mΩ-40°C TJ85°C, ICCx = 250 mA 480 645
-40°C TJ125°C, ICCx = 250 mA 480 755
CC1/CC2 - VCONN POWER SWITCH - CURRENT LIMIT (TPS25820)
IOS Short circuit current limit(1) 315 370 425 mA
RREF = 10 Ω1000
l TEXAS INSTRUMENTS
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TPS25820
,
TPS25821
SLVSE24C –NOVEMBER 2017REVISED AUGUST 2019
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Electrical Characteristics (continued)
–40°C TJ125°C, 4.5 V VIN 5.5 V, VEN = VCHG = VIN, RREF = 100 k. Typical values are at 25°C. All voltages are with
respect to GND. IOUT and IOS defined positive out of the indicated pin (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
(2) These parameters are provided for reference only and do not constitute part of TI’s published specifications for purposes of TI’s product
warranty.
CC1/CC2 – CONNECT MANAGEMENT
ISRC Sourcing current
VCHG = 0 V, 0 V VCCx 1.5 V, after V SINK
= 0 V 73 80 85
µA0 V VCCx 1.5 V, after V SINK = 0 V 168 180 190
VCHG = 0 V or VIN, 0 V VCCx 1.5
V, before V SINK = 0 V 64 80 96
IREV Reverse leakage current
CCx is the CC pin under test, CCy is the
other CC pin. VCCx = 5.5 V, CCy floating,
VEN = 0 V or 0 V VIN 5.5 V, –40°C TJ
85°C, IREV is current into CCx pin.
0 5
µA
CCx is the CC pin under test, CCy is the
other CC pin. VCCx = 5.5 V, CCy = 0
V, –40°C TJ85°C, IREV is current
into CCx pin.
5 10
CC1/CC2 – CONNECT MANAGEMENT – VCONN DISCHARGE MODE
Discharge resistance (TPS25820) CC pin that was providing VCONN before
detach: VCCX = 4 V 400 500 600 Ω
VTH Falling threshold for discharged
(TPS25820) CC pin that was providing VCONN before
detach 570 600 630 mV
Discharged threshold hysteresis
(TPS25820) 100 mV
SINK, POL
VOL Output low voltage ISNK_PIN = 1 mA 250 mV
IOFF Off-state leakage VPIN = 5.5 V 1 µA
EN, CHG - LOGIC INPUTS
VTH Rising threshold voltage for output
logic change 1.45 1.8 V
VTH Falling threshold voltage for output
logic change 1.00 1.35 V
Hysteresis(2) 100 mV
IIN Input current VPIN = 0 V or 5.5 V –0.5 0.5 µA
OVER TEMPERATURE SHUT DOWN
TTH_OTSD2 Rising threshold temperature for
device shutdown 155 °C
Hysteresis(2) 20 °C
TTH_OTSD1
Rising threshold temperature for
OUT/ VCONN switch shutdown in
current limit 135 °C
Hysteresis(2) 20 °C
IN
VTH Rising threshold voltage for
not UVLO 3.9 4.1 4.3 V
Hysteresis(2) 100 mV
l TEXAS INSTRUMENTS
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TPS25820
,
TPS25821
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Electrical Characteristics (continued)
–40°C TJ125°C, 4.5 V VIN 5.5 V, VEN = VCHG = VIN, RREF = 100 k. Typical values are at 25°C. All voltages are with
respect to GND. IOUT and IOS defined positive out of the indicated pin (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
II
Disabled supply current VEN = 0 V, –40°C TJ85°C 1
µA
Enabled supply current with CC
lines open –40°C TJ85°C 1 4
Enabled supply current with
dangling Ra cable attached 150 195
Enabled supply current with Sink
attached via cable that is
electronically marked (includes IN
current that provides the CC
output current to the sink Rd
resistor)
VCHG = 0 V 232 275
332 380
Enabled supply current with Sink
attached via cable that is not
electronically marked (includes IN
current that provides the CC
output current to the sink Rd
resistor)
VCHG = 0 V 210 250
310 355
6.6 Switching Characteristics
–40°C TJ125°C, 4.5 V VIN 5.5 V, VEN = VCHG = VIN, RREF = 100 k. Typical values are at 25°C. All voltages are with
respect to GND. IOUT and IOS defined positive out of the indicated pin (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OUT - POWER SWITCH
trOutput voltage rise time VIN = 5 V, CL= 1 µF, RL= 100
(measure between 10% and 90% of
final value)
0.5 0.8 1.2 ms
tfOutput voltage fall time 0.2 0.3 0.4 ms
ton Output voltage turn-on time VIN = 5 V, CL= 1 µF, RL= 100 2.1 3.2 4.5 ms
toff Output voltage turn-off time 0.8 1.3 1.9 ms
tw_OUT_DCHG RDCHG application time at OUT turn
off
VOUT = 1 V, time ISNK_OUT > 1 mA
after Sink termination removed from
CC lines 169 262 361 ms
OUT - CURRENT LIMIT
tiOS Current limit response time to short
circuit VIN - VOUT = 1 V, RL= 10 mΩ(see
Figure 1)1.5 4 µs
FAULT
tDEGA Asserting deglitch due to overcurrent 5.6 8.2 10.6 ms
tDEGA Asserting deglitch due to
overtemperature in current limit 0 ms
tDEGD De-asserting deglitch 5.6 8.2 10.6 ms
CC1/CC2 - VCONN POWER SWITCH (TPS25820)
trOutput voltage rise time VIN2 = 5 V, CL= 1 µF, RL= 100 Ω0.13 0.22 0.3 ms
tfOutput voltage fall time 0.18 0.22 0.26 ms
ton Output voltage turn-on time VIN2 = 5 V, CL= 1 µF, RL= 100 Ω1.4 2.2 3.2 ms
toff Output voltage turn-off time 0.25 0.33 0.4 ms
Minimum VCONN discharge time TPS25820 42 65 90 ms
CC1/CC2 - VCONN POWER SWITCH - CURRENT LIMIT (TPS25820)
tres Current limit response time to short
circuit VIN – VCCx = 1 V, R = 10 mΩ(see
Figure 1)1 4 µs
SINK, POL
tDEGA Asserting deglitch 100 150 200 ms
tDEGD De-asserting deglitch 7.9 12.5 17.7 ms
l TEXAS INSTRUMENTS
tios
IOS
IOUT
8
TPS25820
,
TPS25821
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Figure 1. Output Short Circuit Parameter Diagram
l TEXAS INSTRUMENTS 180 350 sec
TJ - Junction Temperature (oC)
RDS(ON) - ON Resistance (m:)
-40 -20 0 20 40 60 80 100 120 140
50
55
60
65
70
75
80
85
90
D005
TJ - Junction Temperature (oC)
IREV - Reverse Leakage Current (PA)
-40 -20 0 20 40 60 80 100 120 140
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
D001
TJ - Junction Temperature (oC)
II - Enable Supply Current (PA)
-40 -20 0 20 40 60 80 100 120 140
300
305
310
315
320
325
330
335
340
345
350
D004
Sink attached with passive cable
Sink attached with active cable
TJ - Junction Temperature (oC)
Sourcing Current (PA)
-40 -20 0 20 40 60 80 100 120 140
60
80
100
120
140
160
180
D001
SINK 0.5 A/0.9 A (USB default)
SINK 1.5A
TJ - Junction Temperature (oC)
ILIM - Limit Current (mA)
-40 -20 0 20 40 60 80 100 120 140
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
D002
VBUS ILIM
VCONN ILIM
9
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6.7 Typical Characteristics
Figure 2. CC Sourcing Current to SINK vs Temperature Figure 3. ILIM for VBUS and VCONN vs Temperature
Device = Disabled; (VOUT-VIN) =6.5V
Figure 4. OUT Reverse Leakage Current vs Temperature Figure 5. Supply Current with SINK vs Temperature
Figure 6. VBUS Current Limiting Switch On Resistance vs
Temperature Figure 7. VCONN Current Limiting Switch On Resistance vs
Temperature
l TEXAS INSTRUMENTS
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7 Detailed Description
7.1 Overview
The TPS25820 and TPS25821 devices are highly integrated USB Type-C source controllers with built-in power
switches developed for the USB Type-C connector and cable. The TPS25820 supports VCONN, while the
TPS25821 does not. The devices provide all of the functionality needed to support a USB Type-C DFP in a
system where USB power delivery (PD) source capabilities (for example, VBUS > 5 V) are not implemented. The
devices are designed to be compliant to the USB TypeC specification, release 1.3 which added new
requirements to discharge VCONN.
7.1.1 USB Type C Basic
For a detailed description of the Type-C spec refer to the USB-IF website to download the latest released
version. Some of the basic concepts of the Type-C spec that pertains to understanding the operation of the
TPS25820/21 (a Downward Facing Port, DFP device) are described as follows.
USB Type-C removes the need for different plug and receptacle types for host and device functionality. The
Type-C receptacle replaces both Type-A and Type-B receptacles since the Type-C cable is plug-able in either
direction between host and device. A host-to-device logical relationship is maintained via the configuration
channel (CC). Optionally hosts and devices can be either providers or consumers of power when USB PD
communication is used to swap roles.
All USB Type-C ports operate in one of below three data modes:
Host mode: the port can only be host (also provider of power)
Device mode: the port can only be device (also consumer of power)
Dual-Role mode: the port can be either host or device
Port types:
DFP (Downstream Facing Port): Host, specifically associated with flow of data (Host or Hub) in a USB link
Source: Port that asserts Rp (pull-up resistor) on CC pin and provides power on VBUS when attached to a
Sink (device). At power-up a DFP is a source.
UFP (Upstream Facing Port): Device, specifically associated with flow of data (device) in a USB link
Sink: Port that asserts Rd (pull-down) on CC pin and consumes power from VBUS when attached. At power-
up a UFP is a sink
DRP (Dual-Role Port): Host or Device
Valid Source-to-Sink connections:
Table 1 describes valid Source-to-Sink connections
Source to Source or Sink to Sink have no function
Table 1. Valid Source-to-Sink Connections
POWER ROLES SOURCE ONLY SINK ONLY DUAL ROLE POWER (DRP)
Source Only Not allowed Allowed Allowed
Sink Only Allowed Not allowed Allowed
Dual Role Power
(DRP) Allowed Allowed Allowed
7.1.2 Configuration Channel
The function of the configuration channel is to detect connections and configure the interface across the USB
Type-C cables and connectors.
Functionally the Configuration Channel (CC) is used to serve the following purposes:
Detect connect to the USB ports
Resolve cable orientation and twist connections to establish USB data bus routing
Establish Source and Sink roles between two connected ports
Discover and configure power: USB Type-C current modes or USB Power Delivery
Discovery and configure optional Alternate and Accessory modes
l TEXAS INSTRUMENTS Detect valid connection Establish USB power method USB Device Enumeration connecuon
Rp
Rp
CC Rp
Rp
RaRa
Cable
Source monitors for
connection
Source monitors for
connection Sink monitors for
connection
Sink monitors for
connection
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Enhances flexibility and ease of use
Typical flow of DFP to UFP configuration is shown in Figure 8:
Figure 8. DFP to UFP Connect Flow
7.1.3 Detecting a Connection
Sources and DRPs fulfill the role of detecting a valid connection over USB Type-C. Figure 9 shows a Source to
Sink connection made with Type-C cable. As shown in Figure 9, the detection concept is based on being able to
detect terminations in the product which has been attached. A pull-up and pull-down termination model is used. A
pull-up termination can be replaced by a current source.
In the Source-Sink connection the Source monitors both CC pins for a voltage lower than the unterminated
voltage.
A Sink advertises Rd on both its CC pins (CC1 and CC2).
A powered cable advertises Ra on its VCONN pin.
Figure 9. Source-Sink Connection Mechanism
l TEXAS INSTRUMENTS
Charge
Pump
Current
Limit
OTSD
Thermal
Sense
IN Current Sense
Current Sense
Current Sense
EN
OUT
CC1
CC2
Gate
Control
FAULT
SINK
POL
Control
Logic
CC
Monitor
CHG
GND
REF
UVLO
IN
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7.2 Functional Block Diagrams
Figure 10. TPS25820 Functional Block Diagram
l TEXAS INSTRUMENTS
Charge
Pump
Current
Limit
OTSD
Thermal
Sense
IN Current Sense
EN
OUT
CC1
CC2
Gate
Control
FAULT
SINK
POL
Control
Logic
CC
Monitor
CHG
GND
REF
UVLO
IN
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Functional Block Diagrams (continued)
Figure 11. TPS25821 Functional Block Diagram
7.3 Feature Description
Both the TPS25820 and TPS25821 are source (i.e. DFP) Type-C port controllers with integrated power switches
for VBUS. The TPS25820 also has integrated power switches for VCONN. Refer to the functional block diagrams
(Figure 10 and Figure 11). The TPS25820/21 devices do not support BC1.2 charging modes, because it does not
interact with USB D+ and D– data lines. However supporting DCP mode of BC1.2 can be easily accomplished in
data-less ports like wall chargers and CLAs by simply tying a 100-resistor between the D+ and D- pins of the
Type-C connector.
The TPS25820 has a built-in VCONN current limiting switch and can be used to implement USB 3.1 DFP, whereas
the TPS25821 does not implement a VCONN current limiting switch hence is used in the implementation in USB
2.0 DFP ports or as a USB source only port. Other than the VCONN current limiting switch there are no other
functional differences between the TPS25820 and TPS25821.
7.3.1 Configuration Channel Pins CC1 and CC2
The TPS25820/21 devices have two pins, CC1 and CC2 that serve to detect an attachment to the port and
resolve cable orientation. These pins are also used to establish the current broadcast to a valid sink and
configure VCONN (TPS25820 only).
l TEXAS INSTRUMENTS
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TPS25820
,
TPS25821
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Feature Description (continued)
(1) POL and SINK are open drain outputs; pull high with 100 kto IN when used. Tie to GND or leave open when not used.
(2) TPS25820 Only
Table 2 lists the TPS25820/21 response to various attachments to its port.
Table 2. Response to Attachments
TPS25820/21 TYPE-C PORT CC1 CC2
TPS25820/21 RESPONSE(1)
OUT VCONN(2)
On CC1 or CC2 POL SINK
Nothing Attached OPEN OPEN OPEN NO Hi-Z Hi-Z
Sink Connected Rd OPEN IN NO Hi-Z LOW
Sink Connected OPEN Rd IN NO LOW LOW
Powered Cable/No Sink Connected OPEN Ra OPEN NO Hi-Z Hi-Z
Powered Cable/No Sink Connected Ra OPEN OPEN NO Hi-Z Hi-Z
Powered Cable/Sink Connected Rd Ra IN CC2 Hi-Z LOW
Powered Cable/Sink Connected Ra Rd IN CC1 LOW LOW
Debug Accessory Connected Rd Rd OPEN NO Hi-Z Hi-Z
Audio Adapter Accessory Connected Ra Ra OPEN NO Hi-Z Hi-Z
7.3.2 Current Capability Advertisement and VBUS Overload Protection
The TPS25820/21 supports two Type-C current advertisements as defined by the USB Type-C standard. Current
broadcast to a connected Sink is controlled by the CHG pin. For each broadcast level the device protects itself
from a Sink that draws current in excess of the port’s USB Type-C Current advertisement by setting the current
limit as shown in Table 3.
Table 3. USB Type-C Current Advertisement
CHG CC CAPABILITY BROADCAST CURRENT LIMIT
0 STD (500 mA for USB 2.0 port) 1.67 A
0 STD (900 mA for USB 3.1 port) 1.67 A
1 1.5 A 1.67 A
Under overload conditions, the internal current-limit regulator limits the output current on the OUT pin as shown
in the Electrical Characteristics table. When an overload condition is present, the device maintains a constant
output current, with the output voltage determined by (IOS x RLOAD). Two possible overload conditions can occur.
The first overload condition occurs when either: 1) input voltage is first applied, enable is true, and a short circuit
is present (load which draws IOUT > IOS), or 2) input voltage is present and the TPS25820/21 is enabled into a
short circuit. The output voltage is held near zero potential with respect to ground and the TPS25820/21 ramps
the output current to IOS.
In either case the TPS25820/21 will limit the load current to IOS until the overload condition is removed or the
device begins to thermal cycle. This is demonstrated in Figure 16 where the device was enabled into a short, and
subsequently cycles current off and on as the thermal protection engages.
7.3.3 FAULT Response
The FAULT pin is an open drain output that asserts (active low) after a deglitch time (tDEGA) when device OUT
current exceeds its programmed value and/or overtemperature threshold is crossed. The FAULT signal remains
asserted until the fault condition is removed for tDEGD. The TPS25820/21 are designed to eliminate false
overcurrent fault reporting by using an internal deglitch circuit.
Connect FAULT with a 100-kΩpull-up resistor to IN. FAULT can be left open or tied to GND when not used.
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7.3.4 Thermal Shutdown
The device has two internal overtemperature shutdown thresholds, TTH_OTSD1 and TTH_OTSD2, to protect the
internal FET from damage and overall safety of the system. When the device temperature exceeds TTH_OTSD1,
any switch in current limit (OUT switch or VCONN switch) is disabled. The device does auto-retry recovery by re-
enabling the switch when die temperature decreases by 20°C. When TTH_OTSD2 is exceeded all open drain
outputs are left open and the device is disabled such that minimum power/heat is dissipated. The device does
auto-retry recovery by attempting to power-up when die temperature decreases by 20°C.
7.3.5 REF
A 100-kresistor is connected from this pin to GND. This pin sets the reference current required to bias the
internal circuitry of the device. The overload current limit tolerance and CC currents depend upon the accuracy of
this resistor. A ±0.5% low temp CO resistor, or better, yields the best current limit accuracy and overall device
performance. If the CC capability broadcast will only be set to STD (CHG pulled low) then up to a ±10% resistor
may be used as long as the additional error in the current limit is acceptable.
7.3.6 Plug Polarity Detection
Reversible Type-C plug orientation is reported by the POL pin when a Sink is connected, however when no Sink
is attached, POL remains de-asserted irrespective of cable plug orientation. Table 2 describes the POL state
based on which device CC pin detects VRd from an attached Sink pull-down. In a typical USB 3.x DFP port, this
pin controls a superspeed data MUX for proper data connectivity irrespective of plug orientation. See Figure 20.
7.3.7 Sink Attachment Indicator
The attachment of a Type-C sink is reported by SINK. See Table 2.
7.3.8 Device Enable Control
The logic enable pin controls the power switch and device supply current. The supply current is reduced to less
than 1 μA when a logic low is present on EN. The EN pin provides a convenient way to turn on or turn off the
device while it is powered. When this pin is pulled high, the device is turned on or enabled. When the device is
disabled (EN pulled low), the internal FETs tied to IN are disconnected, all open drain outputs are left open (Hi-
Z), and the CC1/CC2 monitor block is turned off. The EN pin should not be left floating.
7.3.9 Undervoltage Lockout (UVLO)
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turn-
on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage droop during turn on.
7.4 Device Functional Modes
The TPS25820/21 is a Type-C controller with integrated power switch that supports all Type-C functions in a
downstream facing port (DFP). It is also used to manage current advertisement and protection to a connected
sink and active cable. The device starts its operation by monitoring the IN bus. When IN exceeds the
undervoltage lockout threshold, the device samples the EN pin. A high level on this pin enables the device and
normal operation begins. Having successfully completed its start-up sequence, the device now actively monitors
its CC1 and CC2 pins for attachment to a sink. When a sink is detected on either the CC1 or CC2 pin the internal
MOSFET starts to turn-on after the required de-bounce time is met. The internal MOSFET starts conducting and
allows current to flow from IN to OUT. For the TPS25820 if Ra is detected on the other CC pin (not connected to
sink), VCONN is applied to allow current to flow from IN to the CC pin connected to Ra. For a complete listing of
various device operational modes refer to Table 2.
‘5‘ TEXAS INSTRUMENTS
4.5V t 5.5V
100 k:
(1%)
3 x 100 k:
(Optional)
Control Signals
Bus Power
Power Switch
Status Signal
Type-C DFP
Status Signals
USB Type-C
Connector
VBUS
TPS25820/21
IN
EN
CHG
REF
GND
OUT
FAULT
CC1
CC2
SINK
POL
Power Pad
10µF
0.1µF
47µF
47µF
47µF
Copyright © 2017, Texas Instruments Incorporated
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,
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS25820/21 are Type-C source controllers. The TPS25820 supports all Type-C DFP required functions to
support a USB 3.x port and the TPS25821 supports all required functions for a USB 2.0 DFP. The TPS25820/21
only applies power to VBUS when it detects a sink is attached and removes power when it detects the sink is
detached. The device exposes its identity via its CC pin advertising its current capability based on the CHG pin
setting. The TPS25820/21 also limits its advertised current internally and provides robust protection against faults
on the system VBUS power rail.
After a connection is established by the TPS25820/21, the TPS25820/21 device is capable of providing VCONN to
power circuits in the cable plug on the CC pin that is not connected to the CC wire in the cable. VCONN is
internally current limited. The TPS25820/21 do not support Type-C optional accessory modes (Ra/Ra and Rd/Rd
in Table 2).
The following design procedure can be used to implement a full featured Type-C source.
8.2 Typical Applications
8.2.1 Type-C Source Port Implementation without BC 1.2 Support
Figure 12 shows a minimal Type-C source implementation capable of supporting 5-V and 1.5-A charging.
Figure 12. Type-C Source Port Implementation without BC 1.2 Support
8.2.1.1 Design Requirements
8.2.1.1.1 Input and Output Capacitance Considerations
Input and output capacitance improves the performance of the device. The actual capacitance should be
optimized for the particular application. For all applications, a 0.1-μF or greater ceramic bypass capacitor
between IN and GND is recommended as close to the device as possible for local noise decoupling.
All protection circuits, including those of the TPS25820/21 device, have the potential for input voltage overshoots
and output voltage undershoots. Input voltage overshoots can be caused by either of two effects. The first cause
is an abrupt application of input voltage in conjunction with input power-bus inductance and input capacitance
when the IN pin is high-impedance (before OUT turn-on, i.e. not connected to a Type-C sink device).
Theoretically, the peak voltage is 2 times the applied voltage. The second cause is due to the abrupt reduction of
l TEXAS INSTRUMENTS
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Typical Applications (continued)
output short-circuit current when the device turns off and energy stored in the input inductance drives the input
voltage high. Input voltage droops may also occur with large load steps and as the output is shorted. Applications
with large input inductance (for instance, connecting the evaluation board to the bench power supply through
long cables) may require large input capacitance to prevent the voltage overshoot from exceeding the absolute
maximum voltage of the device.
The fast current-limit speed of the TPS25820/21 device to hard output short circuits isolates the input bus from
faults. However, ceramic input capacitance in the range of 1 μF to 22 μF adjacent to the input aids in both
response time and limiting the transient seen on the input power bus. Output voltage undershoot is caused by
the inductance of the output power bus just after a short has occurred and the device has abruptly reduced the
OUT current. Energy stored in the inductance drives the OUT voltage down, and potentially negative, as it
discharges. An application with large output inductance (such as from a cable) benefits from the use of a high-
value output capacitor to control voltage undershoot.
Since the source is considered cold socketed when not attached to a sink, the output capacitance should be
placed at the IN pin rather than the OUT pin, which has been commonly used in USB Type-A ports. A 120-μF
capacitance is recommended in this situation. It is also recommended to a ceramic capacitor less than 10 μF on
the OUT pin for better voltage bypass and compliance to Type-C spec.
8.2.1.1.2 System Level ESD Protection
System-level ESD (per EN61000-4-2) may occur as the result of a cable being plugged in, or a user touching the
USB receptacle or cable plug exposed pins. The recommended capacitor on the OUT pin helps reduce the
severity of ESD hit on the VBUS path thereby protecting the OUT pin of device. The device has ESD protection
built into the CC1 and CC2 pins so that no external protection is necessary as long as proper trace layout
guidelines are practiced. Refer to the Layout Guidelines section for external component placement and routing
recommendations.
8.2.1.2 Detailed Design Procedure
Design considerations are listed below:
Place at least 120 µF of bypass capacitance close to the IN pins versus OUT as Type C is a cold socket
connector.
A <10-µF bypass capacitor is recommended placed near Type-C receptacle VBUS pin to handle load
transients.
Depending on the max current level advertisement supported by the Type-C port in the system, set CHG
levels accordingly.
EN and CHG pins can be tied directly to GND or IN without a pull-up resistor.
CHG can also be dynamically controlled by a µC to change the current advertisement level to the sink.
When an open drain output of the TPS25820 is not used, it can be left as NC or tied to GND or when used,
pulled up to IN supply via a 100-kΩresistor.
Connect a 0.5% 100-kresistor between the REF and GND pins placing it close to the device pin and
isolated from switching noise on the board.
l TEXAS INSTRUMENTS
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Typical Applications (continued)
8.2.1.3 Application Curves
Figure 13. Sink Attach Event Figure 14. Sink Detach Event
COUT = 6.8 µF, Short Output, IN=EN=5V, CC1=Rd, CC2 open
Figure 15. Out Short Event Figure 16. Extended Period OUT Short Event
Figure 17. Screw Driver Short on VBUS
VIN: 5V 0V - 5V;1V/ms,365 ms wait,CC1 = Rd,CC2 = open
Figure 18. Brownout Test
l TEXAS INSTRUMENTS For an 2 DCP
4.5V t 5.5V
100 k:
(1%)
3 x 100 k:
(Optional)
Control Signals
Bus Power
Power Switch
Status Signal
Type-C DFP
Status Signals
USB Type-C
Connector
VBUS
TPS25820/21
IN
EN
CHG
REF
GND
OUT
FAULT
CC1
CC2
SINK
POL
Power Pad
10µF
0.1µF
47µF
47µF
47µF
100 :
D+
D-
For BC1.2 DCP
Mode Support
Copyright © 2017, Texas Instruments Incorporated
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Typical Applications (continued)
8.2.2 Type -C Source Port Implementation with BC 1.2 (DCP Mode) Support
BC1.2 charging is not supported in the TPS25820/21, however adding BC1.2 DCP (Dedicated Charging Port)
support with the TPS25820/21 can be done by having the D+ and D- shorted together with a maximum
impedance of 200 Ωbetween them and left floating with respect to ground. This is shown in Figure 19. However
with DCP implementation the port will not support any data transfer, but is capable of advertising charge currents
up to 1.5 A to a legacy device that is connected using a Type-C to Type-A or Micro-B cable. This type of port
allows for wall chargers and car chargers with high-charge capability without the need for enumeration. Figure 19
shows a Type-C source implementation capable of supporting 5-V and 1.5-A charging in a Type-C port that is
also able to support charging of legacy devices when used with a Type-C - μB cable assembly.
Figure 19. Type-C Source Port Implementation with BC 1.2 (DCP Mode) Support
8.2.2.1 Design Requirements
Refer to Design Requirements for the Design Requirements.
8.2.2.2 Detailed Design Procedure
Refer to Detailed Design Procedure for the Detailed Design Procedure.
8.2.2.3 Application Curves
Refer to Application Curves for the Application Curves.
8.2.3 Implementing a USB 3.1 Type-C Charging Port with the TPS25820
Figure 20 shows a conceptual implementation of USB 3.1 capable Type-C DFP, used in notebook, desktop, LCD
monitor or dock application where both USB data and charging is supported. USB 2.0 data lines are connected
directly to Type-C receptacle while USB 3.1 data is connected through a USB 3.1 MUX. The TPS25820 controls
the USB 3.1 MUX via its POL pin. In this implementation if the USB host/hub is capable of supporting BC1.2
charging then it is possible to support both BC1.2 and Type-C charging from the same Type-C port.
l TEXAS INSTRUMENTS sz XnZ sz XnZ
USB 3.1 Hub/Host USB 3.1 MUX
TPS25820
SSRXp, SSRXn
SSTXp, SSTXn
SSRXp1, SSRXp2
SSRXn1, SSRXn2
SSTXp1, SSTXp2
SSTXn1, SSTXn2
D+/D-
VBUS
POL
Power In
Type-C Port
CHG
CC1
CC2
EN
Copyright © 2017, Texas Instruments Incorporated
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Typical Applications (continued)
Figure 20. USB 3.1 Type-C Charging Port
8.2.3.1 Design Requirements
Refer to Design Requirements for the Design Requirements.
8.2.3.2 Detailed Design Procedure
Refer to Detailed Design Procedure for the Detailed Design Procedure.
8.2.3.3 Application Curves
Refer to Application Curves for the Application Curves.
8.2.4 Implementing TPS25821 in USB Car Chargers
Given its small footprint, highly integrated design and ultralow standby current, the TPS25821 is ideal for use in
cigarette lighter adapter (CLA) USB car chargers capable of supporting Type-C 1.5-A and BC1.2 DCP charging
from same Type-C port. This makes it suitable for fast charging phones with either µB or Type-C connector.
Figure 21 shows such an implementation for a two port CLA design. The LMS3635 was chosen for its wide VIN
and high efficiency to allow for the compact design needed in a CLA body.
l TEXAS INSTRUMENTS
LMS3635
(3.5A Synchronous
Buck Regulator)
TPS25821
(USB Type-C Source
Charger)
TPS25821
(USB Type-C Source
Charger)
5V, 1.5A
5V, 1.5A
6.5V-36V
Copyright © 2017, Texas Instruments Incorporated
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Typical Applications (continued)
Figure 21. USB Car Charger
8.2.4.1 Design Requirements
Refer to Design Requirements for the Design Requirements.
8.2.4.2 Detailed Design Procedure
Refer to Detailed Design Procedure for the Detailed Design Procedure.
8.2.4.3 Application Curves
Refer to Application Curves for the Application Curves.
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9 Power Supply Recommendations
The device has one power supply input, IN, which is the chip supply. It is connected to the OUT pin via a power
integrated MOSFET and in the case of the TPS25820 it also is MUXed either to CC1 or CC2 pin in the Type-C
receptacle depending on cable plug polarity.
USB Specification Revision 2.0 and 3.1 requires VBUS voltage at the connector be between 4.75 V to 5.5 V.
Depending on layout and routing from supply to the connector, the voltage droop on VBUS has to be tightly
controlled especially when providing 1.5 A. Locate the input supply close to the device. For all applications, a
ceramic bypass capacitor between OUT and GND less than 10 μF is recommended and should be placed as
close to the Type-C connector and device as possible for local noise decoupling. The power supply should be
rated higher than the current limit set to avoid voltage droops during overcurrent and short-circuit conditions. Also
see Input and Output Capacitance Considerations on chip by-passing considerations.
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10 Layout
10.1 Layout Guidelines
Layout best practices as it applies to the TPS25820/21 are listed below.
For all applications a ceramic capacitor less than 10 µF is recommended near the Type-C receptacle and
another 120-µF ceramic capacitor placed close to the IN pin.
The optimum placement of the 120-µF capacitor is closest to the IN and GND pins of the device.
Care must be taken to minimize the loop area formed by the bypass-capacitor connection, the IN pin, and
the GND pin of the IC. See Figure 22 for a PCB layout example.
High current carrying power path connections to the device should be as short as possible and should be
sized to carry at least twice the full-load current.
Have the input and output traces as short as possible. The most common cause of voltage drop failure in
USB power delivery is the resistance associated with the VBUS trace. Trace length, maximum current
being supplied for normal operation, and total resistance associated with the VBUS trace must be taken
into account while budgeting for voltage drop.
For example, a power carrying trace that supplies 1.5 A, at a distance of 20 inches, 0.100-in. wide, with 2-
oz. copper on the outer layer will have a total resistance of approximately 0.046 Ωand voltage drop of
0.07 V. The same trace at 0.050-in.-wide will have a total resistance of approximately 0.09 Ωand voltage
drop of 0.14 V.
Make power traces as wide as possible.
The resistor attached to the REF pin of the device has several requirements:
It is recommended to use a 0.5% 100-kresistor.
It should be connected to pins REF and GND.
The trace routing between the REF and GND pins of the device should be as short as possible to reduce
parasitic effects on the current limit and current advertisement accuracy. These traces should not have
any coupling to switching signals on the board.
Locate all TPS25820/21 pull-up resistors for open-drain outputs close to their connection pin. Pull-up resistors
should be 100 k.
When a particular open drain output is not used/needed in the system leave the associated pin open or
tied to GND.
Keep the CC lines close to the same length.
Thermal Considerations:
When properly mounted, the thermal pad package provides significantly greater cooling ability than an
ordinary package. To operate at rated power, the thermal pad must be soldered to the board GND plane
directly under the device. The thermal pad is at GND potential and can be connected using multiple vias
to inner layer GND. Other planes, such as the bottom side of the circuit board can be used to increase
heat sinking in higher current applications. Refer to Technical Briefs: PowerPad™ Thermally Enhanced
Package (TI literature Number SLMA002) and PowerPAD™ Made Easy (TI Literature Number SLMA004)
or more information on using this thermal pad package.
The thermal via land pattern specific to the TPS25820/21 can be downloaded from the device web page at
www.ti.com.
Obtaining acceptable performance with alternate layout schemes is possible; however the layout example
in the following section has been shown to produce good results and is intended as a guideline.
INSTRUMENTS OO OOO OOO
Signal Ground
Top Layer
POL#
REF
CC1
CC2
OUT
SINK#
FAULT#
EN
CHG
IN Thermal
Pad
1
2
3
4
5
6
12
11
10
9
8
7
Top Layer Signal Trace
GND
Top Layer Signal Ground Plane
Bottom Layer Signal Ground Plane
3
Via to Bottom Layer Ground Plane
24
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10.2 Layout Example
Figure 22. Layout Example
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation see the following:
PowerPad™ Thermally Enhanced Package (TI literature Number SLMA002)
PowerPAD™ Made Easy (TI Literature Number SLMA004)
TPS25810EVM-745 User's Guide (SLVUAI0)
Protecting the TPS25810 from High Voltage DFPs (SLVA751)
11.3 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 4. Related Links
PARTS PRODUCT FOLDER ORDER NOW TECHNICAL
DOCUMENTS TOOLS &
SOFTWARE SUPPORT &
COMMUNITY
TPS25820 Click here Click here Click here Click here Click here
TPS25821 Click here Click here Click here Click here Click here
11.4 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.5 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.6 Trademarks
E2E is a trademark of Texas Instruments.
11.7 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
l TEXAS INSTRUMENTS
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,
TPS25821
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11.8 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
TEXAS INSTRUMENTS Samples Sample: Sample: Samples
PACKAGE OPTION ADDENDUM
www.ti.com 28-Sep-2021
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS25820DSSR ACTIVE WSON DSS 12 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 25820
TPS25820DSST ACTIVE WSON DSS 12 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 25820
TPS25821DSSR ACTIVE WSON DSS 12 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 25821
TPS25821DSST ACTIVE WSON DSS 12 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 25821
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 28-Sep-2021
Addendum-Page 2
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
I TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS 7 “KO '«m» Reel Diameter AD Dimension destgned to accommodate the component with ED Dimension destgned to accommodate the component \engm K0 Dimenslun destgneo to accommodate the component thickness , w OveraH wtdm loe earner tape i p1 Pitch between successwe cavuy cemers f T Reel Width (W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE O O O D O O D D SprocketHules ,,,,,,,,,,, ‘ User Direcllon 0' Feed Pockel Quadrams
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS25820DSSR WSON DSS 12 3000 180.0 8.4 2.25 3.25 1.05 4.0 8.0 Q1
TPS25820DSST WSON DSS 12 250 180.0 8.4 2.25 3.25 1.05 4.0 8.0 Q1
TPS25821DSSR WSON DSS 12 3000 180.0 8.4 2.25 3.25 1.05 4.0 8.0 Q1
TPS25821DSST WSON DSS 12 250 180.0 8.4 2.25 3.25 1.05 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 9-Aug-2019
Pack Materials-Page 1
I TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS25820DSSR WSON DSS 12 3000 210.0 185.0 35.0
TPS25820DSST WSON DSS 12 250 210.0 185.0 35.0
TPS25821DSSR WSON DSS 12 3000 210.0 185.0 35.0
TPS25821DSST WSON DSS 12 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 9-Aug-2019
Pack Materials-Page 2
GENERIC PACKAGE VIEW D33 12 WSON - 0.8 mm max heigm PLASTIC SMALL OUTLINE , N0 LEAD Images above are jusl a represenlalion of the package family, aclual package may vary Refel lo the product dala sheel for package details. 4209244/D I TEXAS INSTRI IMFNTS
1@ 4 41 LEEEEr \w ““‘+“““\\
www.ti.com
PACKAGE OUTLINE
C
12X 0.3
0.2
2.65 0.1
12X 0.35
0.25
2X
2.5
1 0.1
10X 0.5
0.8 MAX
0.05
0.00
B2.1
1.9 A
3.1
2.9
0.35
0.25
0.3
0.2
(0.2) TYP
WSON - 0.8 mm max heightDSS0012B
PLASTIC SMALL OUTLINE - NO LEAD
4218908/A 01/2017
PIN 1 INDEX AREA
SEATING PLANE
0.08 C
1
67
12
(OPTIONAL)
PIN 1 ID 0.1 C A B
0.05 C
THERMAL PAD
EXPOSED
13
SYMM
SYMM
SEE TERMINAL
DETAIL
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
SCALE 4.500
DETAIL
OPTIONAL TERMINAL
TYPICAL
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EXAMPLE BOARD LAYOUT
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
(1)
10X (0.5)
(1.9)
12X (0.25)
12X (0.5)
(2.65)
(R0.05) TYP
( 0.2) VIA
TYP
(1.075)
WSON - 0.8 mm max heightDSS0012B
PLASTIC SMALL OUTLINE - NO LEAD
4218908/A 01/2017
SYMM
1
67
12
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:25X
13
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
SOLDER MASK
OPENING
SOLDER MASK
METAL UNDER
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
(PREFERRED)
EXPOSDE METAL
Y: LIT‘ +\‘\‘\c flag@gfl¢g
www.ti.com
EXAMPLE STENCIL DESIGN
(0.685)
12X (0.25)
12X (0.5)
10X (0.5)
2X (1.17)
2X (0.95)
(1.9)
(R0.05) TYP
WSON - 0.8 mm max heightDSS0012B
PLASTIC SMALL OUTLINE - NO LEAD
4218908/A 01/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 13:
83% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X
SYMM
1
67
12
SYMM
EXPOSED METAL
TYP
13
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