Datenblatt für SN74AHCT32-Q1 von Texas Instruments

[ ] [ ] [ ] [ 4 t1 ] 0 Inputs Are TTL-Vollage Compatible [ 5 to ] . . . . . [ 6 9 ] description/ordering Intormation [ 7 a J The SN74AHCT32 is a quadruple 27inpu1 positiverOFi gate. This device pefiorms the Booiean function Y : A qur Y : A + B tn positive Iogtc. ORDERING INFORMATIONT ORDERABLE TOP-SI TA PACKAGE PART NUMBER MARKIN sotc — D Tape and reet SN74AHCT320DRQI AHCTSZQ —40°c to 12st TSSOF — PW Tape and reet SN74AHCT320PWRO! AHCTSZQ ' For tne most current package and ordertng rntdrrnatron, see the Package Option Addendum at tn this dacumenir Or see the T1 web srte at htlp //wwwtr,cdrn ? Package drawingsr tnerrnat data, and symbohzahon are avatlabie at http.//www.tr.cdm/packagrn FUNCTION TABLE teach gate) INPUTS A OUTPUT V r-Ixu'i H X L H H L logic symbolT 1 1A 2 1B 4 2A 5 ZS 9 3A 10 SE 12 4A 1:1 AB 11 ' Thts symbot ts tn accordance wtth ANSI/IEEE std 9171964 and IEC Publtcatten 617712. 1V 2V 3V 4V Ptease be aware that an rrnpdrtant nptrce concerning avartamtrty, standard warranty, and use Texas Instruments semrconctuctpr products and drectatmers thereto appears at the end at this ctata sh vacuum)" nAvA nla Producb mntcrrrr m in rr 1! current at d d a P ‘ nspulhedhermxnnrn rudiment; I tr." .r mm, m rum mm usualnetesuii rm. urtngrtutp...¥m.t " 9 V TEXAS INSTRUMENTS POST OFFICE eox 555m - DALLAS IEXAS 75255 Copyrtgm 2005,
SN74AHCT32-Q1
QUADRUPLE 2-INPUT POSITIVE-OR GATE
SCLS528A − AUGUST 2003 − REVISED APRIL 2008
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DQualified for Automotive Applications
DESD Protection Exceeds 1000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
DEPIC (Enhanced-Performance Implanted
CMOS) Process
DInputs Are TTL-Voltage Compatible
description/ordering information
The SN74AHCT32 is a quadruple 2-input
positive-OR gate. This device performs the Boolean
function Y +A•Bor Y +A)B in positive logic.
ORDERING INFORMATION{
TAPACKAGE‡ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
40°C to 125°C
SOIC − D Tape and reel SN74AHCT32QDRQ1 AHCT32Q
−40°C to 125°CTSSOP − PW Tape and reel SN74AHCT32QPWRQ1 AHCT32Q
†For the most current package and ordering information, see the Package Option Addendum at the end of
this document, or see the TI web site at http://www.ti.com.
‡Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION TABLE
(each gate)
INPUTS OUTPUT
A B
OUTPUT
Y
H X H
XHH
L L L
logic symbol†
1
1A 2
1B 4
2A 5
2B 9
3A 10
3B 12
4A 13
4B
≥ 1 1Y
3
2Y
6
3Y
8
4Y
11
†This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2008, Texas Instruments Incorporated
D OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
EPIC is a trademark of Texas Instruments.
*9 TEXAS INSTRUMENTS 2 POST OFFICE sex 5553
SN74AHCT32-Q1
QUADRUPLE 2-INPUT POSITIVE-OR GATE
SCLS528A − AUGUST 2003 − REVISED APRIL 2008
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram, each gate (positive logic)
A
B
Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) −0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) −20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN MAX UNIT
VCC Supply voltage 4.5 5.5 V
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
VIInput voltage 0 5.5 V
VOOutput voltage 0 VCC V
IOH High-level output current −8 mA
IOL Low-level output current 8 mA
∆t/∆vInput transition rise or fall rate 20 ns/V
TAOperating free-air temperature −40 125 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
*5 TEXAS INSTRUMENTS
SN74AHCT32-Q1
QUADRUPLE 2-INPUT POSITIVE-OR GATE
SCLS528A − AUGUST 2003 − REVISED APRIL 2008
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
V
TA = 25°C
MIN
MAX
UNIT
PARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN MAX UNIT
V
IOH = −50 mA
45V
4.4 4.5 4.4
V
VOH IOH = −8 mA 4.5 V 3.94 3.8 V
V
IOL = 50 mA
45V
0.1 0.1
V
VOL IOL = 8 mA 4.5 V 0.36 0.44 V
IIVI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1mA
ICC VI = VCC or GND, IO = 0 5.5 V 2 20 mA
∆ICC†One input at 3.4 V,
Other inputs at VCC or GND 5.5 V 1.35 1.5 mA
CiVI = VCC or GND 5 V 2 10 pF
†This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC.
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ±0.5 V (unless otherwise noted) (see Figure 1)
FROM TO LOAD TA = 25°C
MIN
MAX
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
CAPACITANCE MIN TYP MAX MIN MAX UNIT
tPLH
AorB
Y
5 6.9 1 8
ns
tPHL
A or B Y CL = 15 pF 5 6.9 1 8 ns
tPLH
AorB
Y
5.5 7.9 1 9
ns
tPHL
A or B Y CL = 50 pF 5.5 7.9 1 9 ns
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4)
PARAMETER MIN TYP MAX UNIT
VOL(P) Quiet output, maximum dynamic VOL 0.4 0.8 V
VOL(V) Quiet output, minimum dynamic VOL −0.4 −0.8 V
VOH(V) Quiet output, minimum dynamic VOH 4.5 V
VIH(D) High-level dynamic input voltage 2 V
VIL(D) Low-level dynamic input voltage 0.8 V
NOTE 4: Characteristics are for surface-mount packages only.
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance No load, f = 1 MHz 11.5 pF
(see lnpul lnpul ln-Phase Output Out-ot-Phase Output Ct. Note A) I 51 0 Ct. (see Note A) I o LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS VOLTAGE WAVEFORMS PULSE DURATION m w ‘ ‘ av «m H h—et «put I ,7, Von 50% vcc I 50% vcc ‘ VOL I IPHL H H—Dfii Itam I I Von 5% 50% vcc Z! 50% vcc , 7 7 VOL VOLTAGE WAVEFORMS PROPAGATION DELAV TIMES INVERTING AND NONINVERTING OUTPUTS NOTES, A. B. C. D. r:L InCIudes probe and to capacttance. Tlmlng Input Data Input Output Control Output WaveIorm 1 SI at vcc tsee Note 5) Output WaveIorm 2 SI at GND tsee Note a) Wavetotm 1 ts Ior an output wttn thternat eohcttttons such that the output ts Io WaveIorm 2 ts Ior an output wtth tnternat eonotttons such that the output ts h AII tnput pulses are supptteo by generators hautng the IoIlowmg charactenstt The outputs are measured one at a ttme wtth one tnput transttton per measu *9 TEXAS INSTRUMENTS POST OFFICE aox 555m - DALLAS TEXAS 75255
SN74AHCT32-Q1
QUADRUPLE 2-INPUT POSITIVE-OR GATE
SCLS528A − AUGUST 2003 − REVISED APRIL 2008
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50% VCC
3 V
3 V
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Data Input
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
3 V
0 V
50% VCC
50% VCC
Input
Out-of-Phase
Output
In-Phase
Output
Timing Input
50% VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Control
Output
Waveform 1
S1 at VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
≈VCC
0 V
50% VCC VOL + 0.3 V
50% VCC
≈0 V
3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
TEST S1
3 V
0 V
tw
VOLTAGE WAVEFORMS
PULSE DURATION
Input
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
S1
VCC
RL = 1 kΩ
GND
From Output
Under Test
CL
(see Note A)
Test
Point
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Open
VOH − 0.3 V
1.5 V 1.5 V
1.5 V
1.5 V 1.5 V
1.5 V 1.5 V1.5 V 1.5 V
Figure 1. Load Circuit and Voltage Waveforms
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74AHCT32QDRG4Q1 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHCT32Q
SN74AHCT32QDRQ1 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHCT32Q
SN74AHCT32QPWRG4Q1 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHCT32Q
SN74AHCT32QPWRQ1 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHCT32Q
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74AHCT32-Q1 :
•Catalog: SN74AHCT32
•Enhanced Product: SN74AHCT32-EP
•Military: SN54AHCT32
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
•Military - QML certified for Military and Defense Applications
I TEXAS INSTRUMENTS ‘3‘ V.'
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
TAPE AND REEL INFORMATION
Reel Width (W1)
REEL DIMENSIONS
A0
B0
K0
W
Dimension designed to accommodate the component length
Dimension designed to accommodate the component thickness
Overall width of the carrier tape
Pitch between successive cavity centers
Dimension designed to accommodate the component width
TAPE DIMENSIONS
K0 P1
B0 W
A0
Cavity
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Pocket Quadrants
Sprocket Holes
Q1 Q1Q2 Q2
Q3 Q3Q4 Q4 User Direction of Feed
P1
Reel
Diameter
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74AHCT32QPWRG4Q1 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74AHCT32QPWRQ1 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
W
L
H
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74AHCT32QPWRG4Q1 TSSOP PW 14 2000 356.0 356.0 35.0
SN74AHCT32QPWRQ1 TSSOP PW 14 2000 356.0 356.0 35.0
Pack Materials-Page 2
MECHANICAL DATA D U1 4)} 0 (3'4) DLASHC SMALL 0U ¥N¥ 4040047 5/M 06/1‘ NO'ES, A AH Hnec' dimensmrs c'e m 'mc'ves ['nflhmeter5> B Th5 drawer ‘5 subje», ,0 change mm: Home, A Body \cngth docs rm mac mod Hoar, p'omswons, (xv gmc bms Mom mm warmers, or gm buns sha‘ nm exceed 3005 (015) eam swce @ Body mm does 101 meme 11mm fish. E Rdererce JEDEC MS 012 mam AB, nter‘ec: flash sfu‘ not exceed 0017 (043) each swde {If TEXAS INSTRUMENTS www.1i.com
MECHANICAL DATA "7’7 : 3‘ AST‘C SMAH CJ’ N7 HHHHHHH . . ‘7,4’ 44*, A f;—‘ NO'ES' A AH Hnec' dimensmrs c'e m m'\\me(ers Dwmens'amnq cnd tu‘erc'vcmg per ASME w 5M 1994, Tm drawer ‘5 subje», ,o "hangs wnrau: Home, Budy \evvgih ‘ues m W" Le mom Hush, pyuws‘m Ur guts Ms M exceed 0,15 each m & Rudy wde does NM Wands \Mer end flair \Mefiead 'Wclsh shaH um exceed 0‘75 each S‘de E Fa‘s WM" JEDEC M07153 MUM "\u>h, main: bus, 01 guie buns shuH {if TEXAS INSTRUMENTS www.ci.com
PW (RiPDsoicM) LAND PATTERN DATA PLASTHC SMALL OUTLINE Example Board Layout (Male 0) —>| ‘,——12x0 65 HHHHHHHi 5,60 HHHHHHHHi l“ l l l Example Non So‘dermask Defined Pad 4 x 1,60 / H l <—0,07 y/="" ah="" around="" pad="" seamelry="" (see="" nale="" c)="" solder="" mask="" opening="" (see="" note="" e)="" stencil="" 0="" en'ln="" s="" (notepd)="" ‘3="" 14x0="" 30="" h="" '«,lzxo="" 65="" ~hhhhhh~="" 5,60="" hhhhhhh—="" example="" example="" 421128472/6="" 08/15="" notes:="" ah="" h‘lneor="" dimensions="" one="" in="" rnihll'rneters.="" tn‘ls="" dvowing="" is="" subject="" lp="" change="" wltnoul="" nallee.="" publl'cotlon="" hpcjssh="" is="" recommended="" lar="" allemale="" deslgns.="" laser="" cutllng="" apertures="" wch="" tropexoidm="" walls="" and="" also="" raund‘lna="" comers="" wlll="" we!="" better="" pasle="" release="" customers="" show="" contact="" their="" board="" assembly="" sl’te="" (ov="" stenci‘="" design="" recommendations.="" reler="" to="" ”50—7525="" lur="" other="" stencl‘="" recommendotluns="" customers="" shou‘d="" contact="" their="" board="" hoercot'lon="" shte="" (or="" solder="" musk="" tolerances="" between="" and="" around="" s'lgnol="" pods.="" *1?="" tums="" instruments="" www.ti.com="">
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