Datenblatt für MIC5021 von Microchip Technology

‘ MIC§CHIP M|C5021 E
2016 Microchip Technology Inc. DS20005677A-page 1
MIC5021
Features
12V to 36V Operation
550 ns Rise/Fall Time Driving 2000 pF
TTL-Compatible Input with Internal Pull-Down
Resistor
Overcurrent Limit
Gate-to-Source Protection
Internal Charge Pump
100 kHz Operation Guaranteed Over Full Tem-
perature and Operating Voltage Range
Compatible with Current-Sensing MOSFETs
Current-Source Drive Reduces EMI
Applications
Lamp Control
Heater Control
Motor Control
Solenoid Switching
Switch-Mode Power Supplies
Circuit Breaker
General Description
The MIC5021 high-side MOSFET driver is designed to
operate at frequencies up to 100 kHz (5 kHz PWM for
2% to 100% duty cycle) and is an ideal choice for high
speed applications such as motor control, SMPS
(switch mode power supplies), and applications using
IGBTs. The MIC5021 can also operate as a circuit
breaker with or without automatic retry.
A rising or falling edge on the input results in a current
source pulse or sink pulse on the gate output. This out-
put current pulse can turn on a 2000 pF MOSFET in
approximately 550 ns. The MIC5021 then supplies a
limited current (<2 mA), if necessary, to maintain the
output state.
An overcurrent comparator with a trip voltage of 50 mV
makes the MIC5021 ideal for use with a current-sens-
ing MOSFET. An external low value resistor may be
used instead of a sensing MOSFET for more precise
overcurrent control. An optional external capacitor
placed from the CT pin to ground may be used to con-
trol the current shutdown duty cycle (dead time) from
20% to <1%. A duty cycle from 20% to about 75% is
possible with an optional pull-up resistor from CT to
VDD. Additional parts of the MIC502x family include the
MIC5020 low-side driver and the MIC5022 half-bridge
driver with a cross-conduction interlock. The MIC5021
is available in 8-pin SOIC and plastic DIP packages.
Typical Application Circuit
MIC5021
PDIP & SOIC
High-Side Driver with Overcurrent Trip and Retry
V
DD
INPUT
C
T
GND
V
BOOST
GATE
SENSE-
SENSE+
TTL INPUT
R
SENSE
N-CHANNEL
POWER MOSFET
+12V to +36V
MIC5021
1
2
3
4
8
7
6
5
10μF
2.7
nF
LOAD
R
SENSE =
50mV
I
TRIP
* INCREASES TIME BEFORE RETRY
OPTIONAL*
High-Speed, High-Side MOSFET Driver with Charge Pump
and Overcurrent Limit
MIC5021
DS20005677A-page 2 2016 Microchip Technology Inc.
Package Types
Functional Block Diagram
MIC5021
SOIC
Top View
MIC5021
PDIP
Top View
1
2
3
4
8
7
6
5
V
BOOST
GATE
SENSE-
SENSE+
V
DD
INPUT
C
T
GND
1
2
3
4
8
7
6
5
VDD
INPUT
CT
GND
VBOOST
GATE
SENSE-
SENSE+
SENSE-
SENSE+
6V INTERNAL REGULATOR
C
INT
I
1
2I
1
50mV
INPUT
ONE-
SHOT
GATE
CT
6V
OFF
ON
FAULT
NORMAL
I
2
10I
2
15V
Q1
CHARGE
PUMP
V
DD
V
BOOST
TRANSISTOR: 106
2016 Microchip Technology Inc. DS20005677A-page 3
MIC5021
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage, VDD................................................................................................................................................. +40V
Input Voltage, VIN ....................................................................................................................................... –0.5V to +15V
Sense Differential Voltage........................................................................................................................................±6.5V
SENSE+ or SENSE– to GND .................................................................................................................... –0.5V to +36V
Timer Voltage .......................................................................................................................................................... +5.5V
VBOOST Capacitor ................................................................................................................................................ 0.01 μF
Operating Ratings
Supply Voltage, VDD.................................................................................................................................... +12V to +36V
Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
DC CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, GND = 0V, VDD = 12V, CT = OPEN,
Gate CL = 1500 pF (IRF540 MOSFET).
Parameters Sym. Min. Typ. Max. Units Conditions
DC Supply Current
——
1.8 4
mA
VDD = 12V, Input = 0V
— 2.5 6 VDD = 36V, Input = 0V
— 1.7 4 VDD = 12V, Input = 5V
— 2.5 6 VDD = 36V, Input = 5V
Input Threshold 0.8 1.4 2.0 V
Input Hysteresis 0.1 V
Input Pull-Down Current 10 20 40 μA Input = 5V
Current-Limit Threshold 30 50 70 mV Note 1
Gate On Voltage —161821
VVDD = 12V (Note 2)
—465052 V
DD = 36V (Note 2)
Gate On-Time (Fixed) tG(ON) 2610μsSense Differential 70 mV
(Note 8)
Gate Off-Time (Adjustable) tG(OFF) 10 20 50 μsSense Differential 70 mV,
CT = 0 pF (Note 8)
Gate Turn-On Delay tDLH 500 1000 ns Note 3
Gate Rise Time tR 400 500 ns Note 4
Gate Turn-Off Delay tDLH 800 1500 ns Note 5
Note 1: When using sense MOSFETs, it is recommended that RSENSE < 50Ω. Higher values may affect the sense
MOSFET’s current transfer ratio.
2: DC measurement.
3: Input switched from 0.8V (TTL low) to 2.0V (TTL high), time for gate transition from 0V to 2V.
4: Input switched from 0.8V (TTL low) to 2.0V (TTL high), time for gate transition from 2V to 17V.
5: Input switched from 2.0V (TTL high) to 0.8V (TTL low), time for gate transition from 20V (gate on voltage)
to 17V.
6: Input switched from 2.0V (TTL high) to 0.8V (TTL low), time for gate transition from 17V to 2V.
7: Frequency where gate on voltage reduces to 17V with 50% input duty cycle.
8: Gate on time tG(ON) and tG(OFF) are not 100% production tested.
MAX
MIC5021
DS20005677A-page 4 2016 Microchip Technology Inc.
Gate Fall Time tF 400 500 ns Note 6
Max. Operating Frequency fMAX 100 150 kHz Note 7
DC CHARACTERISTICS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, GND = 0V, VDD = 12V, CT = OPEN,
Gate CL = 1500 pF (IRF540 MOSFET).
Parameters Sym. Min. Typ. Max. Units Conditions
Note 1: When using sense MOSFETs, it is recommended that RSENSE < 50Ω. Higher values may affect the sense
MOSFET’s current transfer ratio.
2: DC measurement.
3: Input switched from 0.8V (TTL low) to 2.0V (TTL high), time for gate transition from 0V to 2V.
4: Input switched from 0.8V (TTL low) to 2.0V (TTL high), time for gate transition from 2V to 17V.
5: Input switched from 2.0V (TTL high) to 0.8V (TTL low), time for gate transition from 20V (gate on voltage)
to 17V.
6: Input switched from 2.0V (TTL high) to 0.8V (TTL low), time for gate transition from 17V to 2V.
7: Frequency where gate on voltage reduces to 17V with 50% input duty cycle.
8: Gate on time tG(ON) and tG(OFF) are not 100% production tested.
2016 Microchip Technology Inc. DS20005677A-page 5
MIC5021
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters Sym. Min. Typ. Max. Units Conditions
Junction Thermal Resistances
Thermal Resistance, PDIP-8Ld JA –40 85 °C Maximum Ambient Tem-
perature
Thermal Resistance, SOIC-8Ld JA –40 85 °C Maximum Ambient Tem-
perature
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum rating. Sustained junction temperatures above the maximum rating can impact the device
reliability.
MIC5021
DS20005677A-page 6 2016 Microchip Technology Inc.
2.0 TIMING DIAGRAMS
FIGURE 2-1: Normal operation.
FIGURE 2-2: Fault Operation, CT = Open.
FIGURE 2-3: Fault Condition, CT = Grounded.
INPUT
0V
TTL (H)
SOURCE
50mV
SENSE +,–
DIFFERENTIAL
GATE
0V
15V (MAX.)
INPUT
0V
TTL (H)
SOURCE
50mV
SENSE +,–
DIFFERENTIAL
GATE
0V
15V (MAX.)
6μs 20μs
INPUT
0V
TTL (H)
SOURCE
50mV
SENSE +,–
DIFFERENTIAL
GATE
0V
15V (MAX.)
6μs
‘ ‘ ‘ ‘ ‘ \ \ \ VGA :tfl: CL \ \ \ \ \ \ ‘ \ \ \ \ \HHHH \HHHH \HHHH H LY‘ VSUPFLV
2016 Microchip Technology Inc. DS20005677A-page 7
MIC5021
3.0 TYPICAL PERFORMANCE CURVES
FIGURE 3-1: Supply Current vs. Supply
Voltage.
FIGURE 3-2: Gate Voltage Change vs.
Supply Voltage.
FIGURE 3-3: Gate Turn-On Delay vs.
Supply Voltage.
FIGURE 3-4: Gate Turn-On Delay vs.
Supply Voltage.
FIGURE 3-5: Gate Turn-On Delay vs.
Gate Capacitance.
FIGURE 3-6: Gate Turn-Off Delay vs.
Supply Voltage.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0.0
0.5
1.0
1.5
2.0
2.5
5 10152025303540
ISUPPLY (mA)
VSUPPLY (V)
VIN =0V
VIN =5V
0
5
10
15
20
25
5 10152025303540
V
GATE
(V)
V
SUPPLY
(V)
V
GATE
=V
GATE
–V
SUPPLY
650
700
750
800
850
900
5 10152025303540
t
ON 4V
(ns)
V
SUPPLY
(V)
V
GATE
=V
SUPPLY
+4V
C
L
= 1500pF(IRCZ34)
C
BOOST
=0.01μF
INCLUDES PROPAGATION DELAY
750
800
850
900
950
1000
5 10152025303540
t
ON 10V
(ns)
V
SUPPLY
(V)
V
GATE
=V
SUPPLY
+ 10V
C
L
= 1500pF(IRCZ34)
C
BOOST
=0.01μF
INCLUDES PROPAGATION DELAY
0.0
0.5
1.0
1.5
2.0
2.5
1x10
0
1x10
1
1x10
2
1x10
3
1x10
4
1x10
5
t
ON
(μs)
C
GATE
(pF)
V
GATE
=V
SUPPLY
+4V
V
SUPPLY
=12V
INCLUDES PROPAGATION DELAY
750
1000
1250
1500
1750
2000
5 10152025303540
tOFF 4V (ns)
VSUPPLY (V)
V
GATE
=V
SUPPLY
+4V
R
L
= 400
INCLUDES PROPAGATION DELAY
C
GATE
= 1500pF
(IRCZ34)
ME , DENT w \HHHH \HHHH HH \ CI w
MIC5021
DS20005677A-page 8 2016 Microchip Technology Inc.
FIGURE 3-7: Overcurrent Retry Duty
Cycle vs. Timing Capacitance.
FIGURE 3-8: Input Current vs. Input
Voltage.
FIGURE 3-9: Sense Threshold vs.
Temperature.
0
5
10
15
20
25
0.1 1 10 100 1000 10000
RETRY DUTY CYCLE (%)
CT (pF)
NOTE:
tON
,t
OFF TIME
INDEPENDENT
OF VSUPPLY
tON =5μs
VSUPPLY =12V
0
20
40
60
80
100
0 5 10 15 20 25
I
IN
(μA)
V
IN
(V)
V
SUPPLY
=12V
20
30
40
50
60
80
020406080100120
VOLTAGE (mV)
TEMPERATURE (°C)
70
2016 Microchip Technology Inc. DS20005677A-page 9
MIC5021
4.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 4-1.
TABLE 4-1: PIN FUNCTION TABLE
Pin Number Pin Name Description
1V
DD Supply (+12V to 36V). Decouple with 10 μF capacitor.
2 INPUT TTL-Compatible Input. Logic high turns the external MOSFET on. An internal
pull-down returns an open pin logic low.
3CT
Retry Timing Capacitor. Controls the off time (tG(OFF)) of the overcurrent retry cycle
(duty cycle adjustment):
Open = Approximately 20% duty cycle.
Capacitor-to-Ground = Approximately 20% to <1% duty cycle.
Pull-Up Resistor = Approximately 20% to approximately 75% duty cycle.
Ground = Maintained shutdown upon overcurrent condition.
4 GND Circuit Ground.
5 SENSE+
Current-Sense Comparator (+) Input. Connect to high side of sense resistor or cur-
rent sensing MOSFET sense lead. A built-in offset in conjunction with RSENSE
sets the load overcurrent trip point.
6 SENSE– Current-Sense Comparator (–) Input. Connect to the low side of the sense resistor
(usually the high side of the load).
7GATE
Gate Drive. Drives the gate of an external power MOSFET. Also limits VGS to 15V
maximum to prevent gate-to-source damage. Will sink-and-source current.
8V
BOOST
Charge Pump Boost Capacitor. A bootstrap capacitor from VBOOST to the FET
source pin supplies charge to quickly enhance the gate output during turn-on.
MIC5021
DS20005677A-page 10 2016 Microchip Technology Inc.
5.0 FUNCTIONAL DESCRIPTION
Refer to the MIC5021 Functional Block Diagram.
5.1 Input
A signal greater than 1.4V (nominal) applied to the
MIC5021 INPUT causes gate enhancement on an
external MOSFET turning the MOSFET on.
An internal pull-down resistor ensures that an open
input remains low, keeping the external MOSFET
turned off.
5.2 Gate Output
Rapid rise and fall times on the gate output are possible
because each input state change triggers a one-shot
which activates a high-value current sink (10I2) for a
short time. This draws a high current though a current
mirror circuit causing the output transistors to quickly
charge or discharge the external MOSFET’s gate.
A second current sink continuously draws the lower
value of current used to maintain the gate voltage for
the selected state.
An internal charge pump utilizes an external “boost”
capacitor connected between VBOOST and the source
of the external MOSFET (Refer to the Typical Applica-
tion Circuit). The boost capacitor stores charge when
the MOSFET is off. As the MOSFET turns on, its
source to ground voltage increases and is added to the
voltage across the capacitor, raising the VBOOST pin
voltage. The boost capacitor charge is directed through
the gate pin to quickly charge the MOSFET’s gate to
16V maximum above VDD. The internal charge pump
maintains the gate voltage.
An internal Zener diode protects the external MOSFET
by limiting the gate to source voltage.
5.3 SENSE Inputs
The MIC5021’s 50 mV (nominal) trip voltage is created
by internal current sources that force approximately
5 μA out of SENSE+ and approximately 15 μA (at trip)
out of SENSE–. When SENSE– is 50mV or more below
SENSE+, SENSE– steals base current from an internal
drive transistor shutting off the external MOSFET.
5.4 Overcurrent Limiting
Current source I1 charges CINT upon power up. An
optional external capacitor connected to CT is kept dis-
charged through a MOSFET Q1.
A fault condition (>50 mV from SENSE+ to SENSE–)
causes the overcurrent comparator to enable current
sink 2I1 which overcomes current source I1 to dis-
charge CINT in a short time. When CINT is discharged,
the input is disabled, which turns off the gate output,
and CINT and CT are ready to be charged.
When the gate output turns the MOSFET off, the over-
current signal is removed from the sense inputs which
deactivates current sink 2I1.This allows CINT and the
optional capacitor connected to CT to recharge. A
Schmitt trigger delays the retry while the capacitor(s)
recharge. Retry delay is increased by connecting a
capacitor to CT (optional).
The retry cycle will continue until the fault is removed or
the input is changed to TTL low.
If CT is connected to ground, the circuit will not retry
upon a fault condition.
2016 Microchip Technology Inc. DS20005677A-page 11
MIC5021
6.0 APPLICATION INFORMATION
The MIC5021 MOSFET driver is intended for high-side
switching applications where overcurrent limiting and
high speed are required. The MIC5021 can control
MOSFETs that switch voltages up to 36V.
6.1 High-Side Switch Circuit
Advantages
High-side switching allows more of the load related
components and wiring to remain near ground potential
when compared to low-side switching. This reduces the
chances of short-to-ground accidents or failures.
6.2 Speed Advantage
The MIC5021 is about two orders of magnitude faster
than the low cost MIC5014 making it suitable for
high-frequency high-efficiency circuit operation in PWM
(pulse width modulation) designs used for motor con-
trol, SMPS (switch-mode power supply) and heating
element control.
Switched loads (on/off) benefit from the MIC5021’s fast
switching times by allowing use of MOSFETs with
smaller safe operating areas. Larger MOSFETs are
often required when using slower drivers.
6.3 Supply Voltage
The MIC5021’s supply input (VDD) is rated up to 36V.
The supply voltage must be equal to or greater than the
voltage applied to the drain of the external N-channel
MOSFET.
A 16V minimum supply is recommended to produce
continuous on-state, gate drive voltage for standard
MOSFETs (10V nominal gate enhancement).
When the driver is powered from a 12V to 16V supply,
a logic-level MOSFET is recommended (5V nominal
gate enhancement).
PWM operation may produce satisfactory gate
enhancement at lower supply voltages. This occurs
when fast switching repetition makes the boost capac-
itor a more significant voltage supply than the internal
charge pump.
6.4 Logic-Level MOSFET Precautions
Logic-level MOSFETs have lower maximum
gate-to-source voltage ratings (typically ±10V) than
standard MOSFETs (typically ±20V). When an external
MOSFET is turned on, the doubling effect of the boost
capacitor can cause the gate-to-source voltage to
momentarily exceed 10V. Internal zener diodes clamp
this voltage to 16V maximum which is too high for
logic-level MOSFETs. To protect logic-level MOS-
FETs, connect a zener diode (5V VZENER < 10V) from
gate to source.
6.5 Overcurrent Limiting
A 50 mV comparator is provided for current sensing.
The low level trip point minimizes I2R losses when a
power resistor is used for current sensing.
The adjustable retry feature can be used to handle
loads with high initial currents, such as lamps or heat-
ing elements, and can be adjusted from the CT connec-
tion.
CT to ground maintains gate drive shutdown following
an overcurrent condition.
CT open, or a capacitor to ground, causes automatic
retry. The default duty cycle (CT open) is approximately
20%. Refer to the Electrical Characteristics when
selecting a capacitor for reduced duty cycle.
CT through a pull-up resistor to VDD increases the duty
cycle. Increasing the duty cycle increases the power
dissipation in the load and MOSFET under a fault con-
dition. Circuits may become unstable at a duty cycle of
about 75% or higher, depending on conditions. Cau-
tion: The MIC5021 may be damaged if the voltage
applied to CT exceeds the absolute maximum voltage
rating.
6.6 Boost Capacitor Selection
The boost capacitor value will vary depending on the
supply voltage range.
A 0.01 μF boost capacitor is recommended for best
performance in the 12V to 20V range. (See Figure 6-1.)
Larger capacitors may damage the MIC5021.
FIGURE 6-1: 12V to 20V Configuration.
If the full 12V to 36V voltage range is required, the
boost capacitor value must be reduced to 2.7 nF
(Figure 6-2). The recommended configuration for the
20V to 36V range is to place the capacitor is placed
between VDD and VBOOST as shown in Figure 6-3.
V
DD
Input
C
T
Gnd
V
BOOST
Gate
Sense-
Sense+
TTL Input
+12V to +20V
MIC5021
1
2
3
4
8
7
6
5
10μF
0.01
μF
Load
MIC5021
DS20005677A-page 12 2016 Microchip Technology Inc.
FIGURE 6-2: 12V to 36V Configuration.
FIGURE 6-3: Preferred 20V to 36V
Configuration.
Do not use both boost capacitors between VBOOST and
the MOSFET source and VBOOST and VDD at the same
time.
6.7 Current-Sense Resistors
Lead length can be significant when using low value
(<1Ω) resistors for current sensing. Errors caused by
lead length can be avoided by using four-terminal cur-
rent-sensing resistors. Four-terminal resistors are
available from several manufacturers.
6.8 Circuits without Current Sensing
Current sensing may be omitted by connecting the
SENSE+ and SENSE– pins to the source of the MOS-
FET or to the supply. Connecting the sense pins to the
supply is preferred for inductive loads. Do not connect
the sense pins to ground.
FIGURE 6-4: Connecting Sense to
Source.
FIGURE 6-5: Connecting Sense to
Supply.
6.9 Inductive Load Precautions
Circuits controlling inductive loads, such as solenoids
(Figure 6-6) and motors, require precautions when
controlled by the MIC5021. Wire wound resistors,
which are sometimes used to simulate other loads, can
also show significant inductive properties.
An inductive load releases stored energy when its cur-
rent flow is interrupted (when the MOSFET is switched
off). The voltage across the inductor reverses and the
inductor attempts to force current flow. Since the circuit
appears open (the MOSFET appears as a very high
resistance) a very large negative voltage occurs across
the inductor.
V
DD
Input
C
T
Gnd
V
BOOST
Gate
Sense-
Sense+
TTL Input
+20V to +36V
MIC5021
1
2
3
4
8
7
6
5
10μF
2.7
nF
Load
V
DD
Input
C
T
Gnd
V
BOOST
Gate
Sense-
Sense+
TTL Input
+20V to +36V
MIC5021
1
2
3
4
8
7
6
5
10μF
Load
0.01
μF
V
DD
Input
C
T
Gnd
V
BOOST
Gate
Sense-
Sense+
TTL Input
Load
N-Channel
Power MOSFET
V+
MIC5021
1
2
3
4
8
7
6
5
10μF
0.01
μF
V
DD
INPUT
C
T
GND
V
BOOST
GATE
SENSE-
SENSE+
TTL INPUT
LOAD
N-CHANNEL
POWER MOSFET
V+
MIC5021
1
2
3
4
8
7
6
5
10μF
0.01
μF
w p <17>
2016 Microchip Technology Inc. DS20005677A-page 13
MIC5021
FIGURE 6-6: Solenoid Driver with Current
Sensing.
6.9.1 LIMITING INDUCTIVE SPIKES
The voltage across the inductor can be limited by con-
necting a Schottky diode across the load. The diode is
forward biased only when the load is switched off. The
Schottky diode clamps negative transients to a few
volts. This protects the MOSFET from drain-to-source
breakdown and prevents the transient from damaging
the charge pump by way of the boost capacitor (see
Sense Pin Considerations).
The diode should have a peak forward current rating
greater than the load current. This is because the cur-
rent through the diode is the same as the load current
at the instant the MOSFET is turned off.
6.9.2 SENSE PIN CONSIDERATIONS
The sense pins of the MIC5021 are sensitive to nega-
tive voltages. Forcing the sense pins much below
–0.5V effectively reverses the supply voltage on por-
tions of the driver resulting in unpredictable operation
or damage.
Figure 6-7 shows current flowing out of the sense leads
of an MIC5021 during a negative transient (inductive
kick). Internal Schottky diodes attempt to limit the neg-
ative transient by maintaining a low forward drop.
FIGURE 6-7: Inductive Load Turn-Off.
Although the internal Schottky diodes can protect the
driver in low-current resistive applications, they are
inadequate for inductive loads or the lead inductance in
high-current resistive loads. Because of their small
size, the diodes’ forward voltage drop quickly exceeds
0.5V as current increases.
6.9.3 EXTERNAL PROTECTION
Resistors placed in series with each SENSE connec-
tion limit the current drawn from the internal Schottky
diodes during a negative transient. This minimizes the
forward drop across the diodes.
During normal operation, sensing current from the
sense pins is unequal (5 μA and 15 μA). The internal
Schottky diodes are reverse-biased and have no effect.
To avoid skewing the trip voltage, the current limiting
resistors must drop equal voltages at the trip point cur-
rents (see Figure 6-8). To minimize resistor tolerance
error, use a voltage drop lower than the trip voltage of
50 mV. 5 mV is suggested.
FIGURE 6-8: Resistor Voltage Drop.
V
DD
INPUT
C
T
GND
V
BOOST
GATE
SENSE-
SENSE+
TTL INPUT
R
SENSE
N-CHANNEL
POWER MOSFET
(IRF540)
+20V TO +36V
MIC5021
1
2
3
4
8
7
6
5
10μF
SOLENOID
(24V, 47Ω)
0.01
μF
SCHOTTKY
DIODE
(1N5822)
(+24V)
(<0.08Ω)
MOSFET
TURN-OFF
0V
NEGATIVE
SPIKE
~V
DD
VDD
INPUT
CT
GATE
MIC5021
1
2
3
4
8
7
6
5
INDUCTIVE
LOAD
FORWARD DROP ACROSS DIODES
ALLOWS LEADS TO GO NEGATIVE
CURRENT FLOWS FROM GROUND (0V)
THROUGH THE DIODES TO THE LOAD
DURING NEGATIVE TRANSCIENTS.
VDD
INPUT
CT
GND
V
BOOST
GATE
SENSE-
SENSE+
N-CHANNEL
POWER MOSFET
MIC5021
1
2
3
4
8
7
6
5
R
S
LOAD
A
15μA
V
R2
R1
R2
V
R1
=V
R2
TO AVOID SKEWING
THE 50mV TRIP POINT.
(5mV SUGGESTED)
R1 3
×
R2
VR1
50mV NOMINAL
(@ TRIP)
=
~
MIC5021
DS20005677A-page 14 2016 Microchip Technology Inc.
External Schottky diodes are also recommended (see
D2 and D3 in Figure 6-9). The external diodes clamp
negative transients better than the internal diodes
because their larger size minimizes the forward voltage
drop at higher currents.
FIGURE 6-9: Protection from Inductive
Kick.
6.9.4 HIGH-SIDE SENSING
Sensing the current on the high side of the MOSFET
isolates the sense pins from the inductive spike.
FIGURE 6-10: High-Side Sensing.
6.10 Lamp Driver Application
Incandescent lamps have a high inrush current (low
resistance) when turned on. The MIC5021 can perform
a “soft start” by pulsing the MOSFET (overcurrent con-
dition) until the filament is warm and its current
decreases (resistance increases). The sense resistor
value is selected so the voltage drop across the sense
resistor decreases below the sense threshold (50 mV)
as the filament becomes warm. The FET is no longer
pulsed and the lamp turns completely on.
A lamp may not fully turn on if the filament does not
heat up adequately. Changing the duty cycle, sense
resistor, or both to match the filament characteristics
can correct the problem.
Soft start can be demonstrated using a #1157 dual fila-
ment automotive lamp. The value of RS shown in
Figure 6-11 allows for soft start of the higher-resistance
filament (measures approx. 2.1Ω cold or 21Ω hot).
FIGURE 6-11: Lamp Driver with Current
Sensing.
6.11 Remote Overcurrent Limiting
Reset
In circuit breaker applications where the MIC5021
maintains an off condition after an overcurrent condi-
tion is sensed, the CT pin can be used to reset the
MIC5021.
FIGURE 6-12: Remote Control Circuit.
Switching Q1 on pulls CT low which keeps the
MIC5021 gate output off when an overcurrent is
sensed. Switching Q1 off causes CT to appear open.
The MIC5021 retries in about 20 μs and continues to
retry until the overcurrent condition is removed.
For demonstration purposes, a 680Ω load resistor and
3Ω sense resistor will produce an overcurrent condition
when the load’s supply (V+) is approximately 12V or
greater.
V
DD
INPUT
C
T
GND
V
BOOST
GATE
SENSE-
SENSE+
TTL INPUT
INDUCTIVE
LOAD
N-CHANNEL
POWER MOSFET
+12V TO +36V
MIC5021
1
2
3
4
8
7
6
5
10μF
2.7
nF
R
SENSE
1.0k
330Ω
R2
D2
11DQ03
D3
11DQ03
D1
R1
V
DD
INPUT
C
T
GND
V
BOOST
GATE
SENSE-
SENSE+
TTL INPUT
WIREWOUND
RESISTOR
(3
Ω)
N-CHANNEL
POWER MOSFET
(IRFZ44)
+12V TO +20V
RSENSE
(< 0.01Ω)
(+12V)
MIC5021
1
2
3
4
8
7
6
5
10μF
0.01
μF
V
DD
INPUT
C
T
GND
V
BOOST
GATE
SENSE-
SENSE+
TTL INPUT
R
SENSE
(0.041Ω)
N-CHANNEL
POWER MOSFET
(IRF540)
V+
MIC5021
1
2
3
4
8
7
6
5
10μF
0.01
μF
INCANDESCENT
LAMP (#1157)
(+12V)
"( )" VALUES APPLY TO DEMO CIRCUIT.
SEE TEXT.
V
DD
INPUT
C
T
GND
V
BOOST
GATE
SENSE-
SENSE+
TTL INPUT
R
SENSE
N-CHANNEL
POWER MOSFET
+12V TO +20V
MIC5021
1
2
3
4
8
7
6
5
10μF
0.01
μF
LOAD
74HC04
(EXAMPLE)
2N3904
Q1
10k TO
100k
RETRY (H)
MAINTAINED (L)
2016 Microchip Technology Inc. DS20005677A-page 15
MIC5021
The gate-to-source configuration (refer to Figure 6-13)
is appropriate for resistive and inductive loads. This
also causes the smallest decrease in gate output volt-
age.
FIGURE 6-13: Gate-to-Source Pull-Down.
The gate-to-ground configuration (refer to Figure 6-14)
is appropriate for resistive, inductive, or capacitive
loads. This configuration will decrease the gate output
voltage slightly more than the circuit shown in
Figure 6-13.
FIGURE 6-14: Gate-to-Ground Pull-Down.
V
DD
INPUT
C
T
GND
V
BOOST
GATE
SENSE-
SENSE+
TTL INPUT
RSENSE
+12V TO +36V
MIC5021AJB
1
2
3
4
8
7
6
5
10μF
2.7
nF
LOAD
2.2M
ADD RESISTOR FOR
-40°C TO -55°C OPERATION
V
DD
INPUT
C
T
GND
V
BOOST
GATE
SENSE-
SENSE+
TTL INPUT
R
SENSE
+12V TO +36V
MIC5021AJB
1
2
3
4
8
7
6
5
10μF
2.7
nF
LOAD
2.2M
ADD RESISTOR FOR
-40°C TO -55°C OPERATION
NNN
MIC5021
DS20005677A-page 16 2016 Microchip Technology Inc.
7.0 PACKAGING INFORMATION
7.1 Package Marking Information
8-lead PDIP* Example
XXX
XXXXX
YYWW
MIC
5021YN
1127
8-lead SOIC* Example
XXX
XXXXX
YYWW
MIC
5021YM
0812
Legend: XX...X Product code or customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
, , Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available charac-
ters for customer-specific information. Package may or may not include the
corporate logo.
Underbar (_) and/or Overbar () symbol may not be to scale.
3
e
3
e
TITLE 8 LEAD PDIP PACKAGE OUTLINE & RECOMMENDED LAND PATTERN DRAWING u PDIP’SLD’PL’I UNIT INCH Lead Frame Coppe: Lead Finish Matte Tin mama: TDP VIEW 5 75 5% ‘«‘ ? N” L C. m ‘ 4m us m on n» a mm c S‘DE V‘EW an ans ‘ 1 ‘ I - um I" 7} § 5 5 mm m m. m END VIEW rm n22 \mumm nu 3mm M
2016 Microchip Technology Inc. DS20005677A-page 17
MIC5021
8-Lead PDIP Package Outline & Recommended Land Pattern
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
TITLE 8 LEAD SOICN PACKAGE OUTLINE & RECOMMENDED LAND PATTERN DRAWING a |SOICN78LD7PL71 m n 111 Mm gamma [599mm um fifi mam] mp vmv E— n:- s 7:. n m: 5333;“? m :3 1g; 1 w a 155 2g [:1 w :3}; 1 as: mum mm at n s: :33.) G) J WWW men :m 1 n nus mg; (111513;: J w NDTES 1 mmmsmns ARE IN wwnmm CEINTREILLINE DIMENSIEIN‘ INCHES DIMENSJDN DUES NEIT INCLUDE MEILD FLASH ma paurzusmNs, [mm or WHICH SHALL NUT EXCEED omnmes] PER SIDE 4 DETAIL % L—uLHES :me [u e; 53.33 ] UNIT | INCH [MM] 7 )DYYEIN MARK FY nuasmmn nu Mg; L J L m u 1:51 masuuin nsc w [ssaffli] mmifltEIJ L J L [L27 am P N
MIC5021
DS20005677A-page 18 2016 Microchip Technology Inc.
8-Lead SOICN Package Outline & Recommended Land Pattern
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
2016 Microchip Technology Inc. DS20005677A-page 19
MIC5021
APPENDIX A: REVISION HISTORY
Revision A (December 2016)
Converted Micrel document MIC5021 to Micro-
chip data sheet template DS20005677A.
Minor grammatical text changes throughout.
MIC5021
DS20005677A-page 20 2016 Microchip Technology Inc.
NOTES:
RT —I>< —'=""><>
2016 Microchip Technology Inc. DS20005677A-page 21
MIC5021
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Examples:
a) MIC5021YM: High-Speed, High-Side
MOSFET Driver with
Charge Pump and Over-
current Limit,
–40°C to +85°C (RoHS
Compliant),
8LD SOIC
b) MIC5021YN: High-Speed, High-Side
MOSFET Driver with
Charge Pump and Over-
current Limit,
–40°C to +85°C (RoHS
Compliant),
8LD Plastic DIP
PART NO. X XX
PackageTemperature
Range
Device
Device: MIC5021: High-Speed, High-Side MOSFET Driver with
Charge Pump and Overcurrent Limit
Temperature
Range: Y = –40C to +85C (RoHS Compliant)
Packages: M = 8-Pin SOIC
N = 8-Pin Plastic DIP
Note 1: Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and
is not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
MIC5021
DS20005677A-page 22 2016 Microchip Technology Inc.
NOTES:
QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV = ISO/TS 16949 =
2016 Microchip Technology Inc. DS00000000A-page 23
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA,
and ZENA are trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2016, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-1200-7
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
6‘ ‘MICRDCHIP
DS20005677A-page 24 2016 Microchip Technology Inc.
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11/07/16