Datenblatt für OSD335x Family von Octavo Systems LLC

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OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

Introduction

The OSD335x Family of System-In-

Package (SIP) products are building blocks

designed to allow easy and cost-effective

implementation of systems based on Texas

Instruments’ powerful Sitara™ AM335x line

of processors. The OSD335x integrates the

AM335x along with the TI TPS65217C

PMIC, the TI TL5209 LDO, up to 1 Gigabyte

of DDR3 Memory, and resistors, capacitors,

and inductors all into a single 27mm x

27mm design-in-ready package.

With this level of integration, the OSD335x

Family of SIPs allows designers to focus on

the key aspects of their system without

spending time on the complicated high-

speed design of the processor/DDR3

interface or the PMIC power distribution. It

also reduces the overall size and complexity

of the design and the supply chain. The

OSD335x can significantly decrease the

time to market for AM335x-based products.

Features

• TI AM335x, TPS65217C, TL5209,

DDR3, and over 140 Passive

components integrated into a single

package

• TI AM335x Features:

o ARM® Cortex®-A8 up to 1GHz

o 8 channel 12-bit SAR ADC

o Ethernet 10/100/1000 x2

o USB 2.0 HS OTG + PHY x2

o MMC, SD and SDIO x2

o LCD Controller

o SGX 3D Graphics Engine

o PRU Subsystem

• Access to All AM335x Peripherals:

CAN, SPI, UART, I2C, GPIO, etc.

• Up to 1GB DDR3

• PWR In: AC Adapter, USB or Single

cell (1S) Li-Ion / Li-Po Battery

• PWR Out: 1.8V, 3.3V and SYS

• AM335x I/O Voltage: 3.3V

Benefits

• Integrates over 100 components into

one package

• Compatible with AM335x

development tools and software

• Wide BGA ball pitch allows for low-

cost assembly.

• Significantly reduces design time

• Decreases layout complexity

• 35% reduction in board space vs

discrete implementation

• Increased reliability through reduced

number of components

Package

• 400 Ball BGA (27mm X 27mm)

• 20 X 20 grid, 1.27mm pitch

• Temp Range: 0 to 85°C, -40 to 85°C

OSD335x Block Diagram

on

OSD335x BAS/IND Datasheet 
Rev. 16 1/1/2021 
Octavo Systems LLC 
Copyright 2016-2021 
Table of Contents 
Revision History ....................................................................................... 4 
Block Diagram ......................................................................................... 5 
1  Passives ........................................................................................... 6 
1.1  Additional Required Bulk Capacitance .................................................. 6 
1.2  Integrated Bulk Capacitance ............................................................. 6 
1.3  Integrated Resistors ........................................................................ 7 
Product Number Information ........................................................................ 8 
Reference Documents ............................................................................... 10 
1  Data Sheets ...................................................................................... 10 
2  Other Reference ................................................................................ 10 
Ball Map ............................................................................................... 11 
1  Ball Description ................................................................................. 17 
2  AM335x Relocated Signals ..................................................................... 20 
3  Not Connected Balls ............................................................................ 20 
4  Reserved Signals ................................................................................ 21 
OSD335x Components ............................................................................... 22 
1  AM335x Processor ............................................................................... 22 
1.1  I/O Voltages ................................................................................ 22 
2  DDR3 Memory.................................................................................... 22 
Power Management .................................................................................. 24 
1  Input Power...................................................................................... 24 
1.1  VIN_AC ...................................................................................... 24 
1.2  VIN_USB ..................................................................................... 24 
1.3  VIN_BAT ..................................................................................... 24 
2  Output Power ................................................................................... 24 
2.1  SYS_VOUT: Switched VIN_AC, VIN_USB, or VIN_BAT ................................. 24 
2.2  SYS_VDD1_3P3V............................................................................ 25 
2.3  SYS_VDD2_3P3V............................................................................ 25 
2.4  SYS_RTC_1P8V ............................................................................. 25 
2.5  SYS_VDD_1P8V ............................................................................. 25 
2.6  SYS_ADC_1P8V ............................................................................. 25 

3

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

7.3 Internal Power .................................................................................. 25

7.3.1 VDDSHV_3P3V .............................................................................. 25

7.3.2 VDDS_DDR .................................................................................. 25

7.3.3 VDD_MPU ................................................................................... 26

7.3.4 VDD_CORE .................................................................................. 26

7.3.5 VDDS_PLL ................................................................................... 26

7.4 Total Current Consideration .................................................................. 26

7.5 Control and Status .............................................................................. 27

7.5.1 Minimum Processor-PMIC interface Connections ..................................... 27

7.5.2 Minimum RTC Power Connections....................................................... 29

8 Electrical & Thermal Characteristics .............................................................. 30

9 Packaging Information ............................................................................... 31

9.1 Mechanical Dimensions ........................................................................ 31

9.1.1 Land Pad Sizing ............................................................................ 32

9.2 Reflow Instructions ............................................................................. 32

9.3 Storage Requirements.......................................................................... 32

4

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

1 Revision History

Revision Number

Revision Date

Changes

Author

1

5/6/2016

Initial Release

Greg Sheridan,

Kevin Troy

2

5/15/2016

Updated Misprint on ADC Specs on

first page

Greg Sheridan

3

5/19/2016

Added Information on the MSL Rating

Greg Sheridan

4

6/12/16

Added reference to TI Handling

Recommendations to Handling

Section. Fixed Link

Greg Sheridan

5

12/5/16

Updated Electrical Characteristics add

Thermal information. Also changed

operating temperature from junction to

case

Neeraj Dantu,

Greg Sheridan

6

2/15/17

Updated Max Current and Voltage in

Output Power and Electrical & Thermal

Characterization Sections

Neeraj Dantu

7

6/19/2017

Updated Block Diagram. Highlighted

that the processor I/Os are tied to 3.3V

Greg Sheridan

8

6/30/2017

Updated Block Diagrams. Updated

Bake Time in the Package Section.

Greg Sheridan

9

7/21/2017

Updated to include discussion around

the functionality of the TL5209 when

the OSD335x is powered from VBAT

Neeraj Dantu

10

08/23/2017

Added Industrial Temperature.

Erik Welsh

11

10/12/2017

Added requirements for input voltage

rise time and minimum interface

connections

Neeraj Dantu

12

11/21/2017

Updated SYS_VDD2_3P3V current

limit

Greg Sheridan

13

1/27/2018

Updated page numbers to match PDF

page numbers

Greg Sheridan

14

02/16/2018

Updated voltage measurements

Neeraj Dantu

15

03/19/2019

Updated VIN_BAT information;

Passive Tables

Erik Welsh

16

1/1/2021

Several Clean Up Items

Gene Frantz

C a v s 1 s M s ............................................................. : TP565217C Gra hic Dis la ' ARM Cortex-A8 p p y : PowerVR _ . power Up m cm W : M t ana|g§men 32K L1 Icache + SED 3D GFX Touch screen controller E 32K L1 Dcache + SED Crypto PRU»ICSS : 256K L2 + ECC 64K EtherCAT, PROFINET, E TL5209 LDO shared EtherNet/IP and : 176K ROM 64K RAM RAM more : I L3 and L4 interconnect : Up to . . 1GB DDR3 System Serial Parallel : ADC (a channel) eDMA UART x6 MMC, SD and : 12-bit SAR RTC sp| x2 SDIO x3 : WDT Timers x8 IZC x3 GPIO x114 : JTAG eHRPWM x3 CAN x2 : passive Crystal eQEP x3 McASP x2 l Components Oscillator x2 eCAP x3 (4 channel) : USB 2.0 HS OTG + PHY x2 E Memory Interface EMAC (2-p0rt) 10/100/1000 : NAND and NOR (1 it ECC) IEEE 1588v2, and switch : .

5

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

2 Block Diagram

The OSD335x family of devices consist of 4 main components serving 3 different functions.

The main processor is a Texas Instruments Sitara™ AM335x ARM® Cortex®-A8. The power

system has 2 devices from Texas Instruments, the TPS65217C Power Management IC (PMIC)

and the TL5209 LDO. The last main component is up to 1GB DDR3 system memory. Figure

2.1 shows a detailed block diagram of the OSD335x and breaks out the key functions of the

AM335x processor.

Figure 2.1. OSD335x Detailed Block Diagram

From TO Device Description Type Value

6

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

2.1 Passives

Besides the four major components, the OSD335x also integrates over 140 capacitors,

resistors, inductors, and ferrite beads (Passives). Table 2-2 and Table 2-3 lists the equivalent

capacitance and resistance integrated into the OSD335x. This includes the approximate bulk

capacitance on input and output power rails as well as all pull-up resistor locations and values.

The OSD335x does not require any external decoupling / bypass capacitors in most

applications. However, it does require additional bulk capacitance on one of the output power

rails.

2.1.1 Additional Required Bulk Capacitance

The following output power rails require additional bulk capacitance to avoid in-rush / power up

issues.

Table 2-1 - OSD335x Required Additional Capacitors (Approximate Bulk Capacitance)

From

To

Device

Description

Type

Value

SYS_VOUT

DGND

TPS65217C

SYS_VOUT output capacitance

C

~50uF

2.1.2 Integrated Bulk Capacitance

The following input and output power rails have bulk capacitance integrated within the SiP. This

table is for informative purposes only.

Table 2-2 - OSD335x Capacitors (Approximate Bulk Capacitance)

From

To

Device

Description

Type

Value

VIN_AC

VSS

TPS65217C

VIN_AC input capacitance

C

10uF

VIN_USB

VSS

TPS65217C

VIN_USB input capacitance

C

10uF

VIN_BAT

VSS

TPS65217C

VIN_BAT input capacitance

C

10uF

SYS_VOUT

VSS

TPS65217C

SYS_VOUT output capacitance

C

60uF

SYS_VDD1_3P3V

VSS

TL5209

SYS_VDD1_3P3V output capacitance

C

2.2uF

SYS_VDD2_3P3V

VSS

TPS65217C

SYS_VDD2_3P3V output capacitance

C

2.2uF

VDDSHV_3P3V

VSS

TPS65217C

VDDSHV_3P3V output capacitance

C

10uF

SYS_VDD_1P8V

VSS

TPS65217C

SYS_VDD_1P8V output capacitance

C

10uF

SYS_RTC_1P8V

VSS

TPS65217C

SYS_RTC_1P8V output capacitance

C

2.2uF

CAP_VDD_RTC

VSS

AM335x

CAP_VDD_RTC capacitance

C

1uF

From Descri tion

7

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

2.1.3 Integrated Resistors

The following pins have pull-up or pull-down resistors integrated within the SiP. This table is for

informative purposes only.

Table 2-3 - OSD335x Resistors (Pull-ups / Pull-downs)

From

To

Device

Description

Type

Value

PMIC_OUT_ PWR_EN

SYS_RTC_1P8V

TPS65217C

PWR_EN pull-up

R

10K Ohm

PMIC_IN_I2C_SCL

VDDSHV_3P3V

TPS65217C

SCL pull-up

R

4.7K Ohm

PMIC_IN_I2C_SDA

VDDSHV_3P3V

TPS65217C

SDA pull-up

R

4.7K Ohm

EXT_WAKEUP

SYS_RTC_1P8V

AM335x

EXT_WAKEUP input pull-up

R

10K Ohm

EXTINTN

VDDSHV_3P3V

AM335x

nNMI pull-up

R

10K Ohm

m OCTAVO sssssss V OSD3358-512M- PH—H Le

8

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

3 Product Number Information

Figure 3.1 shows an example of an orderable product number for the OSD335X family. This

section explains the different sections of the product number. It will also list the valid entries

and their meaning for each designator.

Family Designator – Three letters that designate the family of device.

Processor Designator – A set of letters and numbers that designate the specific processor in the

device. Table 3.1 shows the valid values for the Processor Designator.

Table 3.1. Processor Designators

Processor Designator

Processor

3358

Texas Instruments AM3358

Memory Designator – A set of letters and numbers that designate the DDR3 memory size in the

device. Table 3.2 shows the valid values for the Memory Designator.

Table 3.2. Memory Designator

Memory Designator

DDR Memory Size

512M

512 MB DDR3

OSD3358-512M-BAS

Family

Designator

Processor

Designator

Memory

Designator

Trim

Designator

Figure 3.1. Example Product Number

Trim Designator Device Options

9

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

Trim Designator – A set of letters and numbers that designate a set additional features in the

device. Table 3.3 shows the valid values for the Trim Designator.

Table 3.3. Trim Designator

Trim Designator

Device Options

BAS

Base Model containing Processer, DDR Memory, PMIC, and LDO. Commercial: 0 to 85°C

IND

Base Model containing Processer, DDR Memory, PMIC, and LDO. Industrial: -40 to 85°C

.. < ..="" ..="" m="" httg://www.1i.com/groduc1/am3358/datashee1="" http://www.1i.com/qroduc1/tp865217/da1ashee1="" http://www.1i.com/qroduc1/tl5209/datasheet="" httg://www.1i.com/iiusnoasso="" httg://octavosys1ems.com/docs/an1002.9d1="" http://processors.wiki.ti.com/index.php/am335x="" ddr="" phy="" reqister="" configuratio="" n="" for="" ddr3="" using="" software="" leveling="" http://processors.wiki.ti.com/index.phn/am335x="" power="" estimation="" tool="" httg://www.1i.com/iit/slvu551="" https://octavosvs1ems.com/app="" nmes/am335x-batterv-applications—wnh-="" osd335x-sig/="" https://octavosvs1ems.com/app="" no1es/osd335x-nc—use-cases/="">

10

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

4 Reference Documents

4.1 Data Sheets

Below are links to the data sheets for the key devices used in the OSD335X. Please refer to

them for specifics on that device. The remainder of this document will describe how the devices

are used in the OSD335X system. It will also highlight any differences between the

performance stated in the device specific datasheet and what should be expected from its

operation in the OSD335X.

• Processor AM335X http://www.ti.com/product/AM3358/datasheet

• PMIC TPS62517C http://www.ti.com/product/TPS65217/datasheet

• LDO TL509 http://www.ti.com/product/TL5209/datasheet

4.2 Other Reference

This section contains links to other reference documents that could be helpful when using the

OSD335x device. Some are referenced in this document.

• TI AN-2029 – Handling & Process recommendations

http://www.ti.com/lit/snoa550

• AN1002 – Pin Assignments and Application Differences From TI AM3358

http://octavosystems.com/docs/AN1002.pdf

• AM335x DR PHY register configuration for DDR3 using Software Leveling

http://processors.wiki.ti.com/index.php/AM335x_DDR_PHY_register_configuratio

n_for_DDR3_using_Software_Leveling

• AM335x Power Estimation Tool

http://processors.wiki.ti.com/index.php/AM335x_Power_Estimation_Tool

• Powering the AM335x with the TPS65217x

http://www.ti.com/lit/slvu551

• Powering the AM335x, AM335x, with LiPo and Li-Ion Batteries:

https://octavosystems.com/app_notes/am335x-battery-applications-with-

osd335x-sip/

• OSD335x RTC Use Cases

https://octavosystems.com/app_notes/osd335x-rtc-use-cases/

11

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

5 Ball Map

The pins on the OSD335x belong to 4 distinct categories, AM335x Signals, TPS65217C signals,

Oscillators and Power Domains. With a few exceptions, the ball assignments for the OSD335x

are a superset of the ball assignments for the AM335x. Table 5.1 through Table 5.5 show the

ball map for the OSD335x.

sssssss

12

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

Table 5.1. OSD335x Ball Map Top View (Columns A - D)

A

B

C

D

20

PMIC_OUT_PGOOD

PMIC_OUT_LDO_PGOOD

PMIC_IN_I2C_SCL

PMIC_IN_PB_IN

19

PMIC_OUT_NWAKEUP

PMIC_OUT_NINT

PMIC_IN_I2C_SDA

PMIC_IN_PWR_EN

18

VSS

EXTINTN

ECAP0_IN_PWM0_OUT

UART1_CTSN

17

SPI0_SCLK

SPI0_D0

I2C0_SDA

UART1_RTSN

16

SPI0_CS0

SPI0_D1

I2C0_SCL

UART1_RXD

15

XDMA_EVENT_INTR0

PWRONRSTN

SPI0_CS1

UART1_TXD

14

MCASP0_AHCLKX

EMU1

EMU0

XDMA_EVENT_INTR1

13

MCASP0_ACLKX

MCASP0_FSX

MCASP0_FSR

MCASP0_AXR1

12

TCK

MCASP0_ACLKR

MCASP0_AHCLKR

MCASP0_AXR0

11

TDO

TDI

TMS

CAP_VDD_SRAM_MPU

10

WARMRSTN

TRSTN

CAP_VBB_MPU

SYS_VDD_1P8V

9

VSSA_ADC

VREFP

AIN7

CAP_VDD_SRAM_CORE

8

AIN6

AIN5

AIN4

SYS_ADC_1P8V

7

AIN3

AIN2

AIN1

SYS_RTC_1P8V

6

VSSA_ADC

AIN0

PMIC_POWER_EN

CAP_VDD_RTC

5

SYS_ADC_1P8V

RTC_PWRONRSTN

EXT_WAKEUP

NC

4

SYS_ADC_1P8V

RTC_KALDO_ENN

NC

3

TESTOUT

NC

2

VDD_MPU_MON

NC

1

VSS

NC

:::::::

13

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

Table 5.2. OSD335x Ball Map Top View (Columns E - H)

E

F

G

H

20

VSS

OSC1_OUT

OSC1_GND

OSC1_IN

19

VSS

18

UART0_CTSN

MMC0_DAT2

MMC0_CMD

RMII1_REF_CLK

17

UART0_RTSN

MMC0_DAT3

MMC0_CLK

MII1_CRS

16

UART0_TXD

USB0_DRVVBUS

MMC0_DAT0

MII1_COL

15

UART0_RXD

USB1_DRVVBUS

MMC0_DAT1

VDDS_PLL

14

SYS_RTC_1P8V

VDDSHV_3P3V

13

VDDSHV_3P3V

VDD_MPU

12

VDDSHV_3P3V

VDD_MPU

VSS

11

VDDSHV_3P3V

VDD_MPU

VSS

VDD_CORE

10

VDDSHV_3P3V

VDD_MPU

VDD_CORE

VSS

9

SYS_VDD_1P8V

SYS_RTC_1P8V

VSS

8

VSSA_ADC

VSS

7

VDDS_PLL

VDD_CORE

VSS

6

SYS_RTC_1P8V

VDD_CORE

VSS

5

VDDS_DDR

4

NC

3

NC

2

NC

1

NC

on

14

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

Table 5.3. OSD335x Ball Map Top View (Columns J - M)

J

K

L

M

20

VSS

OSC0_OUT

OSC0_GND

OSC0_IN

19

VSS

18

MII1_TXD3

MII1_TX_CLK

MII1_RX_CLK

MDC

17

MII1_RX_DV

MII1_TXD0

MII1_RXD3

MDIO

16

MII1_TX_EN

MII1_TXD1

MII1_RXD2

MII1_RXD0

15

MII1_RX_ER

MII1_TXD2

MII1_RXD1

USB0_CE

14

VDDSHV_3P3V

VSS

13

VDD_MPU

SYS_RTC_1P8V

VSS

VDD_CORE

12

VDD_CORE

VSS

11

VSS

VDD_CORE

10

VSS

9

VSS

VDD_CORE

VSS

8

VSS

VDD_CORE

VSS

7

VSS

VDD_CORE

VSS

6

VSS

VDD_CORE

VSS

5

VDDS_DDR

VPP

4

NC

3

NC

2

NC

1

NC

:::::::

15

OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

Table 5.4. OSD335x Ball Map Top View (Columns N - T)

N

P

R

T

20

VSS

19

VSS

18

USB0_DM

USB1_CE

USB1_DM

USB1_VBUS

17

USB0_DP

USB1_ID

USB1_DP

GPMC_WAIT0

16

SYS_VDD_1P8V

USB0_ID

SYS_VDD_1P8V

GPMC_A10

15

VDDSHV_3P3V

USB0_VBUS

VDDSHV_3P3V

GPMC_A07

14

VSS

SYS_RTC_1P8V

GPMC_A04

GPMC_A03

13

VDD_CORE

VDDSHV_3P3V

GPMC_A00

GPMC_CSN3

12

VDD_CORE

VDDSHV_3P3V

GPMC_AD13

GPMC_AD12

11

VSS

VDDSHV_3P3V

VDDS_PLL

GPMC_AD10

10

VSS

VDDSHV_3P3V

VDDS_PLL

GPMC_AD09

9

VDD_CORE

SYS_RTC_1P8V

GPMC_AD06

GPMC_AD07

8

VDD_CORE

VDDSHV_3P3V

GPMC_AD02

GPMC_AD03

7

VSS

VDDSHV_3P3V

GPMC_ADVN_ALE

GPMC_OEN_REN

6

SYS_RTC_1P8V

VDDSHV_3P3V

LCD_AC_BIAS_EN

GPMC_BEN0_CLE

5

VDDSHV_3P3V

LCD_HSYNC

LCD_DATA15

4

NC

LCD_DATA03

LCD_DATA07

3

NC

LCD_DATA02

LCD_DATA06

2

NC

LCD_DATA01

LCD_DATA05

1

NC

LCD_DATA00

LCD_DATA04

sssssss

16

OSD335x BAS/IND Datasheet

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Octavo Systems LLC

Table 5.5. OSD335x Ball Map Top View (Columns U - Y)

U

V

W

Y

20

SYS_VDD1_3P3V

VSS

EXTL3B

19

VSS

EXTL3A

18

GPMC_BEN1

VSS

17

GPMC_WPN

GPMC_A11

VSS

EXTL2B

16

GPMC_A09

GPMC_A08

VSS

EXTL2A

15

GPMC_A06

GPMC_A05

VSS

14

GPMC_A02

GPMC_A01

VSS

EXTL1B

13

GPMC_AD15

GPMC_AD14

VSS

EXTL1A

12

GPMC_AD11

GPMC_CLK

VSS

11

NC

VSS

SYS_VDD2_3P3V

10

GPMC_AD08

NC

VSS

9

GPMC_CSN1

GPMC_CSN2

VSS

VIN_USB

8

GPMC_AD04

GPMC_AD05

VSS

VIN_USB

7

GPMC_AD00

GPMC_AD01

VSS

6

GPMC_WEN

GPMC_CSN0

VSS

VIN_AC

5

LCD_VSYNC

LCD_PCLK

VSS

VIN_AC

4

LCD_DATA11

LCD_DATA14

SYS_VOUT

3

LCD_DATA10

LCD_DATA13

VSS

VIN_BAT

2

LCD_DATA09

LCD_DATA12

VSS

VIN_BAT

1

LCD_DATA08

VSS

BAT_TEMP

BAT_VOLT

17

OSD335x BAS/IND Datasheet

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Octavo Systems LLC

5.1 Ball Description

Table 5.6 lists all of the unique balls of the OSD335x and gives a brief explanation of their

function. For more detail please refer to the datasheet in section 4.1 for the individual device

that ball is associated with.

Table 5.6 OSD335x Ball Descriptions

Pin Name

Description

AIN0

Analog Input / Output

AIN1

Analog Input / Output

AIN2

Analog Input / Output

AIN3

Analog Input / Output

AIN4

Analog Input / Output

AIN5

Analog Input

AIN6

Analog Input

AIN7

Analog Input

BAT_TEMP

TPS65217C TS Input

BAT_VOLT

TPS65217C BAT_SENSE Input

CAP_VBB_MPU

Internal Voltage Test Point

CAP_VDD_RTC

Internal Voltage Test Point, RTC Supply Voltage Input

CAP_VDD_SRAM_CORE

Internal Voltage Test Point

CAP_VDD_SRAM_MPU

Internal Voltage Test Point

ECAP0_IN_PWM0_OUT

Enhanced Capture 0 Input or PWM0 Output

EMU0

Miscellaneous Emulation Pin

EMU1

Miscellaneous Emulation Pin

EXT_WAKEUP

AM335x EXT_WAKEUP Input

EXTINTN

AM335x External Interrupt to ARM Cortex-A8

EXTL1A

RESERVED

EXTL1B

RESERVED

EXTL2A

RESERVED

EXTL2B

RESERVED

EXTL3A

RESERVED

EXTL3B

RESERVED

GPMC_A00

GPMC Address

GPMC_A01

GPMC Address

GPMC_A02

GPMC Address

GPMC_A03

GPMC Address

GPMC_A04

GPMC Address

GPMC_A05

GPMC Address

GPMC_A06

GPMC Address

GPMC_A07

GPMC Address

GPMC_A08

GPMC Address

GPMC_A09

GPMC Address

GPMC_A10

GPMC Address

GPMC_A11

GPMC Address

GPMC_AD00

GPMC Address and Data

GPMC_AD01

GPMC Address and Data

GPMC_AD02

GPMC Address and Data

GPMC_AD03

GPMC Address and Data

GPMC_AD04

GPMC Address and Data

GPMC_AD05

GPMC Address and Data

GPMC_AD06

GPMC Address and Data

GPMC_AD07

GPMC Address and Data

GPMC_AD08

GPMC Address and Data

GPMC_AD09

GPMC Address and Data

GPMC_AD10

GPMC Address and Data

GPMC_AD11

GPMC Address and Data

GPMC_AD12

GPMC Address and Data

GPMC_AD13

GPMC Address and Data

GPMC_AD14

GPMC Address and Data

on

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OSD335x BAS/IND Datasheet

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Octavo Systems LLC

GPMC_AD15

GPMC Address and Data

GPMC_ADVN_ALE

GPMC Address Valid / Address Latch Enable

GPMC_BEN0_CLE

GPMC Byte Enable 0 / Command Latch Enable

GPMC_BEN1

GPMC Byte Enable 1

GPMC_CLK

GPMC Clock

GPMC_CSN0

GPMC Chip Select

GPMC_CSN1

GPMC Chip Select

GPMC_CSN2

GPMC Chip Select

GPMC_CSN3

GPMC Chip Select

GPMC_OEN_REN

GPMC Output Enable / Read Enable

GPMC_WAIT0

GPMC Wait 0

GPMC_WEN

GPMC Write Enable

GPMC_WPN

GPMC Write Protect

I2C0_SCL

I2C Clock

I2C0_SDA

I2C Data

LCD_AC_BIAS_EN

LCD AC Bias Enable Chip Select

LCD_DATA00

LCD Data Bus

LCD_DATA01

LCD Data Bus

LCD_DATA02

LCD Data Bus

LCD_DATA03

LCD Data Bus

LCD_DATA04

LCD Data Bus

LCD_DATA05

LCD Data Bus

LCD_DATA06

LCD Data Bus

LCD_DATA07

LCD Data Bus

LCD_DATA08

LCD Data Bus

LCD_DATA09

LCD Data Bus

LCD_DATA10

LCD Data Bus

LCD_DATA11

LCD Data Bus

LCD_DATA12

LCD Data Bus

LCD_DATA13

LCD Data Bus

LCD_DATA14

LCD Data Bus

LCD_DATA15

LCD Data Bus

LCD_HSYNC

LCD Horizontal Sync

LCD_PCLK

LCD Pixel Clock

LCD_VSYNC

LCD Vertical Sync

MCASP0_ACLKR

McASP0 Receive Bit Clock

MCASP0_ACLKX

McASP0 Transmit Bit Clock

MCASP0_AHCLKR

McASP0 Receive Master Clock

MCASP0_AHCLKX

McASP0 Transmit Master Clock

MCASP0_AXR0

McASP0 Serial Data

MCASP0_AXR1

McASP0 Serial Data

MCASP0_FSR

McASP0 Receive Frame Sync

MCASP0_FSX

McASP0 Transmit Frame Sync

MDC

MDIO Clock

MDIO

MDIO Data

MII1_COL

MII Collision

MII1_CRS

MII Carrier Sense

MII1_RX_CLK

MII Receive Clock

MII1_RX_DV

MII Receive Data Valid

MII1_RX_ER

MII Receive Data Error

MII1_RXD0

MII Receive Data

MII1_RXD1

MII Receive Data

MII1_RXD2

MII Receive Data

MII1_RXD3

MII Receive Data

MII1_TX_CLK

MII Transmit Clock

MII1_TX_EN

MII Transmit Enable

MII1_TXD0

MII Transmit Data

MII1_TXD1

MII Transmit Data

MII1_TXD2

MII Transmit Data

MII1_TXD3

MII Transmit Data

MMC0_CLK

MMC/SD/SDIO Clock

MMC0_CMD

MMC/SD/SDIO Command

MMC0_DAT0

MMC/SD/SDIO Data

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OSD335x BAS/IND Datasheet

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Octavo Systems LLC

MMC0_DAT1

MMC/SD/SDIO Data

MMC0_DAT2

MMC/SD/SDIO Data

MMC0_DAT3

MMC/SD/SDIO Data

NC

No Connect

OSC0_GND

High Frequency Oscillator Ground

OSC0_IN

High Frequency Oscillator Input

OSC0_OUT

High Frequency Oscillator Output

OSC1_GND

Real Time Clock Oscillator Ground

OSC1_IN

Real Time Clock Oscillator Input

OSC1_OUT

Real Time Clock Oscillator Output

PMIC_IN_I2C_SCL

TPS65217C SCL Input

PMIC_IN_I2C_SDA

TPS65217C SDA Input / Output

PMIC_IN_PB_IN

TPS65217C PB_IN Input

PMIC_IN_PWR_EN

TPS65217C PWR_EN Input

PMIC_OUT_LDO_PGOOD

TPS65217C LDO_PGOOD Output

PMIC_OUT_NINT

TPS65217C NINT Output

PMIC_OUT_NWAKEUP

TPS65217C NWAKEUP Output

PMIC_OUT_PGOOD

TPS65217C PGOOD Output

PMIC_POWER_EN

AM335x PMIC_POWER_EN Output

PWRONRSTN

Power On Reset Input (Active Low)

RMII1_REF_CLK

RMII Reference Clock

RTC_KALDO_ENN

Enable input for internal CAP_VDD_RTC voltage regulator (Active Low)

RTC_PWRONRSTN

RTC Reset Input (Active Low)

SPI0_CS0

SPI Chip Select

SPI0_CS1

SPI Chip Select

SPI0_D0

SPI Data

SPI0_D1

SPI Data

SPI0_SCLK

SPI Clock

SYS_ADC_1P8V

Output Power Supply, Analog, 1.8VDC

SYS_RTC_1P8V

Output Power Supply, RTC Voltage Domain, 1.8VDC

SYS_VDD_1P8V

Output Power Supply, Digital, 1.8VDC

SYS_VDD1_3P3V

Output Power Supply, Primary, 3.3VDC

SYS_VDD2_3P3V

Output Power Supply, Secondary, 3.3VDC

SYS_VOUT

TPS65217C SYS Output

TCK

JTAG Test Clock

TDI

JTAG Test Data Input

TDO

JTAG Test Data Output

TESTOUT

RESERVED

TMS

JTAG Test Mode Select

TRSTN

JTAG Test Reset

UART0_CTSN

UART Clear to Send

UART0_RTSN

UART Request to Send

UART0_RXD

UART Receive Data

UART0_TXD

UART Transmit Data

UART1_CTSN

UART Clear to Send

UART1_RTSN

UART Request to Send

UART1_RXD

UART Receive Data

UART1_TXD

UART Transmit Data

USB0_CE

USB0 Charger Enable Output

USB0_DM

USB0 Data (-)

USB0_DP

USB0 Data (+)

USB0_DRVVBUS

USB0 VBUS Control Output. Driven high to enable external power logic in Host

mode. Requires valid input on USB0_VBUS. Checks USB0_VBUS every 100ms and

generates VBUS error interrupt if USB0_VBUS VBUS is not valid.

USB0_ID

USB0 OTG ID

USB0_VBUS

USB0 VBUS

USB1_CE

USB1 Charger Enable Output

USB1_DM

USB1 Data (-)

USB1_DP

USB1 Data (+)

USB1_DRVVBUS

USB1 VBUS Control Output. Driven high to enable external power logic in Host

mode. Requires valid input on USB1_VBUS. Checks USB1_VBUS every 100ms and

generates VBUS error interrupt if USB1_VBUS is not valid.

USB1_ID

USB1 OTG ID

on

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OSD335x BAS/IND Datasheet

Rev. 16 1/1/2021

Octavo Systems LLC

USB1_VBUS

USB1 VBUS

VDD_CORE