Datenblatt für EV-ADF5355SD1Z Guide von Analog Devices Inc.

ANALOG DEVICES
Evaluation Board User Guide
UG-
One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluation Board for Fractional-N/Integer-N PLL Frequency Synthesizer
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS. Rev. Pr C | Page 1 of 17
FEATURES
Self-contained board including PLL, VCO, loop filter (3 kHz),
USB interface, and voltage regulators
Accompanying software allows control of synthesizer
functions from a PC
Choice of power supply via USB or external feeding
Typical phase noise performance of −111 dBc/Hz @ 100 kHz
offset from carrier (6.8 GHz output frequency)
GENERAL DESCRIPTION
The EV-ADF5355SD1Z is designed to evaluate the performance
of the ADF5355 frequency synthesizer. A digital picture of the
board is shown in Figure 1. It contains the ADF5355
synthesizer, a USB connector and related interface, SMA
connectors for the RF outputs, and reference signal plus headers
for various signals and voltages. There is also a loop filter
(5 kHz) on board. An SDP-S connector is required to operate
the board, this is ordered separately.
The package also contains Windows® software (XP, Vista-and
Windows 7 compatible) to allow easy programming of the
synthesizer.
EVALUATION KIT CONTENTS
Evaluation board software CD
USB cable
EV-ADF5355SD1Z
DIGITAL PICTURE OF EVALUATION BOARD
Figure 1.
UG- Evaluation Board User Guide
Rev. Pr C | Page 2 of 17
TABLE OF CONTENTS
Features .............................................................................................. 1
General Description ......................................................................... 1
Evaluation Kit Contents ................................................................... 1
Digital Picture of Evaluation Board ............................................... 1
Revision History ............................................................................... 2
Evaluation Board Hardware ............................................................ 3
Overview ........................................................................................ 3
Power Supplies ...............................................................................3
RF Output .......................................................................................3
Loop Filter ......................................................................................3
Reference Source ...........................................................................3
Evaluation Set Up ..............................................................................4
Evaluation Board Software ...............................................................5
Evaluation Board Schematics and Artwork ...................................9
REVISION HISTORY
14/10—Revision PrC: Updated for revised components.
14/07—Revision PrB: Initial Preliminary Version
Edited description.
14/05—Revision PrA: Initial Preliminary Version
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Evaluation Board User Guide UG-
Rev. Pr C | Page 3 of 17
EVALUATION BOARD HARDWARE
OVERVIEW
The EV-ADF5355SD1Z requires the SPD-S platform which
uses the EVAL-SDP-CS1Z. (SDP-B is not recommended).
POWER SUPPLIES
The EV-ADF5355SD1Zis powered from dc power connectors
(4 mm banana connectors). When feeding via banana
connectors, 6.0 V is a suitable feeding voltage. The power
supply circuitry allows the user to use two or three separate
LDOs to feed the ADF5355 (using fewer LDOs increases the
risk of spur contaminated dc feeds). Ensure the switch is in the
correct position to power the board. Consult the board
schematic in Figure 20, Figure 21, and Figure 22 to determine a
suitable setting.
The charge pump and VCO supply pins are driven from a 5V
ADM7150 high performance low noise regulator. The
remaining supplies are powered from 3.3V ADM7150’s.
An LED, indicates when USB power is available, and another
LED, indicates when the ADF5355 is powered on. Switch S1 is
used to power the ADF5355 from the external dc connectors,
and should be switched to the left.
In case the SDP processor causes spurs on the RF output signal,
the user may remove this connector and measure the spurious.
RF OUTPUT
The EV-ADF5355SD1Z has one pair of SMA output connectors
(differential outputs RFoutA+/-). The device is quite sensitive to
impedance unbalance. If only one port of a differential pair is
used, terminate the other with a 50 Ω load. If only RFoutB is
used, then it can be powered off, or if left on, both RFoutA pins
should be terminated in 50 Ohms.
The RFoutB contains the high frequency (6.8 – 13.6 GHz) and
is a single ended RF output.
LOOP FILTER
The loop filter schematic is included in the board schematic on
Figure 20. The loop filter component placements are clarified in
Figure 2. Customers wishing for lowest noise at 100 kHz offset
are advised to use the following components, and to use 0.9 mA
charge pump current, which are inserted on the evaluation
board.
C60 = 22 nF, C59 = 0.47 uF, C14 = 10 nF, C73 = 10 pF.
R14 = 220 Ohms, R1 = 470 Ohms.
Customers wishing for lowest rms phase noise should use:
C60 = 1.2 nF, C59 = 33 nF, C14 = 390 pF, C73 = 10 pF.
R14 = 1 kOhms, R17 = 3.3 kOhm.
And also program the 0.9 mA charge pump current.
Figure 2. Loop Filter Placement
REFERENCE SOURCE
The evaluation board contains a footprint for a 122.88 MHz
differential output TCXO from Vectron. If preferred, the user
may supply either a single-ended or differential reference input
to connectors REFINA and REFINB. Disconnect the power rail
to the TCXO by removing resistor R12 first.
To use a single ended REFIN, then connect a low noise 122.88
MHz reference source to REFINB. To use a differential REFIN
connect the differential signal to REFINA and REFINB. The
differential REFIN can operate to 500 MHz input frequency.
If the TCXO is removed, then an external REFIN must be used.
UG- Evaluation Board User Guide
Rev. Pr C | Page 4 of 17
EVALUATION SET UP
Figure 3. Evaluation Set Up
Spectrum
Analyzer
PC
External DC
supply
External DC
GND
TCXO
50 Ohm
Termination
Loop filter
Lock detect LED
PLL
power
LED
Power switch
Reference In/Out
Reference (optional)
ADF5355
50 Ohm
Termination
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Evaluation Board User Guide UG-
Rev. Pr C | Page 5 of 17
SOFTWARE INSTALLATION
Use the following steps to install the software.
1. Install the Analog Devices ADF4355 software by double-
clicking ADF4355 Setup.msi.
If you are using Windows XP, follow the instructions in the
Windows XP Software Installation Guide section (see
Figure 4 to Figure 8).
If you are using Windows Vista or Windows 7, follow the
instructions in the Windows Vista and Windows 7 Software
Installation Guide section (see Figure 9 to Figure 13).
Note that the software requires Microsoft Windows
Installer and Microsoft .NET Framework 3.5 (or higher).
The installer connects to the Internet and downloads
Microsoft .NET Framework automatically. Alternatively,
before running the ADF4355 Setup.msi, both the installer
and .NET Framework can be installed from the CD
provided.
2. Connect your board by USB.
If you are using Windows XP, follow the steps in the
Windows XP Driver Installation Guide section (see Figure 14
to Figure 17).
On Windows Vista or Windows 7, the drivers install
automatically.
Windows XP Software Installation Guide
Figure 4. Windows XP ADF4355 Software Installation, Setup Wizard
1. Click Next.
Figure 5. Windows XP ADF4355 Software Installation, Select Installation
Folder
2. Choose an installation directory and click Next.
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UG- Evaluation Board User Guide
Rev. Pr C | Page 6 of 17
Figure 6. Windows XP ADF4355 Software Installation, Confirm Installation
3. Click Next.
Figure 7. Windows XP ADF4355 Software Installation, Logo Testing
4. Click Continue Anyway.
Figure 8. Windows XP ADF4355 Software Installation, Installation Complete
5. Click Close.
Windows Vista and Windows 7 Software Installation Guide
Figure 9. Windows Vista/7 ADF4355 Software Installation, Setup Wizard
1. Click Next.
Figure 10. Windows Vista/7 ADF4355 Software Installation, Select
Installation Folder
2. Choose an installation directory and click Next.
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Evaluation Board User Guide UG-
Rev. Pr C | Page 7 of 17
Figure 11. Windows Vista/7 ADF4355 Software Installation, Confirm Installation
3. Click Next.
Figure 12. Windows Vista/7 ADF4355 Software Installation, Start Installation
4. Click Install.
Figure 13. Windows Vista/7 ADF4355 Software Installation, Install Complete
5. Click Close.
Windows XP Driver Installation Guide
Figure 14. Windows XP USB Driver Installation, Found New Hardware Wizard
1. Choose Yes, this time only and click Next.
Figure 15. Windows XP USB Driver Installation, Install Options
2. Click Next.
Note that Figure 15 may list Analog Devices RFG.L Eval Board
instead of ADF4xxx USB Adapter Board.
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UG- Evaluation Board User Guide
Rev. Pr C | Page 8 of 17
Figure 16. Windows XP USB Driver Installation, Logo Testing
3. Click Continue Anyway.
Figure 17. Windows XP USB Driver Installation, Complete Installation
4. Click Finish.
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Evaluation Board User Guide UG-
Rev. Pr C | Page 9 of 17
EVALUATION BOARD SOFTWARE
The control software for the EV-ADF5355SD1Zis available on
the CD included in the evaluation kit. To install the software,
see the software installation section. Ensure to install the
software first.
To run the software, first connect the SDP board to the USB
port of the PC, and the SDP board to the evaluation board and
then click the ADF4355 file on the desktop or in the Start
menu. Select SDP board and click connect. Note that, when
connecting the board, it takes about 5 sec to
10 sec for the status label to change.
If the software is started before the board is connected to USB
port, an error window opens, informing that the USB device
was not found, and the No USB message is displayed in the top
right corner of the software front panel window. In this case,
connect the SDP board to the USB port and click the Connect
button.
1) Connect the SDP-S board to the EV-ADF5355 board.
2) Start the software.
3) Select SDP board as the connection method, select
ADF5355 as the part.
4) Connect 6.0V to the EV-ADF5355SD1Z board, but
ensure the switch s1 is in the off position.
5) Turn switch on (To the left).
6) Load configuration file (if applicable).
7) Write al l registe rs.
8) A phase noise plot as below was taken with the
register settings below.
Figure 18. Software Front Panel Display—Select Device and Connection
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UG- Evaluation Board User Guide
Rev. Pr C | Page 10 of 17
To adjust the synthesizer parameters click the main controls tab.
Use the Frequency text box in the Reference section to set the
correct reference frequency. The default reference on the
software window is at 122.88 MHz which can be supplied
externally. Please change to the actual REFIN frequency.
Use the RF Frequency section to control the output frequency.
To achieve single-tone on the VCO output, type the desired
output frequency text box in megahertz.
Default settings are recommended for most registers. Changing
the settings on the software GUI requires the user to update the
register with the register button, which is highlighted in green.
Bleed current settings may need to be modified for optimal
operation.
Figure 19. Register Settings
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Evaluation Board User Guide UG-
Rev. Pr C | Page 11 of 17
Figure20. Single Sideband Plot
Running ...
R&S FSUP 26 Signal Source Analyzer LOCKING
Settings Residual Noise [T1 w/o spurs] Phase Detector +0 dB
Signal Frequency: 6.800000 GHz Int PHN (1.0 k .. 30.0 M) -38.9 dBc
Signal Level: -0.28 dBm Residual PM 0.923 °
Cross Corr Mode Harmonic 1 Residual FM 2 kHz
Internal Ref Tuned Internal Phase Det RMS Jitter 0.3769 ps
Phase Noise [dBc/Hz] Marker 1 [T1] Marker 2 [T1] Marker 3 [T1] Marker 4 [T1]
RF Atten 5 dB 1 kHz 101.07422 kHz 1 MHz 10 MHz
Top -60 dBc/Hz -83.5 dBc/Hz -111.38 dBc/Hz -132.64 dBc/Hz -152.84 dBc/Hz
10 kHz 100 kHz 1 MHz 10 MHz1 kHz 30 MHz
-160
-140
-120
-100
-80
LoopBW 1 kHz
1 CLRW
R
SMTH 1%
2 CLRW
R
A
SPR OFF
TH 13dB
F
requency Offse
t
1
2
3
4
Date: 17.OCT.2014 17:05:06
407, m—r
UG- Evaluation Board User Guide
Rev. Pr C | Page 12 of 17
EVALUATION BOARD SCHEMATICS AND ARTWORK
Figure 20. Evaluation Board Schematic (Page 1)
CENTER TO CENTER ON PCB
0201
SHIELD SIGNALS WITH VIAS
0201
0201
ADF5355
0201
0201
0201
0201
REFINA AND REFINB ARE SPACED 15MM
0201
0201
LOCK DETECT
LOOP FILTER
PLACE ON BOTTOM SIDE OF PCB
0201
RF CHOKE
MATCHED LINE WIDTH'S
TRACE WIDTH = 380UM
3
1
<DESIGN_VIEW>
<PRODUCT_1>
<PRODUCT>
<DRAWING_TITLE_HEADER>
<SCALE>
A
EV-ADF5355SD1Z
<PTD_ENGINEER>
02K243-40M
02K243-40M
02K243-40M
4.7NH
DNI
10PF
0
122.88MEGHZ
1000PF
0.1UF
10PF
00
10PF
1UF
10PF
DNI
1UF
0.47UF
1000PF
100
51
1000PF
DNI
10PF
10PF
10PF
4.7NH 4.7NH
DNI
10K
0
7.4NH
1UF
0
0.1UF
10PF
51
0.1UF
68
1.8K
1.8K
1.8K
0
DNI
DNI
0
0
0
DNI
DNI
DNI
DNI
1000PF
125MEGHZ
1000PF
100PF
10PF
0.1UF
1UF
1UF
1UF
0.1UF
1UF
10PF
0.1UF
0
DNI
0
DNI
0
DNI
DNI
51
DNI
DNI
DNI
0
0.1UF
0
DNI
51
DNI
5.1K
0
DNI
ADF5355BCPZ
DNI
1.5K
DNI
DNI
0
0
7.4NH
DNI
1000PF
10PF
10PF
10PF
470
22NF
220
1000PF
10000PF
0
120PF
10UF
1000PF
10PF
1UF
120PF
4.7UF
10PF
100PF
1UF
1000PF
C51
R33
R32
U1
C54
C55
R6
C23
R4
R27
C30
C27 C26
C6
C3
L1
L3L6
L7
C21
C9
C12
C17 C15
C19
Y1_ALT
C32 C36
C41
C39
L2
C45
C43
C50
C46
C31
C34
C29 C28
C38 C25
C35
R21
R14 C59
TP4 TP5 TP6TP3
CA5
CA4
RA3
CA1
CA2CA3
RA2 RA1
RA5
RA4
C73
C60
R17 R5R1RCPOUT
RMUX
R22
RFBP
RFAN
RFAP
R3
C33
C37
R8
R7
C40
R10
R9
C42
R2
PDRF
REFINB R11
TP1
Y1
R16
TP2
C44
C57
C58
C56
C48
C53
C61
R18
R19
R23
R24
R25
REFINA
C47
R12 MUXOUT
R20
DS1
R26
RFOUTA+
RFOUTA-
CPOUT
AVDD1
VVCO
VTUNE
VBIAS
DATA
CLK
+3.3V
PDRF VRF1
+3.3V
VRF
VP
DVDD
LE
CE
CREG1
AVDD2
+3.3V
+3.3V
+3.3V
+3.3V
MUXOUT
+3.3V
CREG2
VREGVCO
VREF
VRF1
VRF1
RFOUTB
17
20
10
19
23
6
24
31
22
14
12
11
28
29
26
PAD
30
3
27
2
32
25
7
8
1
4
16
5
21
18
15
13
9
17
6
5
23
4
8
1
5432
1
1
6
13
4
25
1
5432
1
1
AC
GNDGND GND
GND
GND GND
GND
GND
VDD
CFO
FO
GND
E/D
NC
GND
GND
GND
GND
GND GND
GND
GND GND
GND
PAD
CREG2SDGND
MUXOUT
REFINA
REFINB
DVDD
PDBRF
CREG1
VBIAS
VREF
RSET
AGNDVCO
VTUNE
VREGVCO
AGNDVCO
VVCO
AVDD
AGNDRF
RFOUTB
AGNDRF
RFOUTA-
RFOUTA+
VRF
AGND
CPGND
CPOUT
VP
AVDD
CE
LE
DATA
CLK
GND GND
GND
GND
IN
IN
IN
IN
IN
IN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C1
VCC
OUT-
OUT+C2
GNDNC
VTUNE
GNDGND
GND
GND
GNDGND
GND
GNDGND
GNDGND
GND GND
GND
GND
GND
GND
GND
GND GND
GND
GND GND
GND
GND
GND GND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED I N FURNISHING INFORMAT ION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REP RODUCED OR COPIED, IN WHOLE OR
DRAWING NO.
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Evaluation Board User Guide UG-
Rev. Pr C | Page 13 of 17
Figure 21. Evaluation Board Schematic (Page 2)
VP
AVDD
VRVCO
JUMPER 3 PIN
TO THE DUT PINS.
RESISTORS CLOSE TO DUT PINS
PLACE VTUNE,CPOUT & SW
SHIELD SIGNALS WITH VIAS ALLTHE WAY
VRF
DVDD
VVCO
VRF1
RESISTORS CLOSE TO DUT PINS
PLACE VBIAS,VREF 7 VREGVCO
MUX/LE
23
<DESIGN_VIEW>
<PRODUCT_1>
<PRODUCT>
<DRAWING_TITLE_HEADER>
<SCALE>
A
EV-ADF5355SD1Z
<PTD_ENGINEER>
22UF
DNI
DNI
100UF
DNI
DNI
0
0
ADM7150ACPZ-3.3
1UF 1UF 1UF
DNI
DNI
DNI
0
ADM7150ACPZ-3.3
0
ADM7150ACPZ-5.0
DNI
22UF
0
22UF
0
0
DNI
0
1K
0
0
0
0
0
DNI
0
0
0
0
0
0
0
0
0
00
100UF
22UF 22UF
22UF
100UF
DNI
0
10UF 10UF 10UF
10UF
10UF10UF
10UF
10UF
10UF
0
22UF
0
22UF
1UF1UF1UF
RV5
RV4
TP_AVDD2
RV2
RV3
C76 C75 C74
R3V3
R_VREGVCO
R_VREF
R_VBIAS
TP_+3.3V
TP_VRF1
TP_VRF
TP_DVDD
TP_AVDD1
TP_VVCO
TP_VP
VSUPPLY_ALT
GND
CVRF1 CVRF CDVDD CAVDD CVRVCO CVVCO CVP
P3
RPIN18
RVTUNE
P2
RAVDD LED1
P1
VR5
VR3
RV31
RV30
RV25
C16
RV26
C18
RV27
RV28
C22
RV29
C20
C24
RV20
RV19
RV14
C2
RV15
C5
RV16
RV17
C11
RV18
C8
C14
RV12 RV6
RV10
RV7 RV8
C1
C4
RV9
VR2
C10
RV11
C7
C13
RV1
ZD1
VSUPPLY
S1
C71
6.0V
6.0V
6.0V
6.0V
VREGVCO
VREF
VBIAS
AVDD2
AVDD1
+3.3V
CPOUT
VTUNE
VP
DVDD
VSUPPLY
MUX/LE
VVCO
MUX/LE
MUXOUT
LE
VRF1
VRF
AVDD2
1
NP NP NP
1
1
1
1
1
1
2
1
2
1
NP NP NP NP NP NP NP
3
2
1
4
3
2
1
G16
G15
G14
G13
G12
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8
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THIS DRAWING IS T HE PROPERTY OF A NALOG DEVICES INC.
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UG- Evaluation Board User Guide
Rev. Pr C | Page 14 of 17
Figure 22. Evaluation Board Schematic (Page 3)
33
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THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED I N FURNISHING INFORMAT ION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REP RODUCED OR COPIED, I N WHOLE OR
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Evaluation Board User Guide UG-
Rev. Pr C | Page 15 of 17
Figure 23. Evaluation Board Silk Screen(Top Side)
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UG- Evaluation Board User Guide
Rev. Pr C | Page 16 of 17
Figure 24 Evaluation Board Silk Screen, (Reverse side)
ANALOG DEVICES www.ana|og.cnm
Evaluation Board User Guide UG-
Rev. Pr C | Page 17 of 17
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be
bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not
use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you
(“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to
Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that
the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made
subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation
Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not
expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary
information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this
Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board.
Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material
content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any
time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS”
AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS
OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF
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POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES
SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will
comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the
Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and
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expressly disclaimed.
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UG08907-0-x/10(0)