A
_ SunLED
www.5unLEDusa.Cem
Package Schematics
:2(u nm)
a“?
n
l
w (u up
(a 312) 7
v
xu 10(0 4)
1,2!
:4.)in
#‘f W l
: ms
%
1
News.
1, All dimensions an- in millimulcn (mchm), Tolerance is t0.25(0 01“)unless DlllCrWlM: noted,
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l ,Thc gap between Lln- reflect"; and PCB shall not uxcu‘d 0,25mm,
Part Number: XZFMDK10C
Surface Mount Display
Dec 09,2020 XDSA8702 V10-X Layout: Maggie L.
P. 1/4
Features
● 0.4 inch digit height
● Robust package
● Low power consumption
● Standard configuration: Gray face w/ white
segments
● Standard Package: 400pcs/ Reel
● MSL (Moisture Sensitivity Level): 2a
● RoHS compliant
Absolute Maximum Ratings
(T
A
=25°C)
Red
(AlGaInP) Unit
Reverse Voltage V
R
5 V
Forward Current I
F
30 mA
Forward Current (Peak)
1/10 Duty Cycle
0.1ms Pulse Width
i
FS
185 mA
Power Dissipation P
D
75 mW
Operating Temperature T
A
-40 ~ +85
°C
Storage Temperature Tstg -40 ~ +85
Package Schematics
Notes:
1. All dimensions are in millimeters (inches), Tolerance is ±0.25(0.01")unless otherwise noted.
2. Specifications are subject to change without notice.
3.The gap between the reflector and PCB shall not exceed 0.25mm.
Red
(AlGaInP) Unit
Forward Voltage (Typ.) (I
F
=10mA) V
F
1.85 V
Forward Voltage (Max.) (I
F
=10mA) V
F
2.35 V
Reverse Current (Max.) (V
R
=5V) I
R
10 µA
Wavelength of Peak
Emission CIE127-2007*
(Typ.)
(I
F
=10mA)
λP 645* nm
Wavelength of Dominant
Emission CIE127-2007*
(Typ.)
(I
F
=10mA)
λD 630* nm
Spectral Line Full Width
At Half-Maximum (Typ.)
(I
F
=10mA)
△λ 28 nm
Capacitance (Typ.)
(V
F
=0V, f=1MHz) C 35 pF
Operating Characteristics
(T
A
=25°C)
Part
Number
Emitting
Color
Emitting
Material
Wavelength
CIE127-2007*
nm
λP
Description
min. typ.
XZFMDK10C Red AlGaInP 21000
9000*
53990
19990* 645* Common Cathode,
Rt.Hand Decimal.
Luminous Intensity
CIE127-2007*
(I
F
=10mA)
ucd
*Luminous intensity value and wavelength are in accordance with CIE127-2007 standards.
ATTENTION
OBSERVE PRECAUTIONS
FOR HANDLING
ELECTROSTATIC
DISCHARGE
SENSITIVE
DEVICES
A Relative Humidity between 40% and 60% is recommended in
ESD-protected work areas to reduce static build up during assembly
process (Reference JEDEC/JESD625-A and JEDEC/J-STD-033)