Datenblatt für CSD18532NQ5B von Texas Instruments

V'.‘ 1!. B X E I TEXAS INSTRUMENTS
VGS - Gate-to-Source Voltage (V)
RDS(on) - On-State Resistance (m:)
0 2 4 6 8 10 12 14 16 18 20
0
2
4
6
8
10
12
14
D007
TC = 25°C, I D = 25 A
TC = 125°C, I D = 25 A
Qg - Gate Charge (nC)
VGS - Gate-to-Source Voltage (V)
0 5 10 15 20 25 30 35 40 45 50
0
1
2
3
4
5
6
7
8
9
10
D004
ID = 25 A
VDS = 30 V
1D
2D
3D
4
D
D
5
G
6S
7
S
8S
P0093-01
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CSD18532NQ5B
SLPS440C –JUNE 2013–REVISED FEBRUARY 2018
CSD18532NQ5B 60-V N-Channel NexFETℱ Power MOSFET
1
1 Features
1‱ Ultra-Low Qgand Qgd
‱ Low-Thermal Resistance
‱ Avalanche Rated
‱ Lead-Free Terminal Plating
‱ RoHS Compliant
‱ Halogen Free
‱ SON 5-mm × 6-mm Plastic Package
2 Applications
‱ DC-DC Conversion
‱ Secondary Side Synchronous Rectifier
‱ Isolated Converter Primary Side Switch
‱ Motor Control
3 Description
This 60-V, 2.7-mΩ, 5-mm × 6-mm SON NexFETℱ
power MOSFET has been designed to minimize
losses in power conversion applications.
Top View
Product Summary
TA= 25°C TYPICAL VALUE UNIT
VDS Drain-to-Source Voltage 60 V
QgGate Charge Total (10 V) 49 nC
Qgd Gate Charge Gate-to-Drain 7.9 nC
RDS(on) Drain-to-Source On-Resistance VGS = 6 V 3.5 m℩
VGS = 10 V 2.7
VGS(th) Threshold Voltage 2.8 V
Device Information
DEVICE QTY MEDIA PACKAGE SHIP
CSD18532NQ5B 2500 13-Inch Reel SON
5.00-mm × 6.00-mm
Plastic Package
Tape
and
Reel
CSD18532NQ5BT 250 7-Inch Reel
Absolute Maximum Ratings
TA= 25°C VALUE UNIT
VDS Drain-to-Source Voltage 60 V
VGS Gate-to-Source Voltage ±20 V
ID
Continuous Drain Current (Package Limited) 100
A
Continuous Drain Current (Silicon Limited),
TC= 25°C 151
Continuous Drain Current(1) 21
IDM Pulsed Drain Current(2) 400 A
PD
Power Dissipation(1) 3.1 W
Power Dissipation, TC= 25°C 156
TJ,
Tstg
Operating Junction Temperature,
Storage Temperature –55 to 150 °C
EAS Avalanche Energy, Single Pulse
ID= 85 A, L = 0.1 mH, RG= 25 ℩360 mJ
(1) Typical RΞJA = 40°C/W on a 1-in2, 2-oz Cu pad on a 0.06-in
thick FR4 PCB.
(2) Max RΞJC = 0.8°C/W, pulse duration ≀100 ÎŒs, duty cycle ≀
1%.
RDS(on) vs VGS Gate Charge
l TEXAS INSTRUMENTS
2
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SLPS440C –JUNE 2013–REVISED FEBRUARY 2018
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Specifications......................................................... 3
5.1 Electrical Characteristics........................................... 3
5.2 Thermal Information.................................................. 3
5.3 Typical MOSFET Characteristics.............................. 4
6 Device and Documentation Support.................... 7
6.1 Receiving Notification of Documentation Updates.... 7
6.2 Community Resources.............................................. 7
6.3 Trademarks............................................................... 7
6.4 Electrostatic Discharge Caution................................ 7
6.5 Glossary.................................................................... 7
7 Mechanical, Packaging, and Orderable
Information ............................................................. 8
7.1 Q5B Package Dimensions........................................ 8
7.2 Recommended PCB Pattern..................................... 9
7.3 Recommended Stencil Pattern ................................. 9
7.4 Q5B Tape and Reel Information............................. 10
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (May 2017) to Revision C Page
‱ Extended the VDS on Figure 5 to 60 V.................................................................................................................................... 4
Changes from Revision A (December 2015) to Revision B Page
‱ Added Receiving Notification of Documentation Updates section. ....................................................................................... 7
‱ Changed the dimension between pads 3 and 4 from 0.028 inches: to 0.050 inches in the Recommended PCB
Pattern section diagram. ........................................................................................................................................................ 9
Changes from Original (June 2014) to Revision A Page
‱ Added part number to title. .................................................................................................................................................... 1
‱ Added 7" reel to Ordering Information. .................................................................................................................................. 1
‱ Updated pulsed current conditions. ....................................................................................................................................... 1
‱ Added line for Power Dissipation, TC= 25°C in Absolute Maximum Ratings table. ............................................................. 1
‱ Updated Figure 1 to show RξJC curves. ................................................................................................................................. 4
‱ Updated SOA in Figure 10 ..................................................................................................................................................... 6
‱ Added Device and Documentation Support section. ............................................................................................................. 7
‱ Updated Mechanical, Packaging, and Orderable Information and mechanical drawings. .................................................... 8
l TEXAS INSTRUMENTS
3
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5 Specifications
5.1 Electrical Characteristics
TA= 25°C unless otherwise stated
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-source voltage VGS = 0 V, ID= 250 ÎŒA 60 V
IDSS Drain-to-source leakage current VGS = 0 V, VDS = 48 V 1 ÎŒA
IGSS Gate-to-source leakage current VDS = 0 V, VGS = 20 V 100 nA
VGS(th) Gate-to-source threshold voltage VDS = VGS, ID= 250 ÎŒA 2.4 2.8 3.4 V
RDS(on) Drain-to-source on-resistance VGS = 6 V, ID= 25 A 3.5 4.4 m℩
VGS = 10 V, ID= 25 A 2.7 3.4
gfs Transconductance VDS = 30 V, ID= 25 A 140 S
DYNAMIC CHARACTERISTICS
Ciss Input capacitance
VGS = 0 V, VDS = 30 V, ƒ = 1 MHz
4100 5340 pF
Coss Output capacitance 495 644 pF
Crss Reverse transfer capacitance 16 21 pF
RGSeries gate resistance 1.2 2.4 ℩
QgGate charge total (10 V) VDS = 30 V, ID= 25 A 49 64 nC
Qgd Gate charge gate-to-drain 7.9 nC
Qgs Gate charge gate-to-source 16 nC
Qg(th) Gate charge at Vth 11 nC
Qoss Output charge VDS = 30 V, VGS = 0 V 69 nC
td(on) Turnon delay time
VDS = 30 V, VGS = 10 V,
IDS = 25 A, RG= 0 ℩
8.2 ns
trRise time 8.7 ns
td(off) Turnoff delay time 20 ns
tfFall time 2.7 ns
DIODE CHARACTERISTICS
VSD Diode forward voltage ISD = 25 A, VGS = 0 V 0.8 1 V
Qrr Reverse recovery charge VDS = 30 V, IF= 25 A,
di/dt = 300 A/ÎŒs
139 nC
trr Reverse recovery time 64 ns
(1) RξJC is determined with the device mounted on a 1-in2(6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in (3.81-cm × 3.81-
cm), 0.06-in (1.52-mm) thick FR4 PCB. RξJC is specified by design, whereas RξJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-in2(6.45-cm2), 2-oz (0.071-mm) thick Cu.
5.2 Thermal Information
TA= 25°C unless otherwise stated
THERMAL METRIC MIN TYP MAX UNIT
RΞJC Junction-to-case thermal resistance(1) 0.8 °C/W
RΞJA Junction-to-ambient thermal resistance(1)(2) 50 °C/W
l TEXAS INSTRUMENTS r\ an: Source (\ w: Source ; \J z \, § ? 5 5 u. m 5‘ 5 a a 2 E E ‘ 1 S > 5 E a“ .1" a ; mm 5 mm 10 — 50% 10% 2% Smgle Fu‘se Z‘uc - Normalized Thermal Impedance 00! — 30% — 5% — 1% “m W.” Max R“: = u mm M =P‘zm‘m 155 00001 00m 001 01 y, . Pulse Durauon (sp
GATE Source
DRAIN
N-Chan5x6QFNTTAMAXRev3
M0137-01
4
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SLPS440C –JUNE 2013–REVISED FEBRUARY 2018
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Max RΞJA = 50°C/W
when mounted on 1 in2
(6.45 cm2) of 2-oz
(0.071-mm) thick Cu.
Max RΞJA = 125°C/W
when mounted on a
minimum pad area of
2-oz. (0.071-mm) thick
Cu.
5.3 Typical MOSFET Characteristics
TA= 25°C unless otherwise stated
Figure 1. Transient Thermal Impedance
l TEXAS INSTRUMENTS 2m 2m 100000
TC - Case Temperature (°C)
VGS(th) - Threshold Voltage (V)
-75 -50 -25 0 25 50 75 100 125 150 175
1.8
2
2.2
2.4
2.6
2.8
3
3.2
3.4
D006
VGS - Gate-to-Source Voltage (V)
RDS(on) - On-State Resistance (m:)
0 2 4 6 8 10 12 14 16 18 20
0
2
4
6
8
10
12
14
D007
TC = 25°C, I D = 25 A
TC = 125°C, I D = 25 A
Qg - Gate Charge (nC)
VGS - Gate-to-Source Voltage (V)
0 5 10 15 20 25 30 35 40 45 50
0
1
2
3
4
5
6
7
8
9
10
D004
VDS - Drain-to-Source Voltage (V)
C - Capacitance (pF)
0 6 12 18 24 30 36 42 48 54 60
10
100
1000
10000
100000
D005
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
VDS - Drain-to-Source Voltage (V)
IDS - Drain-to-Source Current (A)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
0
20
40
60
80
100
120
140
160
180
200
D002
VGS = 6 V
VGS = 8 V
VGS = 10 V
VGS - Gate-to-Source Voltage (V)
IDS - Drain-to-Source Current (A)
1 2 3 4 5 6 7 8
0
20
40
60
80
100
120
140
160
180
200
D003
TC = 125° C
TC = 25° C
TC = -55° C
5
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Typical MOSFET Characteristics (continued)
TA= 25°C unless otherwise stated
Figure 2. Saturation Characteristics
VDS = 5 V
Figure 3. Transfer Characteristics
ID= 25 A VDS = 30 V
Figure 4. Gate Charge Figure 5. Capacitance
ID= 250 ”A
Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage
l TEXAS INSTRUMENTS mo 1 non son ‘20
TC - Case Temperature (°C)
IDS - Drain-to-Source Current (A)
-50 -25 0 25 50 75 100 125 150 175
0
20
40
60
80
100
120
D012
VDS - Drain-to-Source Voltage (V)
IDS - Drain-to-Source Current (A)
0.1 1 10 100
0.1
1
10
100
1000
D010
DC
10 ms
1 ms
100 ”s
10 ”s
TAV - Time in Avalanche (ms)
IAV - Peak Avalanche Current (A)
0.01 0.1 1
10
100
300300
D011
TC = 25q C
TC = 125q C
TC - Case Temperature (°C)
Normalized On-State Resistance
-75 -50 -25 0 25 50 75 100 125 150 175
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
D008
VGS = 6 V
VGS = 10 V
VSD - Source-to-Drain Voltage (V)
ISD - Source-to-Drain Current (A)
0 0.2 0.4 0.6 0.8 1
0.0001
0.001
0.01
0.1
1
10
100
D009
TC = 25°C
TC = 125°C
6
CSD18532NQ5B
SLPS440C –JUNE 2013–REVISED FEBRUARY 2018
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Typical MOSFET Characteristics (continued)
TA= 25°C unless otherwise stated
ID= 25 A
Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage
Single pulse, max RΞJC = 0.8°C/W
Figure 10. Maximum Safe Operating Area Figure 11. Single Pulse Unclamped Inductive Switching
Figure 12. Maximum Drain Current vs Temperature
l TEXAS INSTRUMENTS
7
CSD18532NQ5B
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SLPS440C –JUNE 2013–REVISED FEBRUARY 2018
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6 Device and Documentation Support
6.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
6.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2Eℱ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
6.3 Trademarks
NexFET, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
6.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
6.5 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
l TEXAS INSTRUMENTS E2 a. an 401mm J 4. 62% nit E1 Hal L Lt H
D1
Top View
E
c1
‱
E1
4
1 2 3
Side View Bottom View
Front View
14
b (8x)
3
2
e
L
K
H
D2
8
5 6 7
‱
8
5 6 7
D3
d1
d2
8
CSD18532NQ5B
SLPS440C –JUNE 2013–REVISED FEBRUARY 2018
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7 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
7.1 Q5B Package Dimensions
DIM MILLIMETERS
MIN NOM MAX
A 0.80 1.00 1.05
b 0.36 0.41 0.46
c 0.15 0.20 0.25
c1 0.15 0.20 0.25
c2 0.20 0.25 0.30
D1 4.90 5.00 5.10
D2 4.12 4.22 4.32
d 0.20 0.25 0.30
E 4.90 5.00 5.10
E1 5.90 6.00 6.10
E2 3.48 3.58 3.68
e 1.27 TYP
L 0.46 0.56 0.66
ξ0° — —
K 1.40 TYP
l TEXAS INSTRUMENTS (0.175) 4— 4.440 —> (0.023) (0.043) (0.023) * * “-590 E a «1.100 0.110 to Lf f 1.270 (0.050) SYM 0 7s _ _ (4 20) Q + 0.560 (0.022) f 00 ‘— 0.710(0028) (0.136) (0.039) (0.054) 4—3456 —>| 0.98447 —> (372 4— »<—‘ ïŹ‚="" +="" a="" i="" ‘="" t="" 1="" 7="" ,="" +="" a="" i="" f="" r="" ‘1="" 0="" iv="" —‘—"’="" ‘—="" +="" —=""> <—>
4.318 (0.170)
2.186
6.586
0.350
(0.014)
1.294
x 8
(0.051)
0.746 x 8
(0.029)
(0.259)
1.072
(0.042)
1.270
0.562 x 4
(0.022)
0.300
(0.012)
(0.086)
(0.050)
1.525
(0.060)
0.508
x4
(0.020)
1.270 (0.050)
0.286
(0.011)
0.766
(0.030)
9
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7.2 Recommended PCB Pattern
For recommended circuit layout for PCB designs, see Reducing Ringing Through PCB Layout Techniques
(SLPA005).
7.3 Recommended Stencil Pattern
L 4, $$$/$$$$ <74» gb="" $="" 6%="" va.="" ’="" +="" *="">
Ø 1.50 +0.10
–0.00
4.00 ±0.10 (See Note 1)
1.75 ±0.10
R 0.30 TYP
Ø 1.50 MIN
A0
K0
0.30 ±0.05
R 0.30 MAX
A0 = 6.50 ±0.10
B0 = 5.30 ±0.10
K0 = 1.40 ±0.10
M0138-01
2.00 ±0.05
8.00 ±0.10
B0
12.00 ±0.30
5.50 ±0.05
10
CSD18532NQ5B
SLPS440C –JUNE 2013–REVISED FEBRUARY 2018
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7.4 Q5B Tape and Reel Information
Notes:
1. 10-sprocket hole-pitch cumulative tolerance ±0.2.
2. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm.
3. Material: black static-dissipative polystyrene.
4. All dimensions are in mm (unless otherwise specified).
5. A0 and B0 measured on a plane 0.3 mm above the bottom of the pocket.
I TEXAS INSTRUMENTS Samples Samples
PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
CSD18532NQ5B ACTIVE VSON-CLIP DNK 8 2500 RoHS-Exempt
& Green SN Level-1-260C-UNLIM -55 to 150 18532N
CSD18532NQ5BT ACTIVE VSON-CLIP DNK 8 250 RoHS-Exempt
& Green SN Level-1-260C-UNLIM -55 to 150 18532N
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
I TEXAS INSTRUMENTS ‘3‘ V.'
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
TAPE AND REEL INFORMATION
Reel Width (W1)
REEL DIMENSIONS
A0
B0
K0
W
Dimension designed to accommodate the component length
Dimension designed to accommodate the component thickness
Overall width of the carrier tape
Pitch between successive cavity centers
Dimension designed to accommodate the component width
TAPE DIMENSIONS
K0 P1
B0 W
A0
Cavity
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Pocket Quadrants
Sprocket Holes
Q1 Q1Q2 Q2
Q3 Q3Q4 Q4 User Direction of Feed
P1
Reel
Diameter
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
CSD18532NQ5BT VSON-
CLIP DNK 8 250 330.0 12.4 6.3 5.3 1.2 8.0 12.0 Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
W
L
H
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
CSD18532NQ5BT VSON-CLIP DNK 8 250 335.0 335.0 32.0
Pack Materials-Page 2
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