Datenblatt für TC74AC373F, P, FS, FW von Toshiba Semiconductor and Storage
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TOSHIBA
TECHNICAL DATA SILICON MONOLITHIC
OCTAL D—TVPE LATCH WITH 3—STATE OUTPUT
The TC74AC373 is an advanced high speed CMOS OCTAL
LATCH with 3-STA'1'E OUTPUT fabricated with silicon
gate and double- layer metal wiring 02MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky 'I'l'L while maintaining the CMOS low
power dissipation. wazo—p— 300A) FW(SOL20—P-300)
These 87bit Drtype latches are controlled by a latch enable Weigh“ 1309(TVPJ Wei‘mID-‘IGMTVPJ
input (LE) Ed a output enable input (mil
When the OE input is high, the eight outputs are in a high
impedance state. 20 J\/
All inputs are equipped with protection circuits against static
discharge or transient excess voltage. 1 1
FEATURES- F(SOP20—P—300) FSISSOPZO-P—225A)
Weigh1:0.229(TYP.) Weigm : 0.099 (we)
PIN ASSIGNMENT
0 High Speed-
. Low Power Dissipation-
tm = 4.8ns(typ.) at vcc = 5v
cc = 8;:A(Max.) at Ta = 25°C
. High Noise Immunity vN.H=vN‘L=2e% vcc (Min.) a 1 E :I 20 V((
. Symmetrical OutputImpedanceu-| IOH I =IoL=24mA(Minl) QO 2 I: :| 19 Q7
Capability of driving 500 Do 3 I: :I 18 D7
transmission lines, DI 4 E J ‘7 [’5
. Balanced Propagation Delays Maw 3; 2 E g 1: g:
. Wide OperatingVoltage Range Vcc (opr) =2V~ 5,5V D2 7 I: :I 14 D5
- Pin and Function Compatible with 74F373 D3 8 E :I 13 D4
03 9 I: :I 12 04
GND 10 I: :I 11 LE
(TOP VIEW)
TRUTH TABLE IEC LOGIC SYMBOL
INPUTS OUTPUTS
fl LE D Q
H X X Z
L L X Qn
L H L L
L H H H
X : Don‘t Care
2 : High Impedance
0": Q outputs are latched at the time when
the LE input is taken to a low logic
level.
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INTEGRATED CIRCUIT
TOSHIBA TC74AC373P/FIFWIFS
TECHNICAL DATA
SYSTEM DIAGRAM
D0 D1 D2 D3 D4 D5 D6 D7
3L al— 7L 8L 13L ”L 17l— 13L
D D D D D D D D
L6] LE" L67 L6' L6' Li] L57 L6
LE ‘1 I)“ ‘9 I l l l l l l |
E 1 4> 57 57 RI
JI SI 5 a 12 ml 15 I9
00 Q1 02 DB 04 05 06 Q7
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL VALUE UNIT *SOOmW in the range ofTa:
Supply Voltage Range Vcc - 0-5~7-0 V — 4o°c~65°c, From Ta=65°C
_ ~ to 85°C a derating factor of
DC Input Voltage VIN 0.5 Vcc+0.5 V —10mW/°C should be applied
Dc Output Voltage Vow —o.5~vcc+o.5 v upm300mW.
Input Diode Current Im :20 mA
Output Diode Current IOK t 50 mA
DCOutputCurrent low :50 mA
DC VK/Ground Current I“ 1200 mA
Power Dissipation PD 500(DIF)*/180 (SOP/SSOP) mW
Storage Temperature T519 , 65~150 ”C
RECOMMENDED OPERATING CONDITIONS
PARAMETER SYMBOL VALUE UNIT
Supply Voltage V“ 2.D~5.5 V
Input Voltage VI N 0~Vcc V
Output Voltage Vour 0~Vcc V
Operating Temperature 1",Pr 74045 ac
. . 0~ 100 (Vcc = 3.3 i 0.3V)
Input Rise and Fall Time dt/dV 0~ 20(Vcc= 5:05” ns/V
TC74AC373 — 2
1996 — — ZZ
TOSHIBA CORPORATION
INTEGRATED CIRCUIT
TOSHIBA TC74AC373P/F/FWIFS
TECHNICAL DATA
DC ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL TEST CONDITION VCC Ta = 25 c Ta = T40N85 C UNIT
(V) MIN. TYP. MAX. MIN. MAX.
H- h 7 Le el 2.0 1.50 : 1.50
m'SaaveKage 2:2 339 _ 5:933 V
2.0 7 7 0.50 7 0.50
Low - Level _ _ _
'nquoltage V” 2:3 — — I133 — 9:22 V
2.0 1.9 2.0 — 1.9 —
. 3.0 2.9 3.0 7 1.9 7
HIgh - Level v.N = 4.5 4.4 4.5 — 4.4 —
Output Voltage VOH 3 0 2 58 _ _ 2 48 _ V
W ”NH 425 3294 — — 3280 —
5.5 — — — 3.85 —
2.0 7 0.0 0.1 7 0.1
3.0 7 0.0 0.1 7 0.1
I-DOVIIITuI-tengtage V v. N = 4.5 — 0.0 0.1 — 0.1 V
U 0|. _ _ _
2:3 _ _ 3:32 _ III:
5 5 7 7 7 7 1.55
3-StateOt t V =V orV
0H-State%3r¥ent '02 VL’VUT=\I/1CorIGLND 5 5 ‘ ‘ 1°75 ‘ :50
Input Leakage Current I.N Vw=vccorGND 5 5 — — :01 — i 1.0 ”A
Quiescemupply Current I“ v. N _ (C or GND 5.5 — — s 0 — 80.0
t : This spec indicates the capability of driving 5m transmission lines.
ode output should be tested at a time {or a 10ms maximum duration
TIMING REQUIREMENTS( Input t, = t, = ins)
TEST CONDITION Ta = 25°C Ta = —40~85°C
PARAMETER SVMEOL UNIT
v(((v) LIMIT LIMIT
Minimum Pulse Width tw H 33:03 7.0 7.0
(LE) ‘ I 5.0205 5.0 5.0
. . . 3.3203 6.0 6.0 ns
. t
MInImum Set up TIme s 50:05 3-5 15
, . . 3310.3 1.0 1.0
MInImum Hold TIme th 50:05 1-0 1.0
TC74AC373 — 3
1996 — 4 — ZZ
TOSHIBA CORPORATION
INTEGRATED CIRCUIT
TOSHIBA TC74AC373P/FIFWIFS
TECH NICAL DATA
AC ELECTRICAL CHARACTERISTICS ( CL = 50pF , Rl = 5009 , Input t,= t, = ans)
TE T = ° = ’ 7 °
PARAMETER SVMBOL S CONDITION Ta 25 C Ta 40 85 C UNIT
Vcc (V) MIN. TYP. MAX. MIN. MAX.
Propagation Delay Time tpLH 3.3 $0.3 — 7.7 13.2 1.0 15.0
(L570) IpHL 5.0 1 0.5 — 6.1 8.7 1 o 10.0
Propagation Delay Time 19”.. 3.3 10.3 — 7.6 12.9 1.0 14.7
(D70) tpHL 5.0105 7 5.8 8.3 1.0 9.5 ns
. t ZL 3.3 10.3 — 7.5 12.9 1.0 14.7
Output Enable Time (221-1 50 :05 _ 3_1 3.7 1.0 10.0
. . t L2 3.3 :03 — 7.0 11.0 1.0 12.5
Output Disable Time him 50 1 0.5 _ 5_4 7.5 1.0 8.5
Input Capacitance CIN 7 5 10 7 10
Output Capacitance CQUT 7 10 7 7 7 pF
Power Dissipation Capacitame Cpn(1) 7 38 7 7 7
Note(1) CPD is defined as the value of the internal equivalent capacitance which is calculated from the
operating current consumption.
Average operating current can be obtained by the equation:
ICC(opr) =CPD ' Vcc ' fIN ' ICC/8(Per Latch)
And the total CPD when n pcs. of Latch operate can be gained by the following equation:
CPD (total) = 26+ 12 ' n
TC74AC373 —4
1996 — — ZZ
TOSHIBA CORPORATION
INTEGRATED CIRCUIT
TOSHIBA TC74AC373P/FIFWIFS
TECH NICAL DATA
DIP 20PIN OUTLINE DRAWING (DIPZO—P—300A) Unit in mm
0.57m:
Weight: 1.30g (TYR)
SOP ZDPIN (200miIBODY) OUTLINE DRAWING(SOP20— P— 300) Unit in mm
20 11
HHHHHHHHHH
E IEI EI E H I3 H I?)
0.5357v9 o..43:aI émfl
127
5 310 2
74830.3
13. SMAX
Weight: 0.22g(’l‘YP.)
TC74AC373 — 5
1996 — 4 — ZZ
TOSHIBA CORPORATION
INTEGRATED CIRCUIT
TOSHIBA
TECH NICAL DATA
TC74AC373P/FIFWIFS
SOP 20PIN (300miIBODY) OUTLINE DRAWING (SOLZD— P-SDD)
Eguwuwufig
7 5:0 1
103:0:
L2,?
jET—Tfifififlfifi_
1 ID
0.42:0.07
Unit in mm
12.8104
Weight : 0.46g (TYR)
45'
SSOP 20PIN OUTLINE DRAWING(SSOP2IJ—P— 225A)
Unit in mm
20 II
HHHHHERHR
4.4t02
64:0 3
"QM,“
65:02
:02
O I.
an HEB
‘ 10
m
Weight: 0.09g(’l‘YPI)
01‘3355 ”1 2
(225nm)
TC74AC373 — 6*
1996 — 4 — ZZ
TO=HIOA CORPORATION

