TI provides some extensions to the standard API for the 28x processors. The first feature is a special interrupt disable/restore option where the user is allowed to specify which interrupts will never be disabled by SYS/BIOS. If the application requires absolute minimal interrupt latency, this feature can be enabled and which interrupt(s) to ignore from BIOS perspective can be specified. In this mode, the IER register is used to disable and restore interrupts instead of the global INTM bit. This reduces the interrupt latency to around thirty five instructions. One caveat is that ISRs that are configured to be ignored by BIOS cannot make any SYS/BIOS system calls. Another 28x feature is the support for the PIE interrupts. The PIE interrupts are mapped to specific interrupt IDs and do the necessary PIE ACK for the PIE groups in the standard BIOS interrupt dispatcher.