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LTC4310-Slide6

The slide above contains some graphs demonstrating the LTC4310’s performance. The graph on the left shows a transient introduced across the two isolated grounds in the application circuit of the previous slide. The rising edge of the transient results in absolutely no change in SCL or SDA. Using the same circuit, the graph on the right demonstrates how a pair of LTC4310s can level translate and minimize skew. The grounds of the two busses are referenced to the same point to easily show the two bus waveforms with respect to each other, even though in reality the two ground voltages could be up to 1500V apart from each other. SCL1 and  SCL2 are shown over an entire 100kHz switching cycle. SCL1 is pulled up to a 3.3V supply, encoded by one LTC4310-1 and transmitted across the isolation barrier. The second LTC4310-1 then receives and decodes the incoming signal to produce SCL2 pulled up to a 5V supply. Because the LTC4310-1 regulates the bus rise rate to (0.35 • VCC)/900ns, the 5V bus signal rises more quickly than the 3.3V bus signal. Both busses reach (0.35 • VCC) in approximately 900ns, so the effective skew between the busses is nearly zero. The LTC4310-2 functions the same as the LTC4310-1, except the controlled rise rate is limited to (0.35 • VCC)/300ns. Notice that the signal shape and integrity is maintained and no skew is observed in this 100kHz transmission assisted with rise time acceleration.

PTM Published on: 2011-05-16