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PoweringFPGA-Slide23

DC-to-DC regulators, while much more efficient than LDOs, have traditionally been considered too noisy to directly power high-performance analog-to-digital converters without significant parametric degradation. Analog-to-digital converter noise has at least two sources: noise coupled directly into the converter through supply ripple, and noise due to magnetic coupling effects. The block diagram in this slide shows a lab setup used to compare the performance of a 16-bit, 125-MSPS analog-to-digital converter either powered by low-noise LDOs or the ADP2114 switching regulator. The AD9268 used in the evaluation achieves very low noise with a 78-dB signal-to-noise ratio (SNR) specification. The low noise floor of –152dBm/Hz makes it an ideal candidate for evaluation with a switching power supply as additional noise or spurious content contributed by the DC-to-DC converter would be easily visible in the converter’s output spectrum.

PTM Published on: 2009-11-10