LM828 Datasheet by Texas Instruments

ITEXAS INSTRUMENTS 5 2 mm vo v‘N (t 8V lo 55v) LMEZa V CAP- um Vow : “W ‘32 +5V 5 Z 5 2 CW v+ cw v4 {7 LM828 LMBZB 4 GND GND 5 ‘ ‘L CAP? OUT CAP our VOW = 40V
LM828
www.ti.com
SNOS035D –MARCH 2010–REVISED MAY 2013
LM828 Switched Capacitor Voltage Converter
Check for Samples: LM828
1FEATURES DESCRIPTION
The LM828 CMOS charge-pump voltage converter
2• Inverts Input Supply Voltage inverts a positive voltage in the range of +1.8V to
• SOT-23 Package +5.5V to the corresponding negative voltage of −1.8V
• 20ΩTypical Output Impedance to −5.5V. The LM828 uses two low cost capacitors to
provide up to 25 mA of output current.
• 97% Typical Conversion Efficiency at 5 mA
The LM828 operates at 12 kHz switching frequency
APPLICATIONS to reduce output resistance and voltage ripple. With
an operating current of only 40 µA (operating
• Cellular Phones efficiency greater than 96% with most loads), the
• Pagers LM828 provides ideal performance for battery
• PDAs powered systems. The device is in a tiny SOT-23
package.
• Operational Amplifier Power Supplies
• Interface Power Supplies
• Handheld Instruments
Basic Application Circuits
Voltage Inverter
+5V to −10V Converter
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2010–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
l TEXAS INSTRUMENTS
LM828
SNOS035D –MARCH 2010–REVISED MAY 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Supply Voltage (V+ to GND, or GND to OUT) 5.8V
V+ and OUT Continuous Output Current 50 mA
Output Short-Circuit Duration to GND(3) 1 sec.
Continuous Power Dissipation (TA= 25°C)(4) 240 mW
TJMax(4) 150°C
θJA(4) 300°C/W
Operating Junction Temperature Range −40°C to 85°C
Storage Temperature Range −65°C to +150°C
Lead Temp. (Soldering, 10 seconds) 300°C
ESD Rating(5) 2kV
(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when
operating the device beyond its rated operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and should be
avoided. Also, for temperatures above 85°C, OUT must not be shorted to GND or V+, or the device may be damaged.
(4) The maximum allowable power dissipation is calculated by using PDMax = (TJMax −TA)/θJA, where TJMax is the maximum junction
temperature, TAis the ambient temperature, and θJA is the junction-to-ambient thermal resistance of the package.
(5) The human body model is a 100 pF capacitor discharged through a 1.5 kΩresistor into each pin.
Electrical Characteristics
Limits in standard typeface are for TJ= 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: V+ = 5V, C1= C2= 10 μF.(1)
Symbol Parameter Condition Min Typ Max Units
V+ Supply Voltage RL=10kΩ1.8 5.5 V
IQSupply Current No Load 40 75 µA
115
ROUT Output Resistance(2) IL= 5 mA 20 65 Ω
fOSC Oscillator Frequency(3) Internal 12 24 56 kHz
fSW Switching Frequency(3) Measured at CAP+ 612 28 kHz
PEFF Power Efficiency IL= 5 mA 97 %
VOEFF Voltage Conversion Efficiency No Load 95 99.96 %
(1) In the test circuit, capacitors C1and C2are 10 µF, 0.3Ωmaximum ESR capacitors. Capacitors with higher ESR will increase output
resistance, reduce output voltage and efficiency.
(2) Specified output resistance includes internal switch resistance and capacitor ESR. See the details in the application information.
(3) The output switches operate at one half of the oscillator frequency, fOSC = 2fSW.
2Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated
Product Folder Links: LM828
l TEXAS INSTRUMENTS vw (Lav ‘0 5.5V) Supply Currunl (MA) Supp‘y Curran! (HA) ‘5 25 3.5 LS 55 750 725 u 25 5o 75 we Supp‘y VoMage (v) Temperamre (°c) culpm Raslsiance (H) mm Res-mm (n) L5 2.5 5.5 4.5 5.5 750 725 u 25 5o 75 we Supp‘y Vuliage (v) Temperature (°c)
LM828
www.ti.com
SNOS035D –MARCH 2010–REVISED MAY 2013
Test Circuit
*C1and C2are 10 µF capacitors.
Figure 1. LM828 Test Circuit
Typical Performance Characteristics
(Circuit of Figure 1, V+ = 5V unless otherwise specified)
Supply Current vs Supply Current vs
Supply Voltage Temperature
Figure 2. Figure 3.
Output Source Resistance Output Source Resistance
vs vs
Supply Voltage Temperature
Figure 4. Figure 5.
Copyright © 2010–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: LM828
l TEXAS INSTRUMENTS Oulpul Vanag. (v) 5mm Fruqusncy (m) -20 73.0 -AU Vm : 5.0V -5 0 760 0 5 <0 r520251035w4550="" load="" curran!="" (ma)="" ‘="" 5="" 2.5="" 5="" 5="" 4.5="" 5="" 5="" supp‘y="" vumage="" (v)="" i04="" in="" ewe-em="" (z)="" swflchmg="" quuency="" (m)="" mo="" 90="" so="" 70="" so="" 50="" to="" 30="" 20="" i0="" 0="" 0="" 510r520255055¢04550="" load="" current="" (ma)="" 750="" 725="" 0="" 25="" 50="" 75="" 100="" temperamve="" ("cl="">
LM828
SNOS035D –MARCH 2010–REVISED MAY 2013
www.ti.com
Typical Performance Characteristics (continued)
(Circuit of Figure 1, V+ = 5V unless otherwise specified)
Output Voltage Efficiency vs
vs Load Current Load Current
Figure 6. Figure 7.
Switching Frequency vs Switching Frequency vs
Supply Voltage Temperature
Figure 8. Figure 9.
CONNECTION DIAGRAMS
5-Lead SOT-23 Package (DBV)
Figure 10. SOT-23 Package – Top View Figure 11. Actual Size
See Package Number DBV0005A
4Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated
Product Folder Links: LM828
l TEXAS INSTRUMENTS CAP- oscmma dmded by m r20UT a ZRSW + + AESRC1 + ESRCZ f05c X Cw
LM828
www.ti.com
SNOS035D –MARCH 2010–REVISED MAY 2013
Pin Functions
PIN DESCRIPTIONS
Pin Name Function
1 OUT Negative voltage output.
2 V+ Power supply positive input.
3 CAP−Connect this pin to the negative terminal of the charge-pump capacitor.
4 GND Power supply ground input.
5 CAP+ Connect this pin to the positive terminal of the charge-pump capacitor.
Circuit Description
The LM828 contains four large CMOS switches which are switched in a sequence to invert the input supply
voltage. Energy transfer and storage are provided by external capacitors. Figure 12 illustrates the voltage
conversion scheme. When S1and S3are closed, C1charges to the supply voltage V+. During this time interval,
switches S2and S4are open. In the second time interval, S1and S3are open; at the same time, S2and S4are
closed, C1is charging C2. After a number of cycles, the voltage across C2will be pumped to V+. Since the anode
of C2is connected to ground, the output at the cathode of C2equals −(V+) when there is no load current. The
output voltage drop when a load is added is determined by the parasitic resistance (Rds(on) of the MOSFET
switches and the ESR of the capacitors) and the charge transfer loss between capacitors.
Figure 12. Voltage Inverting Principle
Application Information
SIMPLE NEGATIVE VOLTAGE CONVERTER
The main application of LM828 is to generate a negative supply voltage. The voltage inverter circuit uses only
two external capacitors as shown in the Basic Application Circuits. The range of the input supply voltage is 1.8V
to 5.5V.
The output characteristics of this circuit can be approximated by an ideal voltage source in series with a
resistance. The voltage source equals −(V+). The output resistance, Rout , is a function of the ON resistance of
the internal MOSFET switches, the oscillator frequency, the capacitance and the ESR of both C1and C2. Since
the switching current charging and discharging C1is approximately twice as the output current, the effect of the
ESR of the pumping capacitor C1will be multiplied by four in the output resistance. The output capacitor C2is
charging and discharging at a current approximately equal to the output current, therefore, this ESR term only
counts once in the output resistance. A good approximation of Rout is:
(1)
where RSW is the sum of the ON resistance of the internal MOSFET switches shown in Figure 12.
High capacitance, low ESR capacitors will reduce the output resistance.
The peak-to-peak output voltage ripple is determined by the oscillator frequency, the capacitance and ESR of the
output capacitor C2:
Copyright © 2010–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: LM828
l TEXAS INSTRUMENTS | L v : — + 2 x w x ESR mm: 'osc X 02 L c2 *1 Pour PM L R 7 RM of each mm OUT ’ Number of Devices Vour
LM828
SNOS035D –MARCH 2010–REVISED MAY 2013
www.ti.com
(2)
Again, using a low ESR capacitor will result in lower ripple.
CAPACITOR SELECTION
The output resistance and ripple voltage are dependent on the capacitance and ESR values of the external
capacitors. The output voltage drop is the load current times the output resistance, and the power efficiency is
(3)
Where IQ(V+) is the quiescent power loss of the IC device, and IL2Rout is the conversion loss associated with the
switch on-resistance, the two external capacitors and their ESRs.
The selection of capacitors is based on the specifications of the dropout voltage (which equals Iout Rout), the
output voltage ripple, and the converter efficiency. Low ESR capacitors (following table) are recommended to
maximize efficiency, reduce the output voltage drop and voltage ripple.
Low ESR Capacitor Manufacturers
Manufacturer Phone Capacitor Type
Nichicon Corp. (708)-843-7500 PL & PF series, through-hole aluminum electrolytic
AVX Corp. (803)-448-9411 TPS series, surface-mount tantalum
Sprague (207)-324-4140 593D, 594D, 595D series, surface-mount tantalum
Sanyo (619)-661-6835 OS-CON series, through-hole aluminum electrolytic
Murata (800)-831-9172 Ceramic chip capacitors
Taiyo Yuden (800)-348-2496 Ceramic chip capacitors
Tokin (408)-432-8020 Ceramic chip capacitors
Other Applications
PARALLELING DEVICES
Any number of LM828s can be paralleled to reduce the output resistance. Each device must have its own
pumping capacitor C1, while only one output capacitor Cout is needed as shown in Figure 13. The composite
output resistance is:
(4)
Figure 13. Lowering Output Resistance by Paralleling Devices
6Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated
Product Folder Links: LM828
l TEXAS INSTRUMENTS Voun : ”m ' NH]
LM828
www.ti.com
SNOS035D –MARCH 2010–REVISED MAY 2013
CASCADING DEVICES
Cascading the LM828s is an easy way to produce a greater negative voltage (e.g. A two-stage cascade circuit is
shown in Figure 14).
If n is the integer representing the number of devices cascaded, the unloaded output voltage Vout is (-nVin). The
effective output resistance is equal to the weighted sum of each individual device:
Rout = nRout_1 + n/2 Rout_2 + ... + Rout_n (5)
This can be seen by first assuming that each device is 100 percent efficient. Since the output voltage is different
on each device the output current is as well. Each cascaded device sees less current at the output than the
previous so the ROUT voltage drop is lower in each device added. Note that, the number of n is practically limited
since the increasing of n significantly reduces the efficiency, and increases the output resistance and output
voltage ripple.
Figure 14. Increasing Output Voltage by Cascading Devices
COMBINED DOUBLER AND INVERTER
In Figure 15, the LM828 is used to provide a positive voltage doubler and a negative voltage converter. Note that
the total current drawn from the two outputs should not exceed 40 mA.
Figure 15. Combined Voltage Doubler and Inverter
Copyright © 2010–2013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: LM828
l TEXAS INSTRUMENTS z 5 cm v» Y My Vw cz m o 022 Mr _ ;: LMEZE 2,2 M Lstafl-ADJ ‘ayr 2 GND GND R2 1 5 4, CM» 0m l, M ADJ ON/orr :3 ‘aur m Rzgulated Nagshve Vour
LM828
SNOS035D –MARCH 2010–REVISED MAY 2013
www.ti.com
REGULATING VOUT
It is possible to regulate the negative output of the LM828 by use of a low dropout regulator (such as the
LP2980). The whole converter is depicted in Figure 16. This converter can give a regulated output from −1.8V to
−5.5V by choosing the proper resistor ratio:
Vout = Vref (1 + R1/R2) (6)
where, Vref = 1.23V (7)
Note that the following conditions must be satisfied simultaneously for worst case design:
Vin_min >Vout_min +Vdrop_max (LP2980) (8)
+ Iout_max × Rout_max (LM828) (9)
Vin_max < Vout_max +Vdrop_min (LP2980) (10)
+ Iout_min × Rout_min (LM828) (11)
Figure 16. Combining LM828 with LP2980 to Make a Negative Adjustable Regulator
8Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated
Product Folder Links: LM828
l TEXAS INSTRUMENTS
LM828
www.ti.com
SNOS035D –MARCH 2010–REVISED MAY 2013
REVISION HISTORY
Changes from Revision C (May 2013) to Revision D Page
• Changed layout of National Data Sheet to TI format ............................................................................................................ 8
Copyright © 2010–2013, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: LM828
I TEXAS INSTRUMENTS Samples Samples
PACKAGE OPTION ADDENDUM
www.ti.com 30-Sep-2021
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM828M5 NRND SOT-23 DBV 5 1000 Non-RoHS
& Green Call TI Level-1-260C-UNLIM S08A
LM828M5/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 S08A
LM828M5X NRND SOT-23 DBV 5 3000 Non-RoHS
& Green Call TI Level-1-260C-UNLIM S08A
LM828M5X/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 S08A
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 30-Sep-2021
Addendum-Page 2
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
I TEXAS INSTRUMENTS 5:. V.’
PACKAGE MATERIALS INFORMATION
www.ti.com 9-Aug-2022
TAPE AND REEL INFORMATION
Reel Width (W1)
REEL DIMENSIONS
A0
B0
K0
W
Dimension designed to accommodate the component length
Dimension designed to accommodate the component thickness
Overall width of the carrier tape
Pitch between successive cavity centers
Dimension designed to accommodate the component width
TAPE DIMENSIONS
K0 P1
B0 W
A0
Cavity
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Pocket Quadrants
Sprocket Holes
Q1 Q1Q2 Q2
Q3 Q3Q4 Q4 User Direction of Feed
P1
Reel
Diameter
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM828M5 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q2
LM828M5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q2
LM828M5X SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q2
LM828M5X/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 9-Aug-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
W
H
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM828M5 SOT-23 DBV 5 1000 208.0 191.0 35.0
LM828M5/NOPB SOT-23 DBV 5 1000 208.0 191.0 35.0
LM828M5X SOT-23 DBV 5 3000 208.0 191.0 35.0
LM828M5X/NOPB SOT-23 DBV 5 3000 208.0 191.0 35.0
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
0.22
0.08 TYP
0.25
3.0
2.6
2X 0.95
1.9
1.45
0.90
0.15
0.00 TYP
5X 0.5
0.3
0.6
0.3 TYP
8
0 TYP
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/F 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.25 mm per side.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/F 06/2021
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/F 06/2021
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2022, Texas Instruments Incorporated