LM3668 Datasheet by Texas Instruments

ITEXAS V'.‘ INSTRUMENTS vw=25v m ”—j_—T—T_\ 1; w m w} P
FB
2.8V/3.3V
SW1
SW2
EN
LM3668
PVIN
PGND
SYNC/MODE
VSEL L = 2.8V
H = 3.3V
VIN = 2.5V - 5.5V
SGND
VOUT
VDD
C2
22 PF
C1
10 PF
2.2 PH
NC
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LM3668
SNVS449O –JUNE 2007–REVISED APRIL 2015
LM3668 1-A, High-Efficiency Dual-Mode Single-Inductor Buck-Boost DC-DC Converter
1 Features 2 Applications
1• 45-µA Typical Quiescent Current • Handset Peripherals
• For 2.8-V-3.3-V and 3-V-3.4-V Versions: • MP3 Players
• Pre-Regulation for Linear Regulators
– 1-A Maximum Load Current for
VIN = 2.8 V to 5.5 V • PDAs
– 800-mA Maximum Load Current for • Portable Hard Disk Drives
VIN = 2.7 V • WiMax Modems
– 600-mA Maximum Load Current for
VIN = 2.5 V 3 Description
• For 4.5 V-5 V The LM3668 is a synchronous buck-boost DC-DC
converter optimized for powering low voltage circuits
– 1-A Maximum Load Current for from a Li-Ion battery and input voltage rails between
VIN = 3.9 V to 5.5 V 2.5 V and 5.5 V. It has the capability to support up to
– 800-mA Maximum Load Current for 1-A output current over the output voltage range. The
VIN = 3.4 V to 3.8 V LM3668 regulates the output voltage over the
complete input voltage range by automatically
– 700-mA Maximum Load Current for switching between buck or boost modes depending
VIN =3Vto3.3V on the input voltage.
– 600-mA Maximum Load Current for The LM3668 has 2 N-channel MOSFETS and 2 P-
VIN = 2.7 V to 2.9 V channel MOSFETS arranged in a topology that
• 2.2-MHz PWM Fixed Switching Frequency provides continuous operation through the buck and
(Typical) boost operating modes. There is a MODE pin that
• Automatic PFM-PWM Mode or Forced PWM allows the user to choose between an intelligent
Mode automatic PFM-PWM mode operation and forced
PWM operation. During PWM mode, a fixed-
• Wide Input Voltage Range: 2.5 V to 5.5 V frequency 2.2 MHz (typical) is used. PWM mode
• Internal Synchronous Rectification for High drives load up to 1 A. Hysteretic PFM mode extends
Efficiency the battery life through reduction of the quiescent
• Internal Soft Start: 600-µs Maximum Start-Up current to 45 µA (typical) at light loads during system
Time After VIN Settled standby. Internal synchronous rectification provides
high efficiency. In shutdown mode (EN pin pulled
• 0.01-µA Typical Shutdown Current low), the device turns off and reduces battery
• Current Overload and Thermal Shutdown consumption to 0.01 µA (typical).
Protection A high switching frequency of 2.2 MHz (typical)
• Frequency Sync Pin: 1.6 MHz to 2.7 MHz allows the use of tiny surface-mount components
including a 2.2-µH inductor, a 10-µF input capacitor,
Typical Application Circuit and a 22-µF output capacitor.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
LM3668 WSON (12) 3.00 mm x 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Table of Contents
8.3 Feature Description................................................. 14
1 Features.................................................................. 18.4 Device Functional Modes........................................ 16
2 Applications ........................................................... 19 Application and Implementation ........................ 19
3 Description ............................................................. 19.1 Application Information............................................ 19
4 Revision History..................................................... 29.2 Typical Application .................................................. 19
5 Device Comparison Table..................................... 310 Power Supply Recommendations ..................... 23
6 Pin Configuration and Functions......................... 311 Layout................................................................... 23
7 Specifications......................................................... 411.1 Layout Guidelines ................................................. 23
7.1 Absolute Maximum Ratings ...................................... 411.2 Layout Example .................................................... 23
7.2 ESD Ratings.............................................................. 412 Device and Documentation Support ................. 24
7.3 Recommended Operating Conditions....................... 412.1 Device Support...................................................... 24
7.4 Thermal Information.................................................. 512.2 Trademarks........................................................... 24
7.5 Electrical Characteristics........................................... 512.3 Electrostatic Discharge Caution............................ 24
7.6 Typical Characteristics.............................................. 612.4 Glossary................................................................ 24
8 Detailed Description............................................ 13 13 Mechanical, Packaging, and Orderable
8.1 Overview ................................................................. 13 Information ........................................................... 24
8.2 Functional Block Diagram....................................... 14
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision N (August 2014) to Revision O Page
• Changed RθJA value from 34 to 47.3; change 20 PINS to 12 PINS in header; add additional thermal information............... 5
Changes from Revision M (May 2013) to Revision N Page
• Added Pin Configuration and Functions section, Handling Rating table, Feature Description section, Device
Functional Modes,Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section ................................................................................................................................................................................... 1
Changes from Revision L (April 2013) to Revision M Page
• Changed layout of National Data Sheet to TI format ........................................................................................................... 23
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l TEXAS INSTRUMENTS DDDDDD DDDDDD
DAP
11
12
10
9
8
76
5
4
3
2
1
FB
VSEL
MODE/
SYNC
SGND
NC
VDD
VOUT
SW2
PGND
SW1
PVIN
EN
1
2
3
49
10
11
12
8
DAP
5
7
6
VOUT
SW2
PGND
SW1
PVIN
EN
FB
VSEL
MODE/
SYNC
SGND
NC
VDD
LM3668
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SNVS449O –JUNE 2007–REVISED APRIL 2015
5 Device Comparison Table
OUTPUT VOLTAGE
ORDER NUMBER PACKAGE PACKAGE MARKING SUPPLIED AS
(V)
LM3668SD-2833/NOPB 2.8, VSEL = low S017B 1000 units, tape-and-reel
3.3, VSEL = high
LM3668SDX-2833/NOPB 4500 units, tape-and-reel
LM3668SD-3034/NOPB 3, VSEL = low S018B 1000 units, tape-and-reel
DQB (WSON)
3.4, VSEL = high
LM3668SDX-3034/NOPB 4500 units, tape-and-reel
LM3668SD-4550/NOPB 4.5, VSEL = low S019B 1000 units, tape-and-reel
5, VSEL = high
LM3668SDX-4550/NOPB 4500 units, tape-and-reel
6 Pin Configuration and Functions
DQB Package DQB Package
12-Pin WSON 12-Pin WSON
Top View Bottom View
Pin Functions(1)
PIN TYPE DESCRIPTION
NO. NAME
1 VOUT A Connect to output capacitor.
2 SW2 A Switching node connection to the internal PFET switch (P2) and NFET synchronous
rectifier (N2).
3 PGND G Power ground.
4 SW1 A Switching node connection to the internal PFET switch (P1) and NFET synchronous
rectifier (N1).
5 PVIN P Supply to the power switch, connect to the input capacitor.
6 EN I Enable input. Set this digital input high for normal operation. For shutdown, set low.
7 VDD P Signal supply input. If board layout is not optimum an optional 1-µF ceramic capacitor
is suggested as close to this pin as possible.
8 NC - No connect. Connect this pin to SGND on PCB layout.
9 SGND G Analog and Control Ground.
10 MODE/SYNC I Mode = LOW, Automatic Mode. Mode= HI, forced PWM Mode. SYNC = external clock
synchronization from 1.6 MHz to 2.7 MHz.(When SYNC function is used, device is
forced in PWM mode).
11 VSEL I Voltage selection pin; (for example, 2.8-V-3.3-V option) logic input low (or GND) = 2.8
V and logic high = 3.3 V (or VIN) to set output voltage.
12 FB A Feedback analog input. Connect to the output at the output filter.
DAP DAP - Die Attach Pad, connect the DAP to SGND on PCB layout to enhance thermal
performance. It should not be used as a primary ground connection.
(1) A: Analog Pin, G: Ground Pin, P: Power Pin, I: Digital Input Pin
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
PVIN, VDD, SW1, SW2 & VOUT pins: voltage to SGND & PGND –0.2 6 V
FB, EN, and MODE/SYNC pins (PGND and SGND-0.2) (PVIN + 0.2) V
PGND to SGND –0.2 0.2 V
Continuous power dissipation(3) Internally Limited
Maximum junction temperature (TJ-MAX) 125 °C
Maximum lead temperature (soldering, 10 sec) 260 °C
Storage temperature , Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =
125ºC), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (RθJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX).
7.2 ESD Ratings
VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500
V(ESD) Electrostatic discharge V
Charged-device model (CDM), per JEDEC specification JESD22- ±1250
C101(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN MAX UNIT
Input voltage 2.5 5.5 V
Recommended load current 0 1 A
Junction temperature (TJ)−40 125 °C
Ambient temperature (TA)(1) −40 85 °C
(1) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =
125ºC), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (RθJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX).
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7.4 Thermal Information
LM3668
THERMAL METRIC(1) DQB (WSON) UNIT
12 PINS
RθJA Junction-to-ambient thermal resistance, WSON package(2) 47.3
RθJC(top) Junction-to-case (top) thermal resistance 43..4
RθJB Junction-to-board thermal resistance 21.6 °C/W
ψJT Junction-to-top characterization parameter 0.4
ψJB Junction-to-board characterization parameter 21.7
RθJC(bot) Junction-to-case (bottom) thermal resistance 3.5
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) Junction-to-ambient thermal resistance (RθJA) is taken from a thermal modeling result, performed under the conditions and guidelines
set forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 101.6 mm x 76.2 mm x 1.6 mm.
Thickness of the copper layers are 2oz/1oz/1oz/2oz. The middle layer of the board is 60 mm x 60 mm. Ambient temperature in
simulation is 22°C, still air. Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications
where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design.
7.5 Electrical Characteristics
Unless otherwise noted, specifications apply to the LM3668. VIN = 3.6 V = EN, VOUT = 3.3 V. For VOUT = 4.5V-5 V, VIN =
4 V.(1)(2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VFB Feedback voltage −40°C ≤TA≤85°C, see(2) –3% 3%
Switch peak current limit Open loop(3) 1.85
ILIM A
Switch peak current limit Open loop(3),−40°C ≤TA≤85°C 1.6 2.05
Shutdown supply current EN = 0 V 0.01
ISHDN µA
Shutdown supply current EN = 0 V, −40°C ≤TA≤85°C 1
No load, device is not switching (FB
DC bias current in PFM forced higher than programmed output 45
voltage)
IQ_PFM µA
No load, device is not switching (FB
forced higher than programmed output
DC bias current in PFM 60
voltage)
−40°C ≤TA≤85°C
DC bias current in PWM PWM mode, no switching 600
IQ_PWM µA
PWM mode, no switching
DC bias current in PWM 750
−40°C ≤TA≤85°C
RDSON(P) Pin-pin resistance for PFET Switches P1 and P2 130 180 mΩ
RDSON(N) Pin-pin resistance for NFET Switches N1 and N2 100 150 mΩ
PWM mode 2.2
FOSC Internal oscillator frequency MHz
PWM mode, −40°C ≤TA≤85°C 1.9 2.5
FSYNC Sync frequency range VIN = 3.6 V 1.6 2.7 MHz
Logic high input for EN,
VIH −40°C ≤TA≤85°C 1.1 V
MODE/SYNC pins
Logic low input for EN,
VIL −40°C ≤TA≤85°C 0.4 V
MODE/SYNC pins
0.3
IEN, MODE, EN, MODE/SYNC pins input current µA
SYNC −40°C ≤TA≤85°C 1
(1) All voltages with respect to SGND.
(2) Minimum and Maximum limits are specified by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the
most likely norm.
(3) Electrical Characteristics table reflects open loop data (FB = 0 V and current drawn from SW pin ramped up until cycle-by-cycle current
limits is activated). Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current
until output voltage drops by 10%.
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TEMPERATURE (°C)
ILIMIT (A)
2.00
1.95
1.90
1.85
1.80
1.75
1.70
-40 -20 0 20 40 60 80 100
VIN = 3.6V
LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 5.5V
VIN = 5.0V
VIN = 3.6V
VIN = 2.5V
VIN = 2.7V
TEMPERATURE (°C)
RESISTANCE (mÖ)
150
125
100
75
50
25
0
-40 -20 0 20 40 60 80 100
NFET = 2.5V NFET = 2.7V
NFET = 3.6V
NFET = 5.5V
TEMPERATURE (°C)
RESISTANCE (mÖ)
200
175
150
125
100
75
50
25
0
-40 -20 0 20 40 60 80 100
PFET_RDS = 2.5V PFET_RDS = 2.7V
PFET_RDS = 3.6V
PFET_RDS = 5.5V
TEMPERATURE (°C)
IQ_PWM (éA)
900
800
700
600
500
400
300
200
-40 -20 0 20 40 60 80 100
IQ_2.5V
IQ_3.6V
IQ_5.5V
TEMPERATURE (°C)
FREQUENCY (MHz)
2.4
2.3
2.2
2.1
2.0
1.9
-40 -20 0 20 40 60 80 100
VIN = 2.5V
VIN = 3.6V
VIN = 5.5V
LM3668
SNVS449O –JUNE 2007–REVISED APRIL 2015
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7.6 Typical Characteristics
Typical Application Circuit (see Figure 46): VIN = 3.6 V, L = 2.2 µH, CIN = 10 µF, COUT = 22 µF(4), TA= 25°C , unless otherwise
stated.
Figure 1. Supply Current vs Temperature (Not Switching) Figure 2. Switching Frequency vs. Temperature
(VOUT = 3.4 V) (VOUT = 3.4 V)
Figure 3. NFET_RDS (on) vs. Temperature (VOUT = 3.4 V) Figure 4. PFET_RDS (on) vs. Temperature (VOUT = 3.4 V)
Figure 5. ILIMIT vs. Temperature (VOUT = 3.4 V) Figure 6. Efficiency at VOUT = 2.8 V (Forced PWM Mode)
(4) CIN and COUT: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics. COUT_MIN should not
exceed −40% of suggested value. The preferable choice would be a type and make MLCC that issues –30% over the operating
temperature and voltage range.
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l TEXAS INSTRUMENTS mu 90 an 7U 50 SD 4n EFF‘C‘ENCY Wu; 3m 2m m n ‘ m me man LOAD my v w w HHH‘
LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 3.3V
VIN = 3.6V
VIN = 2.5V
VIN = 2.7V
VIN = 5.5V
LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 5.0V
VIN = 3.6V
VIN = 2.5V
VIN = 2.7V
VIN = 5.5V
LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 5.5V
VIN = 3.3V
VIN = 3.6V
VIN = 2.5V
VIN = 2.7V
LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 5.0V
VIN = 3.6V
VIN = 2.5V
VIN = 2.7V
VIN = 5.5V
LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 5.5V
VIN = 5.0V
VIN = 3.6V
VIN = 2.5V
VIN = 2.7V
LM3668
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Typical Characteristics (continued)
Typical Application Circuit (see Figure 46): VIN = 3.6 V, L = 2.2 µH, CIN = 10 µF, COUT = 22 µF(4), TA= 25°C , unless otherwise
stated.
Figure 7. Efficiency at VOUT = 2.8 V (Auto Mode) Figure 8. Efficiency at VOUT = 3 V (Forced PWM Mode)
Figure 9. Efficiency at VOUT = 3 V (Auto Mode) Figure 10. Efficiency at VOUT = 3.3 V (Forced PWM Mode)
Figure 11. Efficiency at VOUT = 3.3 V (Auto Mode) Figure 12. Efficiency at VOUT = 3.4 V (Forced PWM Mode)
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LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 5.5V
VIN =5.0V VIN = 3.6V
VIN = 2.7V
LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 5.5V
VIN = 5.0V
VIN = 3.6V
VIN = 2.7V
LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 5.5V
VIN = 5.0V
VIN = 3.6V
VIN = 2.7V
LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 5.5V
VIN = 5.0V
VIN = 3.6V
VIN = 2.5V
VIN = 2.7V
LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 5.5V
VIN = 3.6V
VIN = 2.7V
VIN = 5V
LM3668
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Typical Characteristics (continued)
Typical Application Circuit (see Figure 46): VIN = 3.6 V, L = 2.2 µH, CIN = 10 µF, COUT = 22 µF(4), TA= 25°C , unless otherwise
stated.
Figure 13. Efficiency at VOUT = 3.4 V (Auto Mode) Figure 14. Efficiency at VOUT = 4.5 V (Forced PWM Mode)
Figure 15. Efficiency at VOUT = 4.5 V (Auto Mode) Figure 16. Efficiency at VOUT = 5 V (Forced PWM Mode)
Figure 18. Line Transient in Buck Mode (VOUT = 3.4 V, Load
Figure 17. Efficiency at VOUT = 5 V (Auto Mode) = 500 mA)
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l TEXAS INSTRUMENTS c 2 ‘. c ‘ L 7 m ‘ 5 5V/DIV 5WD“, SW2 5’me . ”W W“ swmv SM 200 mV/D‘V Voumc zoo mV/mv V \ Voumc 500 mA/DIV LOAD 50° "WDIV ——- .m— LOAD 100 us/DIV 100 us/DIV
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SW2
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VOUT_AC
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200
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5V/DIV
5V/DIV
200 mV/DIV
500 mA/DIV
SW2
SW1
VOUT_AC
LOAD
4.0V
3.4V VIN
VOUT_AC
SW2
SW1
100 mV/DIV
5V/DIV
5V/DIV
100 Ps/DIV
3.4V
2.8V
100 mV/DIV
5V/DIV
5V/DIV
100 Ps/DIV
VIN
VOUT_AC
SW2
SW1
LM3668
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Typical Characteristics (continued)
Typical Application Circuit (see Figure 46): VIN = 3.6 V, L = 2.2 µH, CIN = 10 µF, COUT = 22 µF(4), TA= 25°C , unless otherwise
stated.
Figure 19. Line Transient in Boost Mode (VOUT = 3.4 V, Load Figure 20. Line Transient in Buck-Boost Mode (VOUT = 3.4 V,
= 500 mA) Load = 500 mA)
Figure 22. Load Transient in Boost Operation (Forced PWM
Figure 21. Load Transient in Buck Mode (Forced PWM Mode) VIN = 2.7 V, VOUT = 3.4 V, Load = 0 to 500 mA
Mode) VIN = 4.2 V, VOUT = 3.4 V, Load = 0 to 500 mA
Figure 23. Load Transient in Buck-Boost Operation (Forced Figure 24. Load Transient in Buck Mode (Forced PWM
PWM Mode) VIN = 3.44 V, VOUT = 3.4 V, Load = 0 to 500 mA Mode) VIN = 4.2 V, VOUT = 3 V, Load = 0 to 500 mA
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l TEXAS INSTRUMENTS ounAc 3 5VID|V ’ SW1 EVIDIV SW1 v v 200 mV/D‘V V A WU“: 200 mV/D‘V out“: 500 mA/DIV W LOAD 500 mA/DIV LOAD mo us/DIV mo us/DIV zoo mA/DIV r‘I—h‘fi zoo mA/DIV 20 mA/mv .u—u‘ : , LOAD 20 mA/D‘V LOAD mu mV/DIV W DULAC mu mV/DIV M . ”PM; 40 ,‘s 40 “S 5V/DIV swz 200 "HA/DIV J.._____ 20 mA/mv _— LOAD 5VIDIV sw1 ’L VOUTJXC ”UT-AC 200 mV/D‘V T7 mu mV/DIV \hh rbr‘ mmm H 500 mA/DIV LOAD 40 “5 mo us/DIV
LM3668
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Typical Characteristics (continued)
Typical Application Circuit (see Figure 46): VIN = 3.6 V, L = 2.2 µH, CIN = 10 µF, COUT = 22 µF(4), TA= 25°C , unless otherwise
stated.
Figure 25. Load Transient in Boost Mode (Forced PWM Figure 26. Load Transient in Buck-Boost Mode (Forced
Mode) VIN = 2.7 V, VOUT = 3 V, Load = 0 to 500 mA PWM Mode) VIN = 3.05 V, VOUT = 3 V, Load = 0 to 500 mA
Figure 27. Load Transient in Buck Mode (Auto Mode) VIN = Figure 28. Load Transient in Boost Mode (Auto Mode) VIN =
4.2 V, VOUT = 3.3 V, Load = 50 to 150 mA 2.7 V, VOUT = 3.3 V, Load = 50 to 150 mA
Figure 29. Load Transient in Buck-Boost Mode (Auto Mode) Figure 30. Load Transient in Buck Mode (Forced PWM
VIN = 3.6 V, VOUT = 3.3 V, Load = 50-150 mA Mode) VIN = 5.5 V, VOUT = 5 V, Load = 0 to 500 mA
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l TEXAS INSTRUMENTS SV/D‘V w SW2 Swmv 5W2 SW1 5VIDIV 5mm SW1 200 mV/DN VOUTJC 50 mV/D‘V VOUT_AC 500 mA/DIV _._____.__‘ 500 mA/DIV W W LOAD LOAD mo us/DIV zoo us/DIV 5VIDN ‘ 5W2 5VIDIV SW‘ 50 mV/mv VOULAC c 500 mA/DIV LOAD m 500 us/DIV c c m
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mv/DIV
500
mA/DIV
SW2
SW1
VOUT_AC
LOAD
200 ns/DIV
5V/DIV
5V/DIV
50
mv/DIV
500
mA/DIV
SW2
SW1
VOUT_AC
LOAD
5 Ps/DIV
2V/DIV
2V/DIV
50
mv/DIV
500
mA/DIV
SW2
SW1
VOUT_AC
LOAD
LM3668
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SNVS449O –JUNE 2007–REVISED APRIL 2015
Typical Characteristics (continued)
Typical Application Circuit (see Figure 46): VIN = 3.6 V, L = 2.2 µH, CIN = 10 µF, COUT = 22 µF(4), TA= 25°C , unless otherwise
stated.
Figure 31. Load Transient in Boost Mode (Forced PWM Figure 32. Typical Switching Waveform in Boost Mode
Mode) VIN = 3.5 V, VOUT = 5 V, Load = 0 to 500 mA (PWM Mode) VIN = 2.7 V, VOUT = 3 V, Load = 500 mA
Figure 33. Typical Switching Waveform in Buck Mode (PWM Figure 34. Typical Switching Waveformt in Boost Mode
Mode) VIN = 3.6 V, VOUT = 3 V, Load = 500 mA (PFM Mode) VIN = 2.7 V, VOUT = 3 V, Load = 50 mA
Figure 36. Typical Switching Waveform in Boost Mode
Figure 35. Typical Switching Waveform in Buck Mode (PFM (PWM Mode) VIN = 3 V, VOUT = 3.4 V, Load = 500 mA
Mode) VIN = 3.6 V, VOUT = 3 V, Load = 50mA
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l TEXAS INSTRUMENTS 5VID|V WSW SVIDW » VSW1 20 mV/DIV WVOVUE 500 mA/DIV 200 nSIDIV
500 Ps/DIV
5V/DIV
5V/DIV
50
mv/DIV
500
mA/DIV
SW2
SW1
VOUT_AC
LOAD
500 Ps/DIV
2V/DIV
2V/DIV
50
mv/DIV
500
mA/DIV
SW2
SW1
VOUT_AC
LOAD
LM3668
SNVS449O –JUNE 2007–REVISED APRIL 2015
www.ti.com
Typical Characteristics (continued)
Typical Application Circuit (see Figure 46): VIN = 3.6 V, L = 2.2 µH, CIN = 10 µF, COUT = 22 µF(4), TA= 25°C , unless otherwise
stated.
Figure 37. Typical Switching Waveform in Buck Mode (PWM Figure 38. Typical Switching Waveform in Boost Mode (PFM
Mode) VIN = 4 V, VOUT = 3.4 V, Load = 500 mA Mode) VIN = 3 V, VOUT = 3.4 V, Load = 50 mA
Figure 39. Typical Switching Waveform in Buck Mode (PFM Mode) VIN = 4 V, VOUT = 3.4 V, Load = 50 mA
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SW2SW1
P2
N2
VOUT
P1
N1
VIN
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8 Detailed Description
8.1 Overview
The LM3668, a high-efficiency buck or boost DC-DC converter, delivers a constant voltage from either a single
Li-Ion or three cell NIMH/NiCd battery to portable devices such as mobile phones and PDAs. Using a voltage
mode architecture with synchronous rectification, the device has the ability to deliver up to 1 A, depending on the
input voltage, output voltage, ambient temperature and the chosen inductor.
In addition, the device incorporates a seamless transition from buck-to-boost or boost-to-buck mode. The internal
error amplifier continuously monitors the output to determine the transition from buck-to-boost or boost-to-buck
operation. Figure 40 shows the four switches network used for the buck and boost operation. Table 1
summarizes the state of the switches in different modes.
There are three modes of operation depending on the current required: Pulse Width Modulation (PWM), Pulse
Frequency Modulation (PFM), and shutdown. The device operates in PWM mode at load currents of
approximately 80 mA or higher to improve efficiency. Lighter load current causes the device to automatically
switch into PFM mode to reduce current consumption and extend battery life. Shutdown mode turns off the
device, offering the lowest current consumption.
Figure 40. Simplified Diagram of Switches
Table 1. State of Switches in Different Modes
MODE ALWAYS ON ALWAYS OFF SWITCHING
Buck SW P2 SW N2 SW P1 & N1
Boost SW P1 SW N1 SW N2 & P2
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P1 P2
N1
+
-
VIN
Load
SW1 SW2
PGND
Sw1 Sw2
P1 P2
Control Logic
Switch
buffer
Switch
buffer
PVIN
Buffer
Soft
Start
Ramp
Generator
FB
+
-VREF
2 MHz
Oscillator
PFM
Generator
SYNC/
MODE
EN
SGND
VOUT
PFM_hi
PFM_low
NC
VDD
Error
Amp
VSEL
PWM
Comparator
N1
N2
LM3668
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8.2 Functional Block Diagram
8.3 Feature Description
8.3.1 Buck Operation
When the input voltage is greater than the output voltage, the device operates in buck mode where switch P2 is
always ON and P1 and N1 control the output. Figure 41 shows the simplified circuit for buck mode operation.
Figure 41. Simplified Circuit for Buck Operation
8.3.2 Boost Operation
When the input voltage is smaller than the output voltage, the device enters boost mode operation where P1 is
always ON, while switches N2 and P2 control the output. Figure 42 shows the simplified circuit for boost mode
operation.
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P1 P2
N2
+
-
VIN
Load
SW1 SW2
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Feature Description (continued)
Figure 42. Simplified Circuit for Boost Operation
8.3.3 Internal Synchronous Rectification
While in PWM mode, the LM3668 uses an internal MOSFET as a synchronous rectifier to reduce rectifier forward
voltage drop and associated power loss. Synchronous rectification provides a significant improvement in
efficiency whenever the output voltage is relatively low compare to the voltage drop across an ordinary rectifier
diode.
8.3.4 Current Limit Protection
The LM3668 has current limit protection to prevent excessive stress on itself and external components during
overload conditions. The internal current limit comparator will disable the power device at a typical switch peak
current limit of 1.85 A (typ.).
8.3.5 Undervoltage Protection
The LM3668 has an UVP comparator to turn the power device off in case the input voltage or battery voltage is
too low . The typical UVP threshold is around 2 V.
8.3.6 Short Circuit Protection
When the output of the LM3668 is shorted to GND, the current limit is reduced to about half of the typical current
limit value until the short is removed.
8.3.7 Shutdown
When the EN pin is pulled low, P1 and P2 are off; N1 and N2 are turned on to pull SW1 and SW2 to ground.
8.3.8 Thermal Shutdown
The LM3668 has an internal thermal shutdown function to protect the die from excessive temperatures. The
thermal shutdown trip point is typically 150°C; normal operation resumes when the temperature drops below
125°C.
8.3.9 Start-Up
The LM3668 has a soft-start circuit that smooth the output voltage and ramp current during start-up. During start-
up the bandgap reference is slowly ramped up and switch current limit is reduced to half the typical value. Soft
start is activated only if EN goes from logic low to logic high after VIN reaches 2.5 V. The start-up time thereby
depends on the output capacitor and load current demanded at start-up. It is not recommended to start up the
device at full load while in soft-start.
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l TEXAS INSTRUMENTS
+
-
+
-
+
-VOS
Vramp
P1b_PWM
P2b_PWM
Vcenter
Vc
PWM
Generator
LM3668
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8.4 Device Functional Modes
8.4.1 PWM Operation
In PWM operation, the output voltage is regulated by switching at a constant frequency and then modulating the
energy per cycle to control power to the load. In Normal operation, the internal error amplifier provides an error
signal, Vc, from the feedback voltage and Vref. The error amplifier signal, Vc, is compared with a voltage,
Vcenter, and used to generate the PWM signals for both buck & boost modes. Signal Vcenter is a DC signal
which sets the transition point of the buck and boost modes. Below are three regions of operation:
• Region I: If Vc is less than Vcenter, Buck mode.
• Region II: If Vc and Vcenter are equal, both PMOS switches (P1, P2) are on and both NMOS switches (N1,
N2) are off. The power passes directly from input to output via P1 & P2
• Region III: If Vc is greater than Vcenter, Boost mode.
The Buck-Boost operation is avoided, to improve the efficiency across VIN and load range.
Figure 43. PWM Generator Block Diagram
8.4.2 PFM Operation
At very light loads, the converter enters PFM mode and operates with reduced switching frequency and supply
current to maintain high efficiency. The part automatically transitions into PFM mode when either of two following
conditions occur for a duration of 128 or more clock cycles:
A. The inductor current reaches zero.
B. The peak inductor current drops below the IMODE level, (Typically IMODE < 45 mA + VIN/80 Ω).
In PFM operation, the compensation circuit in the error amplifier is turned off. The error amplifier works as a
hysteretic comparator. The PFM comparator senses the output voltage via the feedback pin and controls the
switching of the output FETs such that the output voltage ramps between ~0.8% and ~1.6% of the nominal PWM
output voltage (Figure 44). If the output voltage is below the ‘high’ PFM comparator threshold, the P1 & P2 (Buck
mode) or N2 & P1 (Boost mode) power switches are turned on. It remains on until the output voltage reaches the
‘high’ PFM threshold or the peak current exceeds the IPFM level set for PFM mode. The typical peak current in
PFM mode is: IPFM = 220 mA
Once the P1 (Buck mode) or N2 (Boost mode) power switch is turned off, the N1 & P2 (Buck mode) or P1 & P2
(Boost mode) power switches are turned on until the inductor current ramps to zero. When the zero inductor
current condition is detected, the N1(Buck mode) or P2 (Boost mode) power switches are turned off. If the output
voltage is below the ‘high’ PFM comparator threshold, the P1 & P2 (Buck mode) or N2 & P1 (Boost mode)
switches are again turned on and the cycle is repeated until the output reaches the desired level. Once the
output reaches the ‘high’ PFM threshold, the N1 & P2 (Buck mode) or P1 & P2 (Boost mode) switches are turned
on briefly to ramp the inductor current to zero, then both output switches are turned off and the part enters an
extremely low power mode. Quiescent supply current during this ‘sleep’ mode is 45 µA (typ), which allows the
part to achieve high efficiency under extremely light load conditions.
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l TEXAS INSTRUMENTS kage
VOUT (Target)
Buck
or
Boost
Boost Buck
Region I Region II Region III
VIN
dV1 - VOUT (TARGET) VOUT (TARGET) + dV2
High PFM Threshold
~1.016*Vout
Low1 PFM Threshold
~1.008*Vout
PFM Mode at Light Load
PWM Mode at
Moderate to Heavy
Loads
Inductor
Current
Ramp up
Inductor
current ramp
down
until
I inductor=0
High PFM
Voltage
Threshold
reached,
go into
Low power
mode, both
switches are off
Low PFM
Threshold,
turn on
Current load
increases,
draws Vout
towards
Low2 PFM
Threshold
Low2 PFM Threshold,
switch back to PWMmode
Load current
increases
Low2 PFM Threshold
Vout
Z-
Ax
is
Z-Axis
LM3668
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SNVS449O –JUNE 2007–REVISED APRIL 2015
Device Functional Modes (continued)
Figure 44. PFM to PWM Mode Transition
In addition to the auto mode transition, the LM3668 operates in PFM Buck or PFM Boost based on the following
conditions. There is a small delta (approximately 500 mV) known as dv1 (approximately 200 mV) and dv2
(approximately 300 mV) when VOUT_TARGET is very close to VIN where the device can be in either Buck or Boost
mode. For example, when VOUT_TARGET = 3.3 V and VIN is between 3.1 V and 3.6 V, the LM3668 can be in either
mode depending on the VIN vs VOUT_TARGET.
• Region I: If VIN < VOUT_TARGET – dv1, the regulator operates in Boost mode.
• Region II: If VOUT_TARGET – dv1 < VIN < VOUT_TARGET+ dv2 ,the regulator operates in either Buck or Boost
mode.
• Region III: If VIN > VOUT_TARGET + dv2, the regulator operates in Buck mode.
Figure 45. VOUT vs VIN Transition
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Device Functional Modes (continued)
In the buck PFM operation, P2 is always turned on and N2 is always turned off , P1 and N1 power switches are
switching. P1 and N1 are turned off to enter " sleep mode" when the output voltage reaches the "high"
comparator threshold. In boost PFM operation, P2 and N2 are switching. P1 is turned on and N1 is turned off
when the output voltage is below the "high" threshold. Unlike in buck mode, all four power switches are turned off
to enter "sleep" mode when the output voltage reaches the "high" threshold in boost mode. In addition, the
internal current sensing of the IPFM is used to determine the precise condition to switch over to buck or boost
mode via the PFM generator.
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l TEXAS INSTRUMENTS VIN = MN , 5,5v 'Hm m
FB
2.8V/3.3V
SW1
SW2
EN
LM3668
PVIN
PGND
SYNC/MODE
VSEL L = 2.8V
H = 3.3V
VIN = 2.5V - 5.5V
SGND
VOUT
VDD
C2
22 PF
C1
10 PF
2.2 PH
NC
LM3668
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SNVS449O –JUNE 2007–REVISED APRIL 2015
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
9.1.1 MODE/SYNC Pin
If the MODE/SYNC pin is set high, the device is set to operate at PWM mode only. If MODE/SYNC pin is set low,
the device is set to automatically transition from PFM to PWM or PWM to PFM depending on the load current.
Do not leave this pin floating. The MODE/SYNC pin can also be driven by an external clock to set the desired
switching frequency between 1.6 MHz to 2.7 MHz.
9.1.2 VSEL Pin
The LM3668 has built in logic for conveniently setting the output voltage, for example if VVSEL high, the output is
set to 3.3 V; with VVSEL low the output is set to 2.8 V. It is not recommended to use this function for dynamically
switching between 2.8 V and 3.3 V or switching at maximum load.
9.2 Typical Application
Figure 46. LM3668 Typical Application Circuit
9.2.1 Design Requirements
9.2.1.1 Maximum Current
The LM3668 is designed to operate up to 1 A. For input voltages at 2.5 V, the maximum operating current is 600
mA and 800 mA for 2.7 V input voltage. In any mode it is recommended to avoid starting up the device at
minimum input voltage and maximum load. Special attention must be taken to avoid operating near thermal
shutdown when operating in boost mode at maximum load (1 A). A simple calculation can be used to determine
the power dissipation at the operating condition; PD-MAX = (TJ-MAX-OP – TA-MAX)/RθJA. The LM3668 has thermal
resistance RθJA = 47.3°C/W (see Thermal Information and maximum operating ambient of 85°C. As a result, the
maximum power dissipation using the above formula is around 845 mW.
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ISAT > + IRIPPLE
ISAT > IOUTMAX + IRIPPLE For Buck
(VOUT - VIN)
(VOUT)
Where D = & '¶= (1-D)
For Boost
IOUTMAX
'¶
VOUT
Where IRIPPLE = (VIN - VOUT)
(2 x L x f) xVIN
(2 x L x f) VOUT
xVIN
(VOUT - VIN)
Where IRIPPLE =
LM3668
SNVS449O –JUNE 2007–REVISED APRIL 2015
www.ti.com
Typical Application (continued)
9.2.2 Detailed Design Procedure
9.2.2.1 Inductor Selection
There are two main considerations when choosing an inductor: the inductor should not saturate, and the inductor
current ripple should be small enough to achieve the desired output voltage ripple. Different saturation current
rating specifications are followed by different manufacturers so attention must be given to details. Saturation
current ratings are typically specified at 25°C. However, ratings at the maximum ambient temperature of
application should be requested from the manufacturer. Shielded inductors radiate less noise and should be
preferred.
In the case of the LM3668, there are two modes (Buck & Boost) of operation that must be consider when
selecting an inductor with appropriate saturation current. The saturation current should be greater than the sum
of the maximum load current and the worst case average to peak inductor current. Equation 1 shows the buck
mode operation for worst case conditions and the second equation for boost condition.
where
• IRIPPLE: Peak inductor current
• IOUTMAX: Maximum load current
• VIN: Maximum input voltage in application
• L : Min inductor value including worst case tolerances (30% drop can be considered)
• f : Minimum switching frequency
• VOUT: Output voltage
• D: Duty Cycle for CCM Operation
• VOUT : Output voltage
• VIN: Input voltage
Example using above equations:
• VIN = 2.8 V to 4 V
• VOUT = 3.3 V
• IOUT = 500 mA
• L = 2.2 µH
• F = 2 MHz
• Buck: ISAT = 567 mA
• Boost: ISAT = 638 mA (1)
As a result, the inductor should be selected according to the highest of the two ISAT values.
A more conservative and recommended approach is to choose an inductor that has a saturation current rating
greater than the maximum current limit of 2.05 A.
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Typical Application (continued)
A 2.2-µH inductor with a saturation current rating of at least 2.05 A is recommended for most applications. The
inductor’s resistance should be less than 100 mΩfor good efficiency. For low-cost applications, an unshielded
bobbin inductor could be considered. For noise critical applications, a toroidal or shielded-bobbin inductor should
be used. A good practice is to lay out the board with overlapping footprints of both types for design flexibility.
This allows substitution of a low-noise shielded inductor, in the event that noise from low-cost bobbin model is
unacceptable.
Table 2. Suggest Inductors and Suppliers
MODEL VENDOR DIMENSIONS D.C.R (mΩ)(MAX) ISAT (A)
LxWxH (mm)
LPS4012-222L Coilcraft 4 x 4 x 1.2 100 2.1
LPS4018-222L Coilcraft 4 x 4 x 1.8 70 2.5
1098AS-2R0M (2 µH) TOKO 3 x 2.8 x 1.2 67 1.8 (lower current
applications)
9.2.2.2 Input Capacitor Selection
A ceramic input capacitor of at least 10 µF, 6.3 V is sufficient for most applications. Place the input capacitor as
close as possible to the PVIN pin of the device. A larger value may be used for improved input voltage filtering.
Use X7R or X5R types; do not use Y5V . DC bias characteristics of ceramic capacitors must be considered when
selecting case sizes like 0805 or 0603. The input filter capacitor supplies current to the PFET switch of the
LM3668 in the first half of each cycle and reduces voltage ripple imposed on the input power source. A ceramic
capacitor’s low ESR provides the best noise filtering of the input voltage spikes due to this rapidly changing
current. For applications where input voltage is 4 V or higher, it is best to use a higher voltage rating capacitor to
eliminate the DC bias affect over capacitance.
9.2.2.3 Output Capacitor Selection
A ceramic output capacitor of 22 µF, 6.3 V (use 10 V or higher rating for 4.5 V-5 V output option) is sufficient for
most applications. Multilayer ceramic capacitors such as X7R or X5R with low ESR is a good choice for this as
well. These capacitors provide an ideal balance between small size, cost, reliability and performance. Do not use
Y5V ceramic capacitors as they have temperature limitation and poor dielectric performance over temperature
and poor voltage characteristic for a given value. In other words, ensure the minimum COUT value does not
exceed −40% of the above-suggested value over the entire range of operating temperature and bias conditions.
Extra attention is required if a smaller case size capacitor is used in the application. Smaller case size capacitors
typically have less capacitance for a given bias voltage as compared to a larger case size capacitor with the
same bias voltage. Please contact the capacitor manufacturer for detailed information regarding capacitance
verses case size. Table 3 lists several capacitor suppliers.
The output filter capacitor smooths out current flow from the inductor to the load, helps maintain a steady output
voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with
sufficient capacitance and sufficiently low ESR to perform these functions.
Note that the output voltage ripple is dependent on the inductor current ripple and the equivalent series
resistance of the output capacitor (RESR).
The RESR is frequency dependent (as well as temperature dependent); make sure the value used for calculations
is at the switching frequency of the part.
Table 3. Suggested Capacitors and Suppliers
CASE SIZE
MODEL TYPE VENDOR VOLTAGE RATING (V) INCH (mm)
10 µF FOR CIN (FOR 4.5/5 V OPTION, USE 10 V OR HIGHER RATING CAPACITOR)
GRM21BR60J106K Ceramic, X5R Murata 6.3 0805 (2012)
JMK212BJ106K Ceramic, X5R Taiyo-Yuden 6.3 0805 (2012)
C2012X5R0J106K Ceramic, X5R TDK 6.3 0805 (2012)
LMK212 BJ106MG (±20%) Ceramic, X5R Taiyon-Yuden 10 0806(2012)
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l TEXAS INSTRUMENTS W EN W EN 2V/D‘V ._... 2V/D‘V .__.. Vow Vow 2V/D‘V 2V/D‘V ‘L 500 mA/DN \L 500 mA/DN ...._ zoous zoous Vw w HHH‘
LOAD (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
00 1 10 100 1000
VIN = 3.3V
VIN = 3.6V
VIN = 2.5V
VIN = 2.7V
VIN = 5.5V
LM3668
SNVS449O –JUNE 2007–REVISED APRIL 2015
www.ti.com
Table 3. Suggested Capacitors and Suppliers (continued)
CASE SIZE
MODEL TYPE VENDOR VOLTAGE RATING (V) INCH (mm)
LMK212 BJ106KG (±10%) Ceramic, X5R Taiyon-Yuden 10 0805(2012)
22 µF FOR COUT (FOR 4.5/5 V OPTION, USE 10 V OR HIGHER RATING CAPACITOR)
JMK212BJ226MG Ceramic, X5R Taiyo-Yuden 6.3 0805 (2012)
LMK212BJ226MG Ceramic, X5R Taiyo-Yuden 10 0805 (2012)
9.2.3 Application Curves
Figure 47. Start-Up in PWM Mode (VOUT = 3.4 V, Load = 1 Figure 48. Start-up in PWM Mode (VOUT = 3.4 V, Load = 500
mA) mA)
Figure 49. Efficiency at 3.3 V Output
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INSTRUMWTS
PVin
SW2
GND SGND
SW1
VOUT
L1
VIN GND
C1
Bottom layer
SGND
EN
MODE/SYNC
VSEL
GND
C2
LM3668
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10 Power Supply Recommendations
The power supply for the applications using the LM3668 device should be big enough considering output power
and efficiency at given input voltage condition. Minimum current requirement condition is (VOUT × IOUT)/(VIN ×
efficiency) and approximately 20 to 30% higher than this value is recommended.
11 Layout
11.1 Layout Guidelines
As for any high frequency switcher, it is important to place the external components as close as possible to the
IC to maximize device performance. Below are some layout recommendations:
1. Place input filter and output filter capacitors close to the IC to minimize copper trace resistance which will
directly effect the overall ripple voltage.
2. Route noise sensitive trace away from noisy power components. Separate power GND (Noisy GND) and
Signal GND (quiet GND) and star GND them at a single point on the PCB preferably close to device GND.
3. Connect the ground pins and filter capacitors together via a ground plane to prevent switching current
circulating through the ground plane. Additional layout consideration regarding the WSON package can be
found in AN-1187 Leadless Leadframe Package (LLP),SNOA401.
11.2 Layout Example
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.1.2 Documentation Support
12.1.2.1 Related Documentation
TI Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401).
12.2 Trademarks
All trademarks are the property of their respective owners.
12.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.4 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM3668SD-2833/NOPB NRND WSON DQB 12 1000 RoHS & Green SN Level-1-260C-UNLIM S017B
LM3668SD-3034/NOPB NRND WSON DQB 12 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 S018B
LM3668SD-4550/NOPB NRND WSON DQB 12 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 S019B
LM3668SDX-2833/NOPB NRND WSON DQB 12 4500 RoHS & Green SN Level-1-260C-UNLIM S017B
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
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flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
l TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS 7 “KO '«m» Reel Diameter AD Dimension deswgned to accommodate the componem wwdlh ED Dimension desxgned to accommodate the componenl \engm K0 Dimenslun deswgned to accommodate the componem thickness , w OveraH wwdm loe earner cape i p1 Pitch between successwe cavuy cemers f T Reel Width (W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE O O O D O O D D Sprockemules ,,,,,,,,,,, ‘ User Direcllon 0' Feed Pockel Quadrams
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM3668SD-2833/NOPB WSON DQB 12 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1
LM3668SD-3034/NOPB WSON DQB 12 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1
LM3668SD-4550/NOPB WSON DQB 12 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1
LM3668SDX-2833/NOPB WSON DQB 12 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Oct-2021
Pack Materials-Page 1
l TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM3668SD-2833/NOPB WSON DQB 12 1000 208.0 191.0 35.0
LM3668SD-3034/NOPB WSON DQB 12 1000 208.0 191.0 35.0
LM3668SD-4550/NOPB WSON DQB 12 1000 208.0 191.0 35.0
LM3668SDX-2833/NOPB WSON DQB 12 4500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Oct-2021
Pack Materials-Page 2
771/ Mara: 77777 ‘ J ""7i 7777 L e ‘ DIMENSIONS ARE IN MILLIMEYERS 1 y, n M N ‘1 ‘ (m w W M , ‘ ‘ JfiEfiHEE , 2x a z, ‘ ‘ ‘ ‘ ‘ 4 L g M g flflflflflflfl RECOMMENDED LAND PATTERN F3 mu 1‘ H '1? ‘L‘f \ M'HKUUUMUU D \J ‘ f, 1 ‘JI’YJ 25 , 77 777777] 777777 7 { § 5 1 * mflflmflm ' TEXAS INSTRUMENTS
MECHANICAL DATA
DQB0012A
www.ti.com
SDF12A (Rev B)
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