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INSTRUMENTS
TPS62740, TPS62742
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SLVSB02B –NOVEMBER 2013–REVISED JULY 2014
Feature Description (continued)
The DCS-Control™ topology supports PWM (Pulse Width Modulation) mode for medium and high load
conditions and a Power Save Mode at light loads. During PWM mode, it operates in continuous conduction. The
switching frequency is up to 2MHz with a controlled frequency variation depending on the input voltage. If the
load current decreases, the converter seamlessly enters Power Save Mode to maintain high efficiency down to
very light loads. In Power Save Mode the switching frequency varies nearly linearly with the load current. Since
DCS-Control™ supports both operation modes within one single building block, the transition from PWM to
Power Save Mode is seamless without effects on the output voltage. The TPS6274x offers both excellent DC
voltage and superior load transient regulation, combined with very low output voltage ripple, minimizing
interference with RF circuits. At high load currents, the converter operates in quasi fixed frequency PWM mode
operation and at light loads, in PFM (Pulse Frequency Modulation) mode to maintain highest efficiency over the
full load current range. In PFM Mode, the device generates a single switching pulse to ramp up the inductor
current and recharge the output capacitor, followed by a sleep period where most of the internal circuits are
shutdown to achieve a lowest quiescent current. During this time, the load current is supported by the output
capacitor. The duration of the sleep period depends on the load current and the inductor peak current.
During the sleep periods, the current consumption of TPS6274x is reduced to 360nA. This low quiescent current
consumption is achieved by an ultra low power voltage reference, an integrated high impedance (typ. 50MΩ)
feedback divider network and an optimized DCS-Control™ block.
9.3.2 CTRL / Output Load
With the CTRL pin set to high, the LOAD pin is connected to the VOUT pin via an load switch and can power up
an additional, temporarily used sub-system. The load switch is slew rate controlled to support soft switching and
not to impact the regulated output VOUT. If CTRL pin is pulled to GND, the LOAD pin is disconnected from the
VOUT pin and internally connected to GND by an internal discharge switch. When CTRL pin is set to high, the
Quiescent current of the DCS control block is increased to typ. 12.5µA. This ensures excellent transient response
on both outputs VOUT and LOAD in case of a sudden load step at the LOAD output. The CTRL pin can be
controlled by a micro controller.
9.3.3 Enable / Shutdown
The DC/DC converter is activated when the EN pin is set to high. For proper operation, the pin must be
terminated and must not be left floating. With the EN pin set to low, the device enters shutdown mode with less
than typ. 70nA current consumption.
9.3.4 Power Good Output (PG)
The Power Good comparator features an open drain output. The PG comparator is active with EN pin set to high
and VIN is above the threshold VTH_UVLO+. It is driven to high impedance once VOUT trips the threshold VTH_PG+ for
rising VOUT. The output is pulled to low level once VOUT falls below the PG hysteresis, VPG_hys. The output is also
pulled to low level in case the input voltage VIN falls below the undervoltage lockout threshold VTH_UVLO- or the
device is disabled with EN = low. The power good output (PG) can be used as an indicator for the system to
signal that the converter has started up and the output voltage is in regulation.
9.3.5 Output Voltage Selection (VSEL1 – 4)
The TPS6274x doesn't require an external resistor divider network to program the output voltage. The device
integrates a high impedance (typ. 50MΩ) feedback resistor divider network which is programmed by the pins
VSEL 1-4. TPS6274x supports an output voltage range of 1.8V to 3.3V in 100mV steps. The output voltage can
be changed during operation and supports a simple dynamic output voltage scaling, shown in Figure 47. The
output voltage is programmed according to table Table 1.
9.3.6 Softstart
When the device is enabled, the internal reference is powered up and after the startup delay time tStartup_delay has
expired, the device enters softstart, starts switching and ramps up the output voltage. During softstart the device
operates with a reduced current limit, ILIM_softstart, of typ. 1/4 of the nominal current limit. This reduced current limit
is active during the softstart time tSoftstart. The current limit is increased to its nominal value, ILIMF, once the
softstart time has expired.
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