74HC73 Datasheet by Nexperia USA Inc.

View All Related Products | Download PDF Datasheet
nexpefla
1. General description
The 74HC73 is a dual negative edge triggered JK flip-flop with individual J, K, clock (nCP)
and reset (nR) inputs and complementary nQ and nQ outputs. The J and K inputs must be
stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation.
(nR) is asynchronous, when LOW it overrides the clock and data inputs, forcing the nQ
output LOW and the nQ output HIGH. Schmitt-trigger action in the clock input makes the
circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
VCC.
2. Features and benefits
Low-power dissipation
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 Cto+80C and from 40 Cto+125C
3. Ordering information
74HC73
Dual JK flip-flop with reset; negative-edge trigger
Rev. 5 — 2 December 2015 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC73D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
74HC73DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width
5.3 mm SOT337-1
74HC73PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body
width 4.4 mm SOT402-1
m u 10 12 1 1(7) 49 a 1K 16 13 of, 721R j’ 7 24 20 9 740 to 2K 7 of, ammym 1A m 1012 40 3 M 1013 W135b979 mvasngsn amp.“ av mu m WM; vrs-Mfl
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 2 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
4. Functional diagram
Fig 1. Functional diagram
DDE
44 -
4
5
4 
-
&3
.
5
&3
))
.
44 -
4
5
4 
-
&3
.
5
&3
))
.
Fig 2. Logic symbol Fig 3. IEC logic symbol
DDE
44
4 
-
-
4
5
4 
4 
-
&3
&3
.
.
5 5


&3
))
.
DDE


-
.
5

&
-
.

5
&
7 7 3333333 TEEETTE gamma mu Mmmmm
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 3 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 4. Logic diagram (one flip-flop)
DDE
&
&
.
-
5
&3 &
&
&
&
&
&
&
&
4
4
Fig 5. Pin configuration SO14, SSOP14 and TSSOP14
+&
&3 -
5 4
. 4
9&& *1'
&3 .
5 4
- 4
DDE
 





Table 2. Pin description
Symbol Pin Description
1CP, 2CP 1, 5 clock input (HIGH-to-LOW edge-triggered); also referred to as nCP
1R, 2R 2, 6 asynchronous reset input (active LOW); also referred to as nR
1K, 2K 3, 10 synchronous K input; also referred to as nK
VCC 4 positive supply voltage
GND 11 ground (0 V)
1Q, 2Q 12, 9 true output; also referred to as nQ
1Q, 2Q 13, 8 complement output; also referred to as nQ
1J, 2J 14, 7 synchronous J input; also referred to as nJ
la, mum av 1m7 "mum“...
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 4 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
6. Functional description
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW clock transition;
L = LOW voltage level;
I = LOW voltage level one set-up time prior to the HIGH-to-LOW clock transition;
q = state of referenced output one set-up time prior to the HIGH-to-LOW clock transition;
X = don’t care;
= HIGH-to-LOW clock transition.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 8 mW/K above 70 C.
[3] Ptot derates linearly with 5.5 mW/K above 60 C.
Table 3. Function table[1]
Input Output Operating mode
nR nCP nJ nK nQ nQ
L X X X L H asynchronous reset
Hhhqq toggle
Hl h L H load 0 (reset)
Hh l H L load 1 (set)
Hllqq
hold (no change)
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V or VI>V
CC + 0.5 V [1] -20 mA
IOK output clamping current VO<0.5 V or VO>V
CC +0.5V [1] -20 mA
IOoutput current VO = 0.5 V to VCC +0.5V - 25 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125 C
SO14 package [2] -500mW
(T)SSOP14 package [3] -500mW
nmm av 1m7 Aluminum:
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 5 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 2.0 5.0 6.0 V
VIinput voltage 0 - VCC V
VOoutput voltage 0 - VCC V
Tamb ambient temperature 40 - +125 C
t/V input transition rise and fall rate VCC = 2.0 V - - 625 ns/V
VCC = 4.5 V - 1.67 139 ns/V
VCC = 6.0 V - - 83 ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
VIH HIGH-level
input voltage VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V
VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V
VIL LOW-level
input voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V
VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V
VOH HIGH-level
output voltage VI=V
IH or VIL
IO=20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO=20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO=4mA; V
CC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V
IO=5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level
output voltage VI=V
IH or VIL
IO=20A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO=20A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO=20A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
IO=4mA; V
CC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V
IO=5.2mA; V
CC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI=V
CC or GND;
VCC =6.0V --0.1 - 1.0 - 1.0 A
ICC supply current VI=V
CC or GND; IO=0A;
VCC =6.0V - - 4.0 - 40.0 - 80.0 A
CIinput
capacitance -3.5- - - - - pF
Figure 8 see Figuve 6 see Figuve 6 Figuve 7 Figure 7 Figure 7 Figuve 6 mum av 1m7 "mum“...
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 6 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
tpd propagation
delay nCP to nQ; see Figure 6 [1]
VCC = 2.0 V - 52 160 - 200 - 240 ns
VCC = 4.5 V - 19 32 - 40 - 48 ns
VCC = 6.0 V - 15 27 - 34 - 41 ns
VCC =5.0V; C
L=15pF - 16 - - - - - ns
nCP to nQ; see Figure 6
VCC = 2.0 V - 52 160 - 200 - 240 ns
VCC = 4.5 V - 19 32 - 40 - 48 ns
VCC = 6.0 V - 15 27 34 - 41 ns
VCC =5.0V; C
L=15pF - 16 - - ns
nR to nQ, nQ; see Figure 7
VCC = 2.0 V - 50 145 - 180 - 220 ns
VCC = 4.5 V - 18 29 - 36 - 44 ns
VCC = 6.0 V - 14 25 31 - 38 ns
VCC =5.0V; C
L=15pF - 15 - - - - - ns
tttransition time nQ, nQ; see Figure 6 [2]
VCC = 2.0 V - 19 75 - 95 - 110 ns
VCC = 4.5 V - 7 15 - 19 - 22 ns
VCC = 6.0 V - 6 13 16 - 19 ns
tWpulse width nCP input, HIGH or LOW;
see Figure 6
VCC = 2.0 V 80 22 - 100 120 - ns
VCC = 4.5 V 16 8 - 20 - 24 - ns
VCC = 6.0 V 14 6 - 17 - 20 ns
nR input, HIGH or LOW;
see Figure 7
VCC = 2.0 V 80 22 - 100 120 - ns
VCC = 4.5 V 16 8 - 20 - 24 - ns
VCC = 6.0 V 14 6 - 17 - 20 ns
trec recovery time nR to nCP; see Figure 7
VCC = 2.0 V 80 22 - 100 120 - ns
VCC = 4.5 V 16 8 - 20 - 24 - ns
VCC = 6.0 V 14 6 - 17 - 20 ns
tsu set-up time nJ, nK to nCP; see Figure 6
VCC = 2.0 V 80 22 - 100 120 - ns
VCC = 4.5 V 16 8 - 20 - 24 - ns
VCC = 6.0 V 14 6 - 17 - 20 ns
Figure 8 mum av 1m7 "mum“...
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 7 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
[1] tpd is the same as tPHL, tPLH.
[2] tt is the same as tTHL, tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2 fo) = sum of outputs.
thhold time nJ, nK to nCP; see Figure 6
VCC = 2.0 V 3 8- 3 3 - ns
VCC = 4.5 V 3 3- 3 - 3 - ns
VCC = 6.0 V 3 2- 3 - 3 ns
fmax maximum
frequency nCP input; see Figure 6
VCC = 2.0 V 6.0 23 - 4.8 4.0 - MHz
VCC = 4.5 V 30 70 - 24 - 20 - MHz
VCC = 6.0 V 35 83 - 28 - 24 - MHz
VCC =5.0V; C
L=15pF - 77 - - - MHz
CPD power
dissipation
capacitance
per flip-flop;
VI=GNDtoV
CC
[3] -30- - - - - pF
Table 7. Dynamic characteristics …continued
GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
,_ % 90 \— omaanm ms sh —L 0L m_s show n amp.“ av mu m WM; vrs-Mfl
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 8 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
11. Waveforms
The shaded areas indicate when the input is permitted to change for predictable output performance.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. Waveforms showing the clock (nCP) to output (nQ, nQ) propagation delays, the clock pulse width, the J
and K to nCP set-up and hold times, the output transition times and the maximum clock frequency
WVX IPD[
WK
Q&3LQSXW
90
90
WK
WVX
W:
Q-Q.
LQSXW
DDE
Q4RXWSXW
9,
*1'


 


 
9,
92+
92/
92+
92/
*1'
Q4RXWSXW
W3+/ W3/+
90
W7/+
W7+/
W7/+
90
W7+/
W3/+ W3+/
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 7. Waveforms showing the reset (nR) input to output (nQ, nQ) propagation delays and the reset pulse width
and the nR to nCP removal time
DDE
Q4RXWSXW
9,
*1'
9,
*1'
92+
92/
92+
92/
W:
Q5LQSXW 90
Q4RXWSXW
Q&3LQSXW 90
WUHF
W3+/
W3/+
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 9 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
Table 8. Measurement points
Type Input Output
VIVMVM
74HC73 VCC 0.5VCC 0.5VCC
Test data is given in Table 9.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
Fig 8. Test circuit for measuring switching times
DDK
W:
W:
WU
WU
WI
90
9,
QHJDWLYH
SXOVH
*1'
9,
SRVLWLYH
SXOVH
*1'




9090
90
WI
9&&
'87
57
9,92
&/
*
Table 9. Test data
Type Input Load
VItr, tfCL
74HC73 VCC 6 ns 15 pF, 50 pF
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 10 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
12. Package outline
Fig 9. Package outline SOT108-1 (SO14)
E©W
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 11 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
Fig 10. Package outline SOT337-1 (SSOP14)
81,7 $
 $
 $
 E
S F '
 ( H +
( / /
S 4 =\ZY ș
5()(5(1&(6
287/,1(
9(56,21
(8523($1
352-(&7,21 ,668('$7(
,(& -('(& -(,7$
PP 


  






   










R
R
 
',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
627


Z 0
E
S
'
+
(
(
=
H
F
Y 0 $
;
$
\
 
 
ș
$
$

$

/
S
4
GHWDLO;
/
$

02
SLQLQGH[
  PP
VFDOH
6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627
$
PD[

,,,i,fi7, , 7 E©W
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 12 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
Fig 11. Package outline SOT402-1 (TSSOP14)
81,7 $
 $
 $
 E
S F ' ( 
H +
( / /
S 4 =\ZY ș
5()(5(1&(6
287/,1(
9(56,21
(8523($1
352-(&7,21 ,668('$7(
,(& -('(& -(,7$
PP 










  







R
R
 
',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV
1RWHV
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG


627 02 

Z 0
E
S
'
=
H

 
 
ș
$
$

$

/
S
4
GHWDLO;
/
$

+
(
(
F
Y 0 $
;
$
\
  PP
VFDOH
76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627
$
PD[

SLQLQGH[
Section 9 Section 8 “Recommended operating conditions" m mum av 1m7 "mum“...
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 13 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC73 v.5 20151202 Product data sheet - 74HC73 v.4
Modifications: Type number 74HC73N (SOT27-1) removed.
74HC73 v.4 20080319 Product data sheet - 74HC73 v.3
Modifications: The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Quick reference data incorporated into Section 9 and 10.
Section 8 “Recommended operating conditions tr, tf converted to t/V.
74HC73 v.3 20041112 Product data sheet - 74HC_HCT73_CNV v.2
74HC_HCT73_CNV v.2 December 1990 Product specification - -
mum av 1m7 "mum“...
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 14 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an information
source outside of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — Nexperia products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
http://wwwmexgeria salesaddresses®nexperia am"... av 1m7 umsmmu
© Nexperia B.V. 2017. All rights reserved
74HC73 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 2 December 2015 15 of 16
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia 74HC73
Dual JK flip-flop with reset; negative-edge trigger
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Functional description . . . . . . . . . . . . . . . . . . . 4
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Recommended operating conditions. . . . . . . . 4
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 13
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
15.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
16 Contact information. . . . . . . . . . . . . . . . . . . . . 15
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
02 December 2015

Products related to this Datasheet

IC FF JK TYPE DUAL 1BIT 14SO
IC FF JK TYPE DUAL 1BIT 14TSSOP
IC FF JK TYPE DUAL 1BIT 14SSOP
IC FF JK TYPE DUAL 1BIT 14SO
IC FF JK TYPE DUAL 1BIT 14SO
IC FF JK TYPE DUAL 1BIT 14SSOP
IC FF JK TYPE DUAL 1BIT 14TSSOP
IC FF JK TYPE DUAL 1BIT 14TSSOP
IC FF JK TYPE DUAL 1BIT 14SO
IC FF JK TYPE DUAL 1BIT 14TSSOP