AD5235 Eval Brd Guide Datasheet by Analog Devices Inc.

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ANALOG DEVICES
Evaluation Board User Guide
UG-258
One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluation Board for the AD5235 Digital Potentiometer
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 16
FEATURES
Full featured evaluation board for the AD5235
Several test circuits
Various ac/dc input signals
PC control via a separately purchased system demonstration
platform (SDP)
PC control software
26 extra bytes in EEMEM for user-defined information
Resistor tolerance error stored in EEMEM
PACKAGE CONTENTS
EVAL-AD5235SDZ evaluation board
CD that includes
Self-installing software that allows users to control the
board and exercise all functions of the device
Electronic version of the AD5235 data sheet
Electronic version of the UG-258 document
GENERAL DESCRIPTION
This user guide describes the evaluation board for evaluating the
AD5235—a dual-channel, 1024-position, nonvolatile memory
digital potentiometer. With versatile programmability, the AD5235
allows multiple modes of operation, including read/write access
in the RDAC and EEMEM registers, increment/decrement of
resistance, resistance changes in ±6 dB scales, wiper setting read-
back, and extra EEMEM for storing user-defined information,
such as memory data for other components or a lookup table.
The AD5235 supports dual-supply ±2.25 V to ±2.75 V operation
and single-supply 2.7 V to 5.5 V operation, making the device
suited for battery-powered applications and many other appli-
cations. In addition, the AD5235 uses a versatile SPI-compatible
serial interface, allowing speeds of up to 50 MHz .
The EVAL-AD5235SDZ can operate in single-supply and dual-
supply mode and incorporates an internal power supply from
the USB.
Complete specifications for the AD5235 part can be found in
the AD5235 data sheet, which is available from Analog Devices,
Inc., and should be consulted in conjunction with this user
guide when using the evaluation board.
DIGITAL PICTURE OF EVALUATION BOARD WITH SYSTEM DEMONSTRATION PLATFORM
EVAL-AD5235SDZ
SYSTEM DEMONSTRATION
PLATFORM
09728-001
Figure 1.
UG-258 Evaluation Board User Guide
Rev. 0 | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Package Contents.............................................................................. 1
General Description......................................................................... 1
Digital Picture of Evaluation Board with System
Demonstration Platform.................................................................. 1
Revision History ............................................................................... 2
Evaluation Board Hardware............................................................ 3
Power Supplies .............................................................................. 3
Link Options ................................................................................. 3
Test Circuits ...................................................................................4
Evaluation Board Software...............................................................6
Installing the Software..................................................................6
Running the Software ...................................................................6
Software Operation.......................................................................7
Evaluation Board Schematics and Artwork...................................8
Ordering Information.................................................................... 14
Bill of Materials........................................................................... 14
REVISION HISTORY
3/11—Revision 0: Initial Version
Evaluation Board User Guide UG-258
Rev. 0 | Page 3 of 16
EVALUATION BOARD HARDWARE
POWER SUPPLIES
The EVAL-AD5235SDZ supports the use of single and dual
power supplies.
In single-supply mode, the evaluation board can be powered
either from the SDP port or externally by the J1-1, J1-2, and
J1-3 connectors, as described in Table 1.
If dual-supply mode is required, the J1-1, J1-2, and J1-3 connectors
must provide the external power supply, as described in Table 1.
All supplies are decoupled to ground using 10 μF tantalum and
0.1 μF ceramic capacitors.
Table 1. Maximum and Minimum Voltages of the Connectors
Connector No. Label Voltage
J1-1 EXT VDD Analog positive power supply, VDD.
For single-supply operation, it is
2.7 V to 5.5 V.
For dual-supply operation, it is
2.5 V to 2.75 V.
J1-2 GND Analog GND.
J1-3 EXT VSS Analog negative power supply, VSS.
For single-supply operation, it is 0 V.
For dual-supply operation, it is
−2.5 V to −2.75 V.
LINK OPTIONS
Several link and switch options are incorporated into the evalu-
ation board and should be set up before using the board. Table 2
describes the positions of the links to control the evaluation board
by a PC, via the SDP board, using the EVAL-AD5235SDZ in
single-supply mode. The functions of these link and switch
options are described in detail in Table 3 through Table 6.
Table 2. Link Options Setup for SDP Control (Default)
Link No. Option
A25 3.3 V
A24 GND
Table 3. Link Functions
Link No. Power Supply Options
A25 VDD This link selects one of the following as the positive power supply:
5 V (from SDP).
3.3 V (from SDP).
EXT VDD (external supply from the J1-1 connector).
A24 VSS This link selects one of the following as the negative power supply:
GND (analog ground).
VDD VSS (external supply from the J1-3 connector).
Ach o—fb—n A1 W1 51 A1 ww
UG-258 Evaluation Board User Guide
Rev. 0 | Page 4 of 16
TEST CIRCUITS
The EVAL-AD5235SDZ incorporates several test circuits to
evaluate the AD5235 performance.
DAC
RDAC1 can be operated as a digital-to-analog converter (DAC),
as shown in Figure 2.
W1_BUF
A1
RDAC1
AC + DC
VDD
A1
B1
BUF-W1
VSS
GND
DC
2
V
DD
– V
SS
V
DD
2
V
DD
– V
SS
V
SS
R34
R35
W1
W1
B1
09728-002
Figure 2. DAC
Table 4 shows the options available for the voltage references.
Table 4. DAC Voltage References
Terminal Link Options Description
A1 A20 AC + DC Connects Terminal A1 to
(VDD − VSS)/2
VDD Connects Terminal A1 to VDD
W1 BUF-W1 Connects Terminal W1 to an
output buffer
B1 A21 DC
Connects Terminal B1 to
(VDD − VSS)/2
VSS Connects Terminal B1 to VSS
GND
Connects Terminal B1 to
analog ground
The output voltage is defined in Equation 1.
1024
)( 1
1
RDAC1
VVV B
A
OUT ×−= (1)
where:
RDAC1 is the code loaded in the RDAC1 register.
VA1 is the voltage applied to the A1 terminal (A20 link).
VB1 is the voltage applied to the B1 terminal (A21 link).
Using the R34 and R35 external resistors, you can reduce the
voltage of the voltage references. In this case, use the A1 and
B1 test points to measure the voltage applied to the A1 and B1
terminals and recalculate VA1 and VB1 in Equation 1.
AC Signal Attenuation
RDAC1 can be used to attenuate an ac signal, which must be
provided externally using the AC_INPUT connector, as shown
in Figure 3.
W1_BUF
A1
RDAC1
AC + DC
A
C_INPUT
AC
A1
B1
BUF-W1
GND
2
V
DD
–
V
SS
V
SS
R34
R35
W1
W1
B1
1µF
R36
DC
VSS
2
V
DD
– V
SS
09728-003
Figure 3. AC Signal Attenuator
Depending on the voltage supply rails and the dc offset voltage
of the ac signal, various configurations can be used, as described
in Table 5 .
Table 5. AC Signal Attenuation Link Options
Voltage
Supply
Maximum
AC Signal
Amplitude Link Options Conditions
Single VDD A20 AC + DC No dc offset voltage.
AC signal is outside
the voltage supply
rails due to the
dc offset voltage.
DC offset voltage
≠ VDD/21.
AC All other conditions.
A21 DC
Use in conjunction
with AC + DC link.
GND All other conditions.
Dual VDD/VSS A20 AC + DC AC signal is outside
the voltage supply
rails due to the
dc offset voltage
DC offset voltage
≠ 0 V1.
AC All other conditions.
A21 GND
Use in conjunction
with AC + DC link.
VSS All other conditions.
1 Recommended to ensure optimal total harmonic distortion (THD) performance.
The signal attenuation is defined in Equation 2.
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛+
×=
−− ENDTOEND
WWB1
R
RR
nAttenuatio log20)dB( (2)
where:
RWB1 is the resistor between the W1 and B1 terminals.
RW is the wiper resistance.
REND-TO-END is the end-to-end resistance value.
az az
Evaluation Board User Guide UG-258
Rev. 0 | Page 5 of 16
V
IN
RDAC2
B2A2 R42
W2 B2
W2
V
OUT
OAVOUT
A2
C1
10nF
R41
1.7kΩ
R43
09728-005
In addition, R36 can be used to achieve a pseudologarithmic
attenuation. To do so, adjust the R36 resistor until a desirable
transfer function is found.
Signal Amplifier
RDAC2 can be operated as an inverting or noninverting signal
amplifier supporting linear or pseudologarithmic gains. Table 6
shows the available configurations. Figure 5. Pseudologarithmic Noninverting Amplifier
Table 6. Amplifier Selection Link Options
Amplifier Gain Link Label
Noninverting Linear A27 LINEAR
A29 NONINVERTING
A30 NONINVERTING
Pseudologarithmic A27 PSEUDOLOG
A29 NONINVERTING
A30 NONINVERTING
Inverting Linear A27 LINEAR
A29 INVERTING
A30 INVERTING
Pseudologarithmic A27 PSEUDOLOG
A29 INVERTING
A30 INVERTING
R43 and R42 can be used to set the maximum and minimum
gain limits.
The inverting amplifier with linear gain is shown in Figure 6,
and the gain is defined in Equation 5.
R38
R
GWB2
−= (5)
where RWB2 is the resistor between the W2 and B2 terminals.
V
IN
RDAC2
B2 R42
W2 B2
W2
V
OUT
OAVOUT
C1
10nF
R41
1.7kΩ
R38
2.7kΩ
09728-006
The noninverting amplifier with linear gain is shown in Figure 4,
and the gain is defined in Equation 3.
Figure 6. Linear Inverting Amplifier
R38
R
GWB2
1+= (3)
The inverting amplifier with pseudologarithmic gain is shown
in Figure 7, and the gain is defined in Equation 6.
2
2
AW
WB
R
R
G−= (6)
where RWB2 is the resistor between the W2 and B2 terminals.
V
IN
RDAC2
B2 R42
W2 B2
W2
V
OUT
OAVOUTC1
10nF
R41
1.7kΩ
R38
2.7kΩ
09728-004
where:
RWB2 is the resistor between the W2 and B2 terminals.
RAW 2 is the resistor between the A2 and W2 terminals.
V
IN
RDAC2
B2A2 R42
W2 B2
W2
V
OUT
OAVOUT
A2
C1
10nF
R41
1.7kΩ
R43
09728-007
Figure 4. Linear Noninverting Amplifier
The noninverting amplifier with pseudologarithmic gain is
shown in Figure 5, and the gain is defined in Equation 4.
2
2
1
AW
WB
R
R
G+= (4) Figure 7. Pseudologarithmic Inverting Amplifier
R43 and R42 can be used to set the maximum and minimum
gain limits.
where:
RWB2 is the resistor between the W2 and B2 terminals.
RAW 2 is the resistor between the A2 and W2 terminals.
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UG-258 Evaluation Board User Guide
Rev. 0 | Page 6 of 16
EVALUATION BOARD SOFTWARE
INSTALLING THE SOFTWARE
The EVAL-AD5235SDZ evaluation kit includes evaluation
board software provided on a CD. The software is compatible
with Windows® XP, Windows Vista, and Windows 7 (both 32
and 64 bits).
Install the software before connecting the SDP board to the USB
port of the PC to ensure that the SDP board is recognized when
it is connected to the PC.
1. Start the Windows operating system and insert the CD.
2. The installation software must open automatically. If it
does not, run the setup.exe file from the CD.
3. After installation is completed, power up the evaluation
board as described in the Power Supplies section.
4. Plug the EVAL-AD5235SDZ into the SDP board and the SDP
board into the PC using the USB cable provided
5. When the software detects the evaluation board, follow the
instructions that appear to finalize the installation.
To uninstall the program, click Start > Control Panel > Add or
Remove Programs > AD5235 Eval Board.
RUNNING THE SOFTWARE
To run the evaluation board software, do the following:
1. Click Start > All Programs > Analog Devices > AD5235
> AD5235 Eval Board.
2. If the SDP board is not connected to the USB port when
the software is launched, a connectivity error is displayed
(see Figure 8). Connect the evaluation board to the USB
port of the PC, wait a few seconds, click Rescan, and follow
the instructions.
09728-010
Figure 8. Pop-Up Window Error
The main window of the EVAL-AD5235SDZ evaluation
software then opens, as shown in Figure 9.
09728-011
Figure 9. EVAL-AD5235SDZ Evaluation Board Software Main Window
Evaluation Board User Guide UG-258
Rev. 0 | Page 7 of 16
SOFTWARE OPERATION
The main window of the EVAL-AD5235SDZ software is
divided into the following sections: QUICK COMMANDS,
REGISTER ACCESS, HARDWARE PINS, TOLERANCE, and
MEMORY. The features of the main window are as follows:
• The QUICK COMMANDS section allows you to send the
AD5235 quick commands directly to the AD5235.
• The REGISTER ACCESS section can be used to update
the RDAC registers by typing a value into a window and
clicking WRITE. Alternatively, you can send a customized
SPI data-word by manually switching the scroll bars from
0 to 1 or from 1 to 0, as desired, and then clicking SEND
DATA. When WRITE is clicked or a quick command is
executed, a write-read operation is performed, and the
values displayed in this section are updated with the actual
RDAC register values. This function can be used to verify
whether the write operation was completed successfully.
The scroll bars are updated upon each write transfer.
• The HARDWARE PINS section enables or disables the
AD5235 WP pin and the RESET pin.
• The TOLERANCE section displays the stored tolerance of
the RDAC1 internal resistor.
• The MEMORY section displays the data stored in the
memory block. The data can be updated by switching the
scroll bar from READ to WRITE, updating a particular
window value, clicking UPDATE ALL or UPDATE
SINGLE, and selecting the memory location to write.
• Clicking EXIT closes the program but does not reset the part.
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UG-258 Evaluation Board User Guide
Rev. 0 | Page 8 of 16
EVALUATION BOARD SCHEMATICS AND ARTWORK
MULTICHANNEL
I2C
SPI
U/D
0x5E
0x5E
0x58
0x5A
1AGND2
2B2
3A2
7A4
8W4
9
DGND
10
SHDN
11
SYNC
12
DIN
5AGND4
6B4
4W2
21 AGND1
19 A3
13
SDO
14
SCLK
15
RESET
16
VDD
17 AGND3
18 W3
24 B1
22 W1
23 A1
20 B3
U6 AD8403
1W1
2B1
3A1
7B2
8A2 9
SDA
10
VSS
11 A3
12 B3 5
WP
6W2
4
AD0
19 W4
13 W3
14
SCL
15
DGND
16
AD1
17 A4
18 B4
20
VDD
U7 AD5254
1
NC
2
NC
3
GND
7
SHDN
8
DIN
9
SCLK
10
SDO
11
VSS
12
NC
5
RESET
6
VDD
4
SYNC
21 B2
19 A2
13 B3
14 W3
15 A3
16 B1
17 W1
18 A1
24 B4
22 A4
23 W4
20 W2
U8 AD5204
4
GND
5
VDD
6
SCL
8A2
7
SDA
1B1
2A1
3W2
9B2
10 W1
U1
AD5243
4
GND
5
VDD
6
SCLK
8
SYNC 7
DIN
1B1
2A1
3W2
9B2
10 W1
U2
AD5162
4
GND
5
VDD
6
SCL
8A2
7
SDA
1B1
2A1
3W2
9B2
10 W1
U3
AD5172_SOCKET
1
O1
2
SCLK
3
DIN
7A1
8W1
9B1
10 A2
11 W2
12 B2
5
GND
6
VSS
4
SDO
19
VDD
13 B3
14 W3
15 A3
16 B4
17 W4
18 A4 20
WP
21
RESET
22
SYNC
23
RDY
24
O2
U4 AD5233
4
VSS
5W2
6A2
8
GND
7B2
1B1
2A1
3W1
9
MODE
10
DACSEL
11
U/D
12
CLK
13
CS
14
VDD
U5
AD5222
4W1
5B1
6A1
8
VSS
7
SDA
1
VDD
2
AD0
3
WP
9
SCL
10
DGND
11
AD1
12 A3
13 B3
14 W3
U9
AD5252
4
GND 5
VSS
6A1
8B1
7W1
1
SCLK
2
DIN
3
SDO
9B2
10 W2
11 A2
12
VDD
13
WP 14
RESET
15
SYNC
16
RDY
U10
AD5232
4
GND 5
VSS
6A1
8B1
7W1
1
SCLK
2
DIN
3
SDO
9B2
10 W2
11 A2
12
VDD
13
WP 14
RESET
15
SYNC
16
RDY
U11
AD5235
4
GND 5
VSS
6V1
8B1
7W1
1
SCLK
2
DIN
3
SDO
9B2
10 W2
11 V2
12
VDD
13
WP 14
RESET
15
SYNC
16
RDY
U12
ADN2850
A1
W1-1
B1
A2
W2-1
B2
A3
W3-1
B3
A4
W4-1
B4
SHDN
RESET
SCLK
SDO
DIN
SYNC-1
A1
W1-8
B1
A2
W2-8
B2
A3
W3-8
B3
A4
W4-8
B4
SDA
SCL
WP
A1
W1-5
B1
A2
W2-5
B2
RDY
SDO
DIN
SCLK
SYNC-5
WP
RESET
VDD
VDD
VSS
VSS
VDD
A1
W1-4
B1
W2-4
B2
SYNC-4
DIN
SCLK
VDD
A1
W1-2
B1
A2
W2-2
B2
A3
W3-2
B3
A4
W4-2
B4
SYNC-2
SCLK
DIN
SDO
RESET
SHDN
VDD
VSS
A1
W1-3
B1
A2
W2-3
B2
A3
W3-3
B3
A4
W4-3
B4
O1
O2
RDY
SDO
SCLK
DIN
SYNC-3
RESET
WP
VDD
VSS
W1-6
B1
W2-6
B2
V1
V2
RDY
SDO
DIN
SCLK
SYNC-6
WP
RESET
VDD
VSS
A1
W1-9
B1
A2
W2-9
B2
A1
W1-7
B1
A2
W2-7
B2
RDY
SDO
DIN
SCLK
SYNC-7
WP
RESET
VDD
VSS
VDD
SCL
SDA
WP
VSS
VDD
A1
W1-10
B1
A2
W2-10
B2
SDA
SCL
A1
W1-11
B1
A2
W2-11
B2
SDA
SCL
VDD
VDD
A1
W1-12
B1
A2
W2-12
B2
CS
CLK
U/D
DACSEL
MODE
VDD
VSS
09728-019
Figure 10. Schematic of Multiboard Digital Potentiometers
INVER NONVINVER LINEAR PSEUDOLO
Evaluation Board User Guide UG-258
Rev. 0 | Page 9 of 16
VDD
DAC + FLOATING DAC + BW
PSEUDOLOG ATTENUATOR
B1
AC
AD8403-1
AD5204-1
AD5233-1
AD5162-1
AD5232-1
ADN2850-1
AD5235-1
AD5254-1
AD5252-1
AD5172
AD5243-1
W1
AD5222-1
+
-
1
2
3
U14-A
AD8618ARZ
BUF-W1 W1_BUF
R34
R35
R39
R40
AC_INPUT C3
A1
B1
R36
A
B
C
A20
A
B
C
A21
R3
R4
3+
2-
1
U15-A
AD8652AR
5+
6-7
U15-B
AD8652AR
8
V+
4
V-
U15-C
W1-1
W1-2
W1-3
W1-4
W1-5
W1-6
W1-7
W1-8
W1-9
W1-10
W1-11
W1
W1-12
VDD
VSS
A1
B1
VSS
VDD
VSS
VDD
VSS
AC + DC
09728-020
Figure 11. Schematic of Multiboard RDAC0 Circuits
INVE
R
TING
A
ND N
O
N-INVE
R
TING WITH LINE
A
R
A
ND PSEUD
O
-L
O
GG
A
IN
DIGIPOT
PSEUDOLOG
LINEAR
NON-INVERTING
INVERTING
NON-INVERTING
INVERTING
CIRCUIT CONNECTION
VIN
GND
+
-
7
6
5
U14-B
AD8618ARZ
AD8403 -2
AD5204 -2
AD5233 -2
AD5162 -2
AD5232 -2
ADN2850 -2
AD5235 -2
AD5254 -2
AD5252 -2
AD5172 -2
AD5243 -2
AD5322 -2
W2
VOUT
R38
J2-1
J2-2
R41
R42
R43
B2
A2
OAVOUT
C1
BA
A29
BA
A27
BA
A30
W2-1
W2-2
W2-3
W2-4
W2-5
W2-6
W2-7
W2-8
W2-9
W2-10
W2-11
W2-12
W2
A2
B2W2
09728-021
Figure 12. Schematic of Multiboard RDAC1 Circuits
UG-258 Evaluation Board User Guide
Rev. 0 | Page 10 of 16
POWER-SUPPLIES
EXT VDD
+5V
+3.3V
GND
EXT VSS
GND
CHANNELS 3 AND 4 POWER-SUPPLY
DIGITAL PINS CURRENT MONITOR
+
C24
10uF
C25
0.1uF
C26
0.1uF
+
C27
10uF
J1-1
J1-2
J1-3
A
B
C
A25
A
B
A24
+
-
14
13
12
U14-D
AD8618ARZ
AD8403-4
AD5204-4
AD5233-4
AD5254-4
+
-
8
9
10
U14-C
AD8618ARZ
AD8403-3
AD5204-3
AD5233-3
AD5254-3
BUF-4
BUF-3
A4
VOUT4
B4
A3
VOUT3
B3
W4
W3
O2
O1
V2
V1
C2
0.1uF
C4
0.1uF
VSS
VDD
+3.3V +5V
W4-1
W4-2
W4-3
W4-8
W3-1
W3-2
W3-3
W3-8
B4
A3
B3
A4
O1
O2
V1
V2
09728-017
Figure 13. Schematic of AD5235 Power Supplies and Other Channels
mmmmmmmmmmmmmmmmmmm
Evaluation Board User Guide UG-258
Rev. 0 | Page 11 of 16
09728-018
MUX - CS
LEVEL TRANSLATOR
TEST POINTS
SDP B
A
DC
NNECT
AND EEP
EXTERNAL CONTROL CONNECTION
SPORT
UART
SPI
TIMERS
INPUT/OUTPUT
GENERAL
CONTROL
BLACKFIN
PORT
PARALLEL
FUTURE USE
I2C
POWER SUPPLY
1
VIN_4-12V 2
N/C 3
GND 4
GND 5
5V_USB 6
GND
7
PAR_D23 8
PAR_D21
9PAR_D19
10 PAR_D17
11
GND
12
PAR_D14 13
PAR_D13 14
PAR_D11 15
PAR_D9 16
PAR_D7
17
GND
18
PAR_D5 19
PAR_D3 20
PAR_D1
21
PAR_RD 22
PAR_CS
23
GND
24
PAR_A3 25
PAR_A1
26
PAR_FS3 27
PAR_FS1
28
GND
29
SPORT_DR3 30
SPORT_DR2
31
SPORT_DR1
32 SPORT_DT1
33
SPORT_DT2 34
SPORT_DT3
35
SPORT_INT
36
GND
37
SPI_SEL_B 38
SPI_SEL_C 39
SPI_SEL1/_SS
40
GND
41
SDA_1 42
SCL_1
43
GPIO0 44
GPIO2 45
GPIO4
46
GND
47
GPIO6
48
TMR_A
49
TMR_C 50
FUTURE 51
FUTURE
52
GND
53
FUTURE 54
FUTURE 55
FUTURE 56
FUTURE 57
FUTURE
58
GND
59
UART_RX
60
RESET_IN
61 BMODE1
62 UART_TX
63 GND
64 FUTURE
65 FUTURE
66 FUTURE
67 FUTURE
68 FUTURE
69 GND
70 FUTURE
71 FUTURE
72 TMR_D
73 TMR_B
74 GPIO7
75 GND
76 GPIO5
77 GPIO3
78 GPIO1
79 SCL_0-EEPROM
80 SDA_0-EEPROM
81 GND
82 SPI _CLK
83 SPI _MISO
84 SPI _MOSI
85 SPI _SEL_A
86 GND
87 SPORT_TSCLK
88 SPORT_DTO
89 SPORT_TFS 90
SPORT_RFS
91
SPORT_DR0 92
SPORT_RSCLK
93 GND
94 PAR_CLK
95 PAR_FS2
96 PAR_A0
97 PAR_A2
98 GND
99 PAR_INT
100 PAR_WR
101 PAR_D0
102 PAR_D2
103 PAR_D4
104 GND
105 PAR_D6
106 PAR_D8
107 PAR_D10
108 PAR_D12
109 GND
110 PAR_D15
111 PAR_D16
112 PAR_D18
113 PAR_D20
114 PAR_D22
115 GND
116 V_IO(3.3V)
117 GND
118 GND
119 7V_UNREGOUT
120 7V_UNREGOUT
J22
BLACKFIN-DB_FEMALE_CONNECTOR_2
1A0
2A1
3A2
4VSS 5
SDA
6
SCL
7
WP
8
VCC
U25
24LC01
D6
LED
R37
1K
DGNDAGND
4
S8
5
S6
11 A0
10 A1
6EN
9A2
1
S5
14
S2
2
S7
12
S4
13
S1
3D
7VSS
8GND
15
S3
16 VDD
A22
ADG658
35 A0
36 A1
37 A2
38 A3
39 A4
40 A5
1A6
2A7
3A8
4A9
5A10
6A11
7A12
8A13
9A14
10 A15
30
B0 29
B1 28
B2 27
B3 26
B4 25
B5 24
B6 23
B7 22
B8 21
B9 20
B10 19
B11 18
B12 17
B13 16
B14 15
B15
32 BE2
31 BE1 34
SEL
11 GND 33
VCC
U13 ADG3247-CSP
MUX-A0|CS
MUX-A2|U/D
SCLK_BF
DIN_BF
MUX-A1|DACSEL
RDY|MODE
CLK
SDO_BF
SYNC_BF
SDA_BF
SHDN_BF
SCL_BF
RESET_BF
WP_BF
+3V3
VDD
+5V
VSS
A23
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A16
A17
A18
R2
2k2
R1
2k2
DIN_BF SDO_BF
SCLK_BF
SYNC_BF
RDY|MODERESET_BF WP_BF
SDA_BF
SCL_BF
SHDN_BF
+3.3V +5V
+3.3V
MUX-A2|U/D MUX-A1|DACSEL
MUX-A0|CS
MUX-A0|CS
MUX-A1|DACSEL
MUX-A2|U/D
SYNC-1
SYNC-2
SYNC-3
SYNC-4
SYNC-5
SYNC-6
SYNC-7
VDD
+3.3V
CLK_BF
SCLK_BF SCLK
DIN_BF DIN
SDO_BF SDO
SYNC_BF SYNC
SYNC RESET_BF
WP_BF
SHDN_BF
RDY_BF
RESET
WP
SHDN
RDY
SDA_BF
SCL_BF SDA
SCL
MUX-A0|CS
MUX-A1|DACSEL
MUX-A2|U/D
RDY|MODE
CS
DACSEL
U/D
MODE
CLK_BF CLK
+5V
MUX-A0|CS
MUX-A1|DACSEL
MUX-A2|U/D
RDY|MODE
CLK_BF
SCLK_BF
DIN_BF
SDO_BF
SYNC_BF
SDA_BF
SCL_BF
SHDN_BF
RESET_BF
WP_BF
VDD VSS
+5V
+3.3V
+3.3V
Figure 14. Schematic of SDP Connector
m .1. 11111 D: 2 ° “W 2:, 11% D“ E fi‘VD “’9?ny ”D D Ejmfi D" 359%” ; w1:1 WW ., D9 D W1 :13 mum M "3 1:11:11; BE ME D m; 1%} § W i an» 1., 9' 1 1. ~ 15 3“" H HE D “ 191,111 55', EB “$1: 115 mmiz a: 11 LE an "my BB w 1. 1m}; 1:1y 3D :4er magi M .11 15'" may, u 1 u: mg}; 555 w ”a,” mu; m m 3 mm u "D D 615 ”a.” 511qu «D Ezgmaw n .11 u 21 m 111135 :IPSEanmL: age; mm mm D D D D E“ 11‘ m WWWVERYWEEI‘WERHNG warm an m In! m but ”is m -m MuHmhanne‘ Low Vanqe Baum ....1 Q E": [343 m 1'1 w. 3%,“
UG-258 Evaluation Board User Guide
Rev. 0 | Page 12 of 16
09728-014
Figure 15. Component Side View
09728-012
Figure 16. Component Placement Drawing
09728-016
Figure 17. Layer 2 Side PCB Drawing
Evaluation Board User Guide UG-258
Rev. 0 | Page 13 of 16
09728-015
Figure 18. Layer 3 Side PCB Drawing
09728-013
Figure 19. Solder Side PCB Drawing
UG-258 Evaluation Board User Guide
Rev. 0 | Page 14 of 16
ORDERING INFORMATION
BILL OF MATERIALS
Table 7.
Qty Reference Designator Description Supplier1/Part Number
1 C1 10 nF capacitor, 0805 FEC 1692285
4 C2, C4, C25, C26 0.1 μF capacitor, 0603 FEC 138-2224
1 C3 1 μF capacitor, 0402 FEC 1288253
2 C24, C27 10 μF capacitor, 1206 FEC 1611967
1 D6 LED, green FEC 579-0852
1 J1 3-pin connector FEC 151790
1 J2 2-pin connector FEC 151789
1 J22 Receptacle, 0.6 mm, 120 way Digi-Key H1219-ND
4 A20, A21, A24, A25 Header, 2-row, 36 + 36 way, and jumper socket, black FEC 148-535 and FEC 150-410
3 A27, A29, A30 Header, 1-row, 3-way, and jumper socket, black FEC 102-2248 and FEC 150-410
4 BUF-W1, OAVOUT, BUF-3, BUF-4 Header, 1-row, 2-way, and jumper socket, black FEC 102-2247 and FEC 150-410
1 R41 1.78 kΩ resistor, 0603, 1% FEC 1170811
2 R1, R2 2.2 kΩ resistor, 0603, 1% FEC 933-0810
5 R3, R4, R38, R39, R40 2.7 kΩ resistor, 1206, 1% FEC 9337288
36 AD5162-1, AD5162-2, AD5172-1,
AD5172-2, AD5204-1, AD5204-2,
AD5204-3, AD5204-4, AD5222-1,
AD5222-2, AD5232-1, AD5232-2,
AD5233-1, AD5233-2, AD5233-3,
AD5233-4, AD5235-1, AD5235-2,
AD5243-1, AD5243-2, AD5252-1,
AD5252-2, AD5235-1, AD5235-2,
AD5235-3, AD5235-4, AD8403-1,
AD8403-2, AD8403-3, AD8403-4,
ADN2850-1, ADN2850-2, R34, R35, R42,
R43
0 Ω resistor, 0603 FEC 9331662
1 R37 1 kΩ resistor, 0603, 1% FEC 933-0380
6 3.3 V, 5 V, DGND, AGND, VDD, VSS Test point, PCB, black, PK100 FEC 873-1128
35 A1, A2, A3, A4, RDY|MODE, RESET_BF,
SCL_BF, SCLK_BF, SDA_BF, SDO_BF,
SHDN_BF, SYNC_BF, MUX-A0|CS,
MUX-A1|DACSEL, MUX-A2|U/D, O1, O2,
DIN_BF, CLK, B1, B2, B3, B4, V1, V2, VOUT,
VOUT2, VOUT3, VOUT4, W1, W1_BUF, W2,
W3, W4, WP_BUF
Test point, PCB, red, PK100 FEC 873-1144
1 U1 AD5243 Analog Devices AD5243
1 U2 AD5162 Analog Devices AD5162
1 U3 AD5172 Analog Devices AD5172
1 U4 AD5233 Analog Devices AD5233
1 U5 AD5222 Analog Devices AD5222
1 U6 AD8403 Analog Devices AD8403
1 U7 AD5235 Analog Devices AD5235
1 U8 AD5204 Analog Devices AD5204
1 U9 AD5252 Analog Devices AD5252
1 U10 AD5232 Analog Devices AD5232
1 U11 AD5235 Analog Devices AD5235
1 U12 ADN2850 Analog Devices ADN2850
1 U13 ADG3247 Analog Devices ADG3247
1 U14 AD8618 Analog Devices AD8618
1 U15 AD8652 Analog Devices AD8652
1 A22 ADG658 Analog Devices ADG658
1 U25 24LC64 FEC 975-8070
1 FEC refers to Farnell Electronic Component Distributors; Digi-Key refers to Digi-Key Corporation.
Evaluation Board User Guide UG-258
Rev. 0 | Page 15 of 16
NOTES
ANALOG DEVICES www.ana|ng.cum
UG-258 Evaluation Board User Guide
Rev. 0 | Page 16 of 16
NOTES
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
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AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
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UG09728-0-3/11(0)

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