LX2260 Datasheet by Microsemi PoE Ltd.

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LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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DESCRIPTION KEY FEATURES
The LX2260 is a high brightness multi-
channel LED driver, designed for automotive
display illumination. It offers the designer a
high degree of flexibility to accommodate
different LED configurations (white or RGB),
drive currents, input and output voltages while
providing a high degree of control, protection
and fault management of the system.
The LX2260 is very well suited for
applications where high brightness LED
backlighting is combined with a wide
dimming range and high reliability such as in
Automotive Infotainment, Marine or Cockpit
applications.
The LX2260 driver supports up to 4
independent LED strings and can be
integrated in systems supporting up to 40W.
The drive current of each string can be
programmed up to 500mA, with a typical
channel-to-channel matching accuracy within
±1.5 percent. The FETs of the boost converter
and each LED current sink are external to
provide the flexibility and scalability to
accommodate a variety of LED configurations
as well as to provide optimal thermal
management of the system.
Dimming inputs providing either
independent control of several white LED
strings or color mixing capability for optimal
light temperature control. PWM frequency of
up to 25kHz is supported to avoid audible
noise.
The LX2260 has the unique capability to
automatically adjust its operation
according to the instantaneous input and
output voltage requirements to operate in a
boost, buck-boost, or buck converter mode
(this is not a traditional buck/boost circuit)
thus automatically maintaining the
optimally chosen LED current regulation.
Fault conditions can be reported through
a digital 2 wires serial bus interface (I2C
and SMBus compatible) and include LED
short, LED open, and IC over temperature
indicators as well as information about the
LED string voltage.
The IC also provides externally
programmable LED current rise and fall
time that can be used to optimize system
EMI.
The LX2260 is designed to provide
protection as well as continued operation
in case of several fault conditions
(StayLIT™). Among the protection
features we offer output short circuit
protection, over-voltage protection, and
over-temperature shutdown. In addition,
with the use of an external thermistor to
sense the LED temperature, the LED
current can be compensated to stay within
a given LED temperature profile.
Four LED Channels with
Independent PWM Control
Up to 500mA LED Current per
Channel with External Power
Components for Optimal Design and
Thermal Management
±3% Current Setting Accuracy
1.5% Channel to Channel Current
Matching
Minimum +90% efficiency
Programmable LED Current
Amplitude via SMBus or I2C
Unique Auto Buck, Boost, and
Buck-Boost Mode Transition
Analog Dimming via Light Sensor
(Ambient or RGB Light) or
Thermistor
Wide Digital Dimming Range (up to
3000:1)
SMBus and I2C Compatible Digital
Diagnostic Reporting
LED Fault Status
String Voltage Monitoring
LED Over Temperature Warning
& Protection
Multiple Protection including Short
Circuit, Over Voltage and Over
Temperature Protection
Programmable LED Current
Rise/Fall Time for EMI Control
Automotive Grade
AEC-Q100 Qualification
40V Load Dump Resistance
-40°C to +85°C Ambient
Temperature Range
APPLICATIONS
Automobile display illumination
(cluster instruments, monitors, rear-
seat entertainment systems)
Displays for Consumer electronics
White or RGB LED Displays
IMPORTANT: For the most current data, consult MICROSEMI’s website:
http://www.microsemi.com;
PACKAGE ORDER INFO THERMAL DATA
TA (°C) LQ Plastic 5 x 7 mm² QFN 38-pin θJA = 19.3 °C/W
RoHS Compliant / Pb-free THERMAL RESISTANCE-JUNCTION TO AMBIENT
-40°C to
85°C LX2260ILQ
Junction Temperature Calculation: TJ = TA + (PD x θjA).
The θJA numbers are guidelines for the thermal performance of the
device/pc-board system. All of the above assume no ambient airflow.
Note: Available in Tape & Reel. Append the letters “TR” to the part number.
(i.e. LX2260ILQ-TR)
Obsolete
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LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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ABSOLUTE MAXIMUM RATINGS
PACKAGE PIN OUT
Supply Input Voltage VCC, Sense, PFET,VH,VD1-4, EN, VLED .................-0.3V to 44V
VH to VCC ................................................................................................................. - 6V
VL to GND .......................................................................................................-0.3V to 6V
SDA, SCLK, PWM1-4, FFLAG .......................................................................-0.3V to 6V
All other pins ........................................................................................ -0.3V to VL+0.3V
Maximum Junction Temperature ............................................................................... 150°C
Storage Temperature Range ......................................................................... -65°C to 150°C
Peak Package Solder Reflow Temperature (40 seconds maximum exposure) ........... 260°C
Notes: Exceeding these ratings could cause damage to the device. All voltages are with respect to GND.
Currents are positive into, negative out of specified terminal. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under
“Recommended Operating Conditions” are not implied. Exposure to “Absolute Maximum Ratings”
for extended periods may affect device reliability.
(Top View)
RoHS / Pb-free 100% Matte Tin Pin Finish
xxxx = date/lot code
FUNCTIONAL PIN DESCRIPTION
Pin
Name Pin # Description
GND 1
GND pin: The external NFET for DC-DC converter should return to this GND
ICOMP 2
Power converters current slope compensation. Connect a resistor from this pin to GND to compensate
current slope. See “slope compensation section” for detail.
COMPT 3
Boost Mode Compensation: Connect a resistor from this pin and the junction of the COMPK resistor and
capacitor for auto tri-mode design.
COMPK 4
Buck and Buck-Boost mode Compensation. Connect a capacitor in series with a resistor across this pin
and GND. If needed, another capacitor connected from this pin to GND for type II compensation
CSS 5 Feedback Soft-start: Connect a capacitor 4.7µF typical from this pin and GND.
VL 6
5V power supply output – Power Pin – Provides a regulated 5V typical to the internal and external 5V
circuits. Typical 2mA current source for external use.
EN 7
Enable Input. Pull low to put the system into sleep mode. If not used must tie to VCC.
OT/ADIM 8
LED Temperature Compensation/Analog Dimming: This input is used for LED temperature compensation.
The LED current amplitude will reduce proportional with LED ambient temperature. The start of
compensation is programmable with an external resistor and a thermistor. Connect pin to GND to force
100% output current when thermal compensation is not used.
By setting 1 on REG08<7>, this pin becomes analog dimming input (ADIM) which has 0V to 2V control
range. Connect ADIM to GND to force 100% output current when analog dimming is not used.
FS 9
Oscillator Frequency Setting pin. Connect a resistor RFS between FS to GND to set the buck/boost
frequency using the following formula:
Freq [kHz] = 66000/RFS where R is in k.
Obsolete
Q Microsemi PRODUCTION DATASHEET w 9 Microsemi Page 3 Ana‘og waed SIgna‘ Group new, CA 92655‘ 1-800-713-4113‘ 949-380-6100, fax 949-215-4995
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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FUNCTIONAL PIN DESCRIPTION
Pin
Name Pin # Description
SLOPE 10
LED current rise/fall time programmable pin. Connect a resistor from this pin to GND to program LED
current rise/fall time for EMI purpose. If not used, tie this pin to 5V.
SDA 11
Serial Data In/Output. Read data for fault conditions, LED string status via drain voltage, VLED voltage.
SDA also can be used to set the LED peak current amplitude by writing to register 08h. Connect to GND if
SDA is not used.
SCLK 12 Serial Clock Input. Maximum clock is 100kHz. Connect to GND if not used.
FFLAG 13
Fault signal output. Open drain output. This pin goes low when a fault condition is detected.
PWM1-4 14-17
Pulse Width Modulated dimming signal – Signal input.
PWM input can be tied together for a common PWM signal or use for individual PWM control.
ADR 18
Address Setting: connect to VL, GND or leave it open for three different address choices. Refer to the
address table below.
GND 19
GND pin
IS1-4 20,23,
26,29
LED current setting. – Program this pin with an external resistor to set the LED current with 300mV internal
reference voltage. I-LED = 300mV/RIS
VG1-4 21,24,
27,30
Gate Drive – CMOS Output Pin: Connect to the gate of the external NMOSFET current sink. Any unused
pins must be tied to ground to distinguish between intentionally unused and LED failed open.
VD1-4
22,25,
28,31
Drain – Signal Pin – This connects to Drain pin of the external N-MOSFET switch. The boost output
voltage regulates based on the lowest VD, and the lowest voltage is kept at 0.9V (typical). Any unused
pins can be left open.
OVP 32
Over Voltage Protection – Signal input: An external voltage divider sets the maximum LED voltage. System
will stop switching when OVP limit hits, and resume when it goes lower than the limit.
VLED 33 LED voltage. Connect this pin directly to common anode strings voltage.
DRV 34
Low-side NFET gate drive: Connect to the gate of the N-channel MOSFET
PFET 35
High-side PMOS gate drive: Connect to gate of a PFET. When the boost output short detected or EN signal
low, PFET will open. Otherwise, PFET is a converter switch in buck or buck-boost mode.
VH 36 High side power rail. Connect a 1µF 10V capacitor from this pin to VCC.
SENSE 37
Converters current sense negative pin. The differential input voltage across RSENSE resistor used to set the
peak inductor current. Use Kelvin connection directly to the RSENSE output side
VCC 38
Power supply input – Provides power to the IC. Must be closely decoupled to ground with ceramic
capacitors.
Obsolete
Q Microsemi FS VH vcc SENS Copyrugm c 2011 Microsemi Rev, 1 0 12/4/2012 Ana‘og waed SIgna\ Group One Emerpnse‘ Ahso Vwelo. CA 92656‘ 1-800-713-4113‘ 949-380-510
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 4
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SIMPLIFIED BLOCK DIAGRAM
VCC
DRV
PFET
FS
SENSE
VH
Level
Shift VLED
5VL
Q
Q
SET
CLR
S
R
VCC
VH
Level
shift
OSCILLATOR
VCC
ICOMP
+
-
+
EA
Gain
CTRL
COMPT
Vref
VD 1-4
CSS
SMBus
Interface
8BIT ADC & 7BIT
DAC
SCLK
SDA
ILED MOD
&
SLOPE CTRL
PWM1-4
5V REGULATOR
VL
Vcc
POR
Control
Logic
EN
+
-
UVLO
Thermal
Ckt.
CLK
VG 1-4
IS 1-4
PWM 1-4
SLOPE
PGND
ADIM/LED TEMP COMP
ADIM/OT
OVP
x4
+
-
OC
POR
Vref1
PWM1-4
Temp
Temp
Vref3
CLK
5VL
VCC
OC
OC
ADR
FFLAG
VLED/20
GND
-5.25V LDO VCC
VLED and
Protection
Control
COMPK
Obsolete
LX2260 O Microsemli PRODUCTION DATASHEET Copyrighl c 2011 Mic 5 Rev, 1 0 12/4/2012 Ana‘og MIX One Emerpnse‘ Allso View, CA 532656 1-5
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page
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ELECTRICAL CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature of -40°C TA 85°C and the following test
conditions: VCC = 12V; VOT = 0V, EN = 3V, RFS = 100k, RSLOPE = 82.5k, Typical values are at TA = +25°C
Parameter Symbol Test Conditions / Comment Min Typ Max Units
Input Power Supply
Input Voltage VCC Withstand voltage VCC = 40V 6 28 V
Quiescent current ICCON EN > 2V, No PFET & NFET connected 10 mA
Sleep current ICCSLEEP EN < 0.8V , VCC = 28V 25 A
Control and Logic
EN Logic High VENH 2 V
EN Logic Low VENL 0.8 V
EN Current High IENH EN = 3.3V 5 A
EN Current Low IEN-L EN < 0.8V 5 A
Address High Input VADRH VL-0.8 V
Address Low Input VADRL 0.8 V
Address Open VADRO VL/2 V
Address Input Low Current IADRH -20 -7 A
Address Input High Current IADRL 7 20 A
FFLAG Output Low Voltage VFFLAGH I
LOAD = 3mA 0.4 V
FFLAG Output High Leakage
Current VFFLAGL V
FFLAG = 5.5V 10 A
DC/DC PWM Error Amplifier
Peak Output Current IOUT +/-40 A
Output Resistance ROUT 4000 k
Forward Transconductance gm At EA inputs (IOUT/(VLED/20-VCSS) 120 mho
COMP Switch On Resistance VCOMPT = VCOMPK = 1.6V 0.5 k
Soft Start/Drain Voltage Sense Error Amplifier
CSS Source Sink Peak Current ICSS
Lowest VD > 700mV +/-20
A
Lowest VD < 700mV 120
Forward Transconductance gm 80 mho
Output Resistance 5000 k
Valid Output Voltage Range VCSS 1/20 of VLED 0.5 2 V
Start Up Time TSU CCSS = 2.2µF, RISx = 2, VIS setting 300mV,
100% PWM, at IS voltage > 90% 5 20 mS
Pulse Width Modulation Input
PWM Input Low Voltage VPWM_L 0.8 V
Obsolete
O Microsemli AME Copyrighl c 2011 Rev, 1 0 12/4/2012 Mic Ana‘og MIX One Emerpnse‘ Allso Vlejo, CA 532656 1-8
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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ELECTRICAL CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature of -40°C TA 85°C and the following test
conditions: VCC = 12V; VOT = 0V, EN = 3V, RFS = 100k, RSLOPE = 82.5k, Typical values are at TA = +25°C
Parameter Symbol Test Conditions / Comment Min Typ Max Units
PWM Input High Voltage VPWM_H 2 V
PWM Input Frequency FPWM 0.1 25 kHz
Minimum PWM Pulse Width PWMMIN
Digital Dimming; SLOPE = VL 2 µs
Adjustable Slope Option to set tR and tF 2.5
+2 tR
or tF
PWM Input Pull-down Resistor PWMR 100 k
PWM Input to Output Delay
(VIS = High)
SLOPE = VL (minimum tR, tF) 6.5 µs
R
SLOPE = 82.5k (tR,tF~4S) 9 µs
Device Protection
OVP Threshold Voltage VTH OVP 1.87 1.97 2.07 V
Over Temperature Shutdown TOVT-SHDN Rising temperature hysteresis, THYS = 20°C,
at junction 150 °C
Shut Down Recovery TRECOVERY At junction 130 °C
Over Temperature Warning TOVT-WARN Rising temperature hysteresis, THYS = 15°C,
at junction 120 °C
Clear Warning At junction 105 °C
Load Dump Protection VISET
VIS setting at 100%, buck-boost transition.
VIN: 10VÙ40V, dV/dt = 30V/msec
For Design Reference Only
360 mV
LED Current Output
Sink Current Overshoot VISET OVERS VIS setting at 100% , PWM Dimming
For Design Reference Only 5 %
Sink Current Over/Under shoot in
transition mode VISET
VIS setting at 100% , buck-boost transition.
VIN: 10VÙ32V, dV/dt = 1V/msec
For Design Reference Only
10 %
V-source Pk-Pk Matching Among
Strings VISET 150
Rsense = 2, 0.8V VD 3V (note 1)
TAMB = 25°C, PWM = 100% duty cycle 1.5 %
FPWM = 200Hz, PWM = 25% duty cycle 3 %
Maximum IS voltage VISx
Rsense = 2, Average of the four outputs 291 309 mV
Rsense = 2, Each outputs 286.6 313.6 mV
Minimum VD regulation VDx At the lowest VD pin, IDS = 150mA 800 1000 mV
IS Input Bias Current IIS V
IS = 300mV 300 nA
DC Gain AOL 80 dB
Current Source Driver Opamp
On State VG Voltage Range VGRANGE VG voltage that maintains DC accuracy 1.5 4 V
Off State VG Voltage VGOFF 0.1 V
VG Sink Current VGSNK V
VG = 2.5V, VIS = 0.4V, PWM = HIGH -7 mA
VG Source Current VGSRC V
VG = 2.5V, VIS = 0.2V, PWM = HIGH 7 mA
Obsolete
Q Microsemli 4.5V. Copyrighl c 2011 Mic Rev, 1 0 12/4/2012 Ana‘og MIX One Emerpnse‘ Alisa View, CA 9265& 1-5
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 7
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ELECTRICAL CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature of -40°C TA 85°C and the following test
conditions: VCC = 12V; VOT = 0V, EN = 3V, RFS = 100k, RSLOPE = 82.5k, Typical values are at TA = +25°C
Parameter Symbol Test Conditions / Comment Min Typ Max Units
VG Load Capacitance CLG 1500 pF
LED Current On/Off slope
SLOPE Reference Voltage VSLOPE 2 V
I-LED Rise Time TI-LED RISE SLOPE = 5VL
FPWM = 200Hz, PWM = 50% duty cycle
CLG < 500pF
1 1.5 2.5 µs
I-LED Fall Time TI-LED FALL 1 1.5 2.5 µs
I-LED Rise Time TI-LED RISE RSLOPE = 82.5k, TRISE//TFALL = 10% to 90%
FPWM = 200Hz, PWM = 50% duty cycle
CLG < 500pF
3 4.2 5.5 µs
I-LED Fall Time TI-LED FALL 3 4.2 5.5 µs
LED Temperature Compensation (LED Current Profile)
OT Start Threshold Voltage VOTTH
I-LED starts compensation at I-LED = 95%
current setting. Register 08h = 01111111;
PWM1-4 = High
1.8 2.0 2.2 V
OT Max_Voltage Compensation VOT
At stop point, I-LED = 15% current setting.
Register 08h = 01111111;
PWM1-4 = High
3.3 3.5 3.8 V
And goes down to 6.7% when VTH OT >4.5V.
PWM1-4 = High;
Register 08h= 01111111
3.5 3.7 3.95 V
OT Input Bias Current IOTIIB 1 A
Analog Dimming ( Analog dimming can be set via SMBus or Fuse)
AD Voltage VAD
I-LED = 95%; PWM1-4 = HIGH;
Register 08h = 01111111 1.8 1.9 2.0
V
I-LED = 6.7%; PWM1-4 = HIGH;
Register 08h = 01111111 0.05 0.2 0.34
AD Input Bias Current ADIIB -1 1 A
Analog Control Output Range VIS Register 08h = 01111111, PWM1-4 = High 5 100 %
SMBus LED Peak Current Adjustment
Adjustment Range IPADJ VIS = 300mV represents maximum current
setting 15.4 100 %VIS
Resolution IRES 2 mV translates out to be 7 bits DAC 2 mV
LED short/open protection
LED Short Threshold Voltage
(note 1) VDxSHORT FPWM = 25kHz,
Duty cycle > 7µsec 6.7 7.2 7.7 V
Derated IS Voltage VD > 7.75 10 %
LED Open Threshold Voltage VDxOPEN F
PWM = 25kHz, PWM = 10% duty cycle 0.24 V
Inductor Over Current protection
Maximum Short Circuit Current ILSHORT With 10m current sense resistor
For Design Reference Only 10 A
Over Current Threshold Voltage VOC At current sense inputs 90 mV
Obsolete
O Microsemli PRODUCTION DATASHEET py g Microsemi Ana‘og Mixed Slgnal Group Page a VIEJO, CA 92656‘ 1-800-713-4113‘ 949-380-6100, fax 949-215-4996
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page
8
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Four Channel High Brightness LED Driver
WWW.Microsemi .COM L
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ELECTRICAL CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature of -40°C TA 85°C and the following test
conditions: VCC = 12V; VOT = 0V, EN = 3V, RFS = 100k, RSLOPE = 82.5k, Typical values are at TA = +25°C
Parameter Symbol Test Conditions / Comment Min Typ Max Units
SENSE Input
Sense Input Voltage Range VSENSE 100 mV
Sense Input Bias Current ISENSE 0.3 A
VL Regulator (5.0V)
VL Output 5V 6V VCC 28V; no external load 4.75 5.00 5.25 V
VL Source Current 5VCURRENT External load current, VCC = 6V,
VL drop by 5% 2 mA
UVLO VLUVLO VL rising, VHYS = 0.50V 3.75 4.25 4.65 V
VH (VCC-5.25V) Regulator
VH Output Voltage VH 6V VCC 28V; 0mA IVH 15mA
Reference to VCC -4.75 -5.25 -5.5 V
UVLO VHUVLO
VH falling, VHYS = 0.50V. Internal POR
activates on VH falling UVLO threshold,
reference to VCC
-4.25 V
Oscillator
FS Reference Voltage VFS 2 V
Oscillator Frequency FSW RFS = 100k 600 670 740 kHz
Oscillator Frequency Setting
Range FRANGE 400 800 kHz
DC/DC Switching NFET Driver
DRV Voltage High VDRVH 5 V
DRV Rise Time TRISE CL = 1000pF 26 ns
DRV Fall Time TFALL CL = 1000pF 15 ns
Off Voltage VDRVOFF EN = 0V 0 V
DC/DC Switching PFET Driver
PFET High Voltage VPFETH EN = 0V, refer to VCC 0 V
PFET Low Voltage VPPFETL Refer to VCC -5.25 V
PFET Rise Time TRISE CL = 1000pF 14 ns
PFET Fall Time TFALL CL = 1000pF 25 ns
Converter mode condition
Boost to Buck-Boost Transition BS-BB At VLED. VLED falling 13.76 V
Buck-Boost to Boost Transition BB-BS At VLED. VLED rising 14.65 V
Buck to Buck-Boost Transition BK-B At VLED. VLED rising 9.21 V
Buck-Boost to Buck Transition BB-BK At VLED. VLED falling 8.41 V
Obsolete
O Microsemi, Copyrighl o 2011 Mic Rev, 1 0 12/4/2012 Ana‘og MIX One Emerpnse‘ Alisa mew, CA 9265& 1-5
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page
9
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Four Channel High Brightness LED Driver
WWW.Microsemi .COM L
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0
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature of -40°C TA 85°C and the following test
conditions: VCC = 12V; VOT = 0V, EN = 3V, RFS = 100k, RSLOPE = 82.5k, Typical values are at TA = +25°C
Parameter Symbol Test Conditions / Comment Min Typ Max Units
Overall System Efficacy
VIN = 12V& 26V, VS setting at 100%,
PWM = 100% (Boost mode & Buck Mode)
For Design Reference Only
90 %
SMBus
SDA, SCLK Input Low Voltage ILV 0.7 V
SDA, SCLK Input High Voltage IHV 2 V
SDA, SCLK Input Hysteresis IHYS 100 mV
SDA,SCLK Input Bias Current IIB -5 +5 A
SDA Output Low Sink Current OSNK V
SDA = 0.4V 4 mA
SMBus Frequency FSMBUS 10 100 kHz
SMBus Free time TBUF 4.7 s
SCLK Serial Clock High Period THIGH 4 s
SCLK Serial Clock Low Period TLOW 4.7 s
Start Condition Set-up Time TSU:STA 4.7 s
Start Condition Hold-up Time THD:STA 4 s
Stop Condition Set-up Time from
SCLK TSU:STO 4 s
SDA Valid to SCLK Rising Edge
Set-up Time, Slave Clocking Data TSU:DAT 250 ns
SCLK Falling Edge to SDA
Transition THD:DAT 0 ns
SCLK Falling Edge to SDA Valid,
Reading Out Data TDV 200 ns
Note: 1. When the different VDRAIN voltages are more than 2V, then a single LED short may shut off the string that has a highest VDRAIN (VD hits
the limit). However VSOURCE pk-pk matching will not be effected in this circumstance.
Obsolete
Q Microsemi Opt iiii Address
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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SERIAL INTERFACE
SMBus INTERFACE
LX2260 is a nine-register device which uses SMBus or
I2C protocols to communicate with the host system. All
registers are defined as full byte wide. Some registers
contain reserved (undefined) bits with a default value of “0”,
or are read only bits that are status indicators. Two of the
nine registers are capable of both read and write, and seven
registers are read only. See the LX2260 Register Definitions
section for details.
The LX2260 communicates over the SMBus and operates
in a “slave” mode receiving commands and sending /
receiving data to / from the host or “master”. Only standard
two-wire SMBus and I2C compatible serial bus and
protocols may be used for this device. The LX2260 can be
configured for one of the three addresses by connecting the
ADR input pin to ground, VDD, or simply leaving it OPEN.
Address Strapping Codes
Option # ADR Address
1 GND 0101 100b
2 OPEN 0101 110b
3 VDD 0101 111b
In this document, the SMBUs address occupies high
seven bits of an eight bit field on the bus, the low bit is
always the R/W bit.
Address = 0101100xb
1 7 1 1 8 1 1
S Slave Address Wr A Data Byte A P
0 1 0 1 1 0 0 0
Address = 0101110xb
1 7 1 1 8 1 1
S Slave Address Wr A Data Byte A P
0 1 0 1 1 1 0 0
Address = 0101111xb
1 7 1 1 8 1 1
S Slave Address Wr A Data Byte A P
0 1 0 1 1 1 1 0
SMBus PROTOCOL
The only required command protocols are SMBus Send
Byte, Receive Byte, Read Byte / Word, and the Write Byte /
Word protocols.
Writes to registers can be performed by either the SMBus
Write Byte / Word protocols and / or by internal IC logic,
depending on the register type.
Read can be performed on all registers by issuing the Read
Byte / Word protocol. Read Only registers can be written only
by internal logics. Their contents will not be affected by
SMBus write commands.
When LX2260 is initially powered, it will first test the
address selection pin input to determine its own address and
then look for its unique address each time it detects a “Start
Condition”. If the address does not match, the LX2260 ignores
all bus activity until it encounters another “Start Condition”.
SMBus Packet Protocol Diagram Element Key
S Slave Address Wr A Data Byte A P
X X
S Start Condition
Rd Read (bit value of 1)
Wr Write (bit value of 0)
A Acknowledge (‘0’ for an ACK, or ‘1’ for a NACK)
P Stop Condition
Command Code Register Address
Master-to-Slave Slave-to-Master
Protocols used to communicate with LX2260 must be per
standard SMBus specification version 2.0 or higher.
Obsolete
Q Microsemi oopyngm c 2011 Mic Rev, 1 0 12/4/2012 Ana‘og wa One Emerpnse‘ Ahso Vwelo. CA 92656‘ 1-5
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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SERIAL INTERFACE
SMBus Timing Measurement
Register Definitions
The LX2260 includes a registers to monitor the fault status. The slave address is set by the ADR signal inputs as follows:
VD Register: Address is 00h to 03h. This register has 8 bits that allows monitoring the drain voltage (VD). This voltage will reveal
the string status, i.e., LED short/open. It is suggested that the input PWM duty cycle be reduced when a LED short is detected to
avoid LED current sink NFET overheating.
VLED Register: Address is 04h. This register has 8 bits that allow monitoring the Boost output voltage (VLED).
String 1 & 2 Status Register: Address is 05h. This register has 8 status bits that allows monitoring the string 1 & 2 status.
String 3 & 4 Status Register: Address is 06h. This register has 8 status bits that allows monitoring the string 3 & 4 status.
Fault/Status Register: Address is 07h. This register has 8 status bits that allows monitoring the backlight controller’s operating
state.
REGISTER 00h VD1 (drain voltage monitoring)
REGISTER 01h VD2 (drain voltage monitoring)
REGISTER 02h VD3 (drain voltage monitoring)
REGISTER 03h VD4 (drain voltage monitoring)
REGISTER 04h VLED (LED Anode voltage monitoring)
REGISTER 05h String 1 & 2 status
REGISTER 06h String 3 & 4 status
REGISTER 07h Faults
REGISTER 08h LED Peak Current Reference Voltage Adjustment
REGISTER 00h to 03h Drain voltage monitoring DEFAULT VALUE 0x00
VD VD VD VD VD VD VD VD
Bit 7 (R) Bit 6 (R) Bit 5 (R) Bit 4 (R) Bit 3 (R) Bit 2 (R) Bit 1 (R) Bit 0 (R)
BIT FIELD DEFINITION DESCRIPTION
Bit 0-7 (R) Drain voltage 8-bit drain voltage monitoring. 256 steps for 8V. (bit 7 is MSB)
tLOW tR
tHIGH
tF
tHD:STA
tBUF
VIL
VIH
VIL
VIH
PS
tHD:DAT
tSU:STA
S
tSU:STO
P
tSU:DAT
SMBus Clock
(SCL)
SMBus Data
(SDA)
Obsolete
Q Microsemi PRODUCTION DATASHEET u I DEFINITION DESCRIPTION REGISTER 06h String 3&4 Status Register DEFAULT VALUE 0x00 #4 M W9 Microsemi Ana‘og waed SIgna‘ Group IEJU, CA 92655‘ 1-800-713-4113‘ 949-380-6100, fax 948-215-4985 Page 12
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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SERIAL INTERFACE
REGISTER 04h LED voltage monitoring DEFAULT VALUE 0x00
VLED VLED VLED VLED VLED VLED VLED VLED
Bit 7 (R) Bit 6 (R) Bit 5 (R) Bit 4 (R) Bit 3 (R) Bit 2 (R) Bit 1 (R) Bit 0 (R)
BIT FIELD DEFINITION DESCRIPTION
Bit 0-7 (R) LED voltage 8-bit LED voltage monitoring. 256 steps for 67.9V. (bit 7 is MSB)
REGISTER 05h: String 1&2 Status Register DEFAULT VALUE 0x00
String #2 not
Used
String #1 not
Used S1_OV S1_OPEN S1_ NOTUSE S2_OV S2_OPEN S2_NOTUSE
Bit 7 (W) Bit 6 (W) Bit 5 (R) Bit 4 (R) Bit 3 (R) Bit 2 (R) Bit 1 (R) Bit 0 (R)
BIT FIELD DEFINITION DESCRIPTION
Bit 7 String #1 not
Used
Set 1 when string #1 is not used to mask string faults on the string.
Bit 6 and 7 are written to register 05h by the systems via SMBus to let the LX2260 know the
unused string so the LX2260 can remove it from the fault detection/reporting.
At power up system must disregard fault reporting and FFLAG (software timer) until the
systems has finished setting string not used bit (set bit 6 and or 7 to high) and have received
acknowledge from LX2260. LX2260 sends an acknowledgement after masking string fault.
Bit 6 String #2 not
Used Set 1 when string #2 in not used to mask string faults on the string.
Bit 5 S1_OV String 1 Over Voltage (1 = VD > 6.75V)
Bit 4 S1_OPEN String 1 Open (1 = string open)
Bit 3 S1_ NOTUSE String 1 status (1 = string is not used)
Bit 2 S2_OV String 2 Over Voltage (1 = VD > 6.75V)
Bit 1 S2_OPEN String 2 Open (1 = string open)
Bit 0 S2_NOTUSE String 2 status (1 = string is not used)
BIT FIELD DEFINITION DESCRIPTION
REGISTER 06h String 3&4 Status Register DEFAULT VALUE 0x00
String #4 not
Used
String #3 not
Used S3_OV S3_OPEN S3_ NOTUSE S4_OV S4_OPEN S4_ NOTUSE
Bit 7 (W) Bit 6 (W) Bit 5 (R) Bit 4 (R) Bit 3 (R) Bit 2 (R) Bit 1 (R) Bit 0 (R)
Bit 7 String #3 not
Used Set 1 when string #3 in not used to mask string faults on the string. Bit 6 and 7 are written to
register 06h by the systems via SMBus to let the LX2260 know the unused string so the
LX2260 can remove it from the fault detection/reporting.
At power up system must disregard fault reporting and FFLAG (software timer) until the
systems has finished setting string not used bit (set bit 6 and or 7 to high) and have received
acknowledge from LX2260. LX2260 send acknowledge after masking string fault
Bit 6 String #4 not
Used
Set 1 when string #4 in not used to mask sting faults on the string.
Bit 5 S3_OV String 3 Over Voltage (1 = VD > 6.75V)
Bit 4 S3_OPEN String 3 Open (1 = string open)
Bit 3 S3_ NOTUSE String 3 status (1 = string is not used)
Bit 2 S4_OV String 4 Over Voltage (1 = VD > 6.75V)
Bit 1 S4_OPEN String 4 Open (1 = string open)
Bit 0 S4_ NOTUSE String 4 status (1 = string is not used)
Obsolete
Q Microsemi \mnwm. Defauh LLD reference is 300mV regardless SDA/SCLK slate al FUR. Nole: l, OTP bu change slate from "U" m "l" and latched when lhe real time ()TP changes from "0" 2, T WARNING bit changes slate from "U’~ [0 "l" and latched when lhe real lime T WARNING Copyrugm c 2011 Microsemi Rev, 1 0 12/4/2012 Analog Mlxed Signal Group One Emerpnse‘ Allso Vlelo, CA 92656‘ 1-800-713-4113‘ 949-380-6100, fax 949-
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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SERIAL INTERFACE TIMING
REGISTER 07h Faults Register DEFAULT VALUE 0x00
RESERVED RESERVED RESERVED RESERVED OC SHDN OC OTP T_Warning
Bit 7 (R) Bit 6 (R) Bit 5 (R) Bit 4 (R) Bit 3 (R/W) Bit 2 (R) Bit 1 (R/W) Bit 0 (R)
BIT FIELD DEFINITION DESCRIPTION
Bit 3 OC SHDN OC shutdown (1 = OCP shut down, 0 = OC SHDN OK). Reset after reading or by En = Low
Bit 2 OC Input OC (1 = over current condition, 0 = OC OK). Reset after reading or by En = Low
Bit 1 OTP OTP Shutdown (1 = OTP shut down, 0 = TO
K
). (note 1)
Bit 0 T WARNING Temperature warning (1 = TWARNING, 0 = TO
). (note 2)
REGISTER 08h ILED Setting Register DEFAULT VALUE 0x7F
ADIM Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Bit 7 (R/W) Bit 6 (R/W) Bit 5 (R/W) Bit 4 (R/W) Bit 3 (R/W) Bit 2 (R/W) Bit 1 (R/W) Bit 0 (R/W)
BIT FIELD DEFINITION DESCRIPTION
Bit 7 ADIM Analog Dimming Mode setting (0 = OT, 1 = ADIM)
Bit 6:0 ILED bit6:0 To program LED current setting reference voltage, see note below.
Default LED reference is 300mV regardless SDA/SCLK state at POR.
Note:
1. OTP bit change state from “0” to “1” and latched when the real time OTP changes from “0” to “1”.
2. T WARNING bit changes state from “0” to “1” and latched when the real time T WARNING change from “0” to “1”.
Register 08h: LED Peak Current Adjustment (7 bits used for 128 steps)
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 V
IS
(mV)
000000046
000000148
000001050
000001152
000010054
1111110298
1111111300
Obsolete
Q Microsemiz# iUWLi i F TV 7 oopyngm c 2011 Mic Rev, 1 0 12/4/2012 Ana‘og wa One Emerpnse‘ Ahso Vwelo. CA 9265& 1-5
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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SERIAL INTERFACE TIMING
Timeout Measurement Interval
Faults Timing Diagram
FFLAG
OTP bit
READ
OTP Timing (Bit 1, Reg 07h)
FFLAG stays low when the chip is in over temperature shutdown mode.
OTP bit is latched by over temperature warning signal.
FFLAG and OTP reset after reading and real time OTP is low. (Real time OTP not show)
There are some Tdelay (Td) from real time OTP “1” to set OTP & FFLAG, as well as from end read cycle to reset
OTP and FFLAG. Td must < 1µsec.
This timing diagram shows relationship between Over temperature Shutdown output and OTP bit, FFLAG only
without any other fault conditions. In an actual application, FFLAG will not represent Over Temp Shutdown from
temperature monitor because FFLAG is a NORed output of all faults and over temperature warning is always true
when Over Temp Shutdown is true.
Td Reset after reading, and set back by real time OTP
Over Temp Shutdown
FFLAG is a real time indication of over temp shutdown
TLOW.SEXT
TLOW.MEXT TLOW.MEXT TLOW.MEXT
SMBus Data
(SDA)
SMBus Clock
(SCL)
Start Stop
SclAck SclAck
Obsolete
LX2260 Q Microsemi PRODUCTION DATASHEET 0C Timing 4 (53?; 2) / u 3 (— ‘éfiii'm _ READ K w H H H FFLAG Text Text Tex‘ Text FFLAG is Low whenever 00 or DC SHDN nccurs and extended by an internal timer. OC and FFLAG register bits are reset after reading. (Real time OC not shown) Fault bits are set back when (he iauli conditions present. T Warning Timing (bit 0 Reg 07h) T WARNING I TWARNING ‘ I . “ (BIID) . 1' 1— : R set after reading, and setback by reaI time T warning READ H H H . 47Td FFLAG 4 '4 4 FFLAG is Low whenever T Warning occurs. T Warning bit is reset after read access and when real time T warning is low. There are some Tdelay (Td) from real time T WARNING “1" to set T WARNING & FFLAG, as well as from end read cycle 10 reset T WARNING 8| FFLAG. Td must < 1psec.="" copyrlght="" c="" 2011="" mic="" 5="" rev,="" 1="" 0="" 12/4/2012="" anaiog="" mix="" one="" enterpnse.="" aiiso="" vieiu.="" ca="" 92656.="" 1-8="">
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 1
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SERIAL INTERFACE TIMING
Obsolete
Q Microsemi String Status 47m SxiNOTUSE 4 SLOPEN sLov H H K fl (\ fl FFLAG Trig» Re—cyc‘e ENNCC FFLAG is Low whenevef Stnng 0V or String OPEN occurs. FFLAG reset after reading. Strmgs status are latched and be reset by recycling EN signal or Vcc There are some Tdelay (Td) from Slnng OPEN/0V mgh to set FFLAG. as we“ as from re-cyc‘e ENNCC to reset String OPEN/0V and FFLAG. Td must<1psec. w9="">
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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SERIAL INTERFACE TIMING
Strings Status Timing Diagram
Obsolete
Q Microsemiz# R [mfl] lpk 10A 120% «20m (1/ vaI AM) (V‘fvl VU/UA) W9
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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THEORY OF OPERATION
Introduction
The LX2260 is a fixed frequency current-mode PWM
controller designed to regulate the necessary voltage to drive
an LED array. Depending on the input voltage and the
required LED string voltage, the LX2260 will decide to
operate in boost converter mode, buck converter mode, or
buck-boost converter mode with fixed switching frequency
from 400kHz to 800kHz, which is programmed by an
external resistor. In all modes of operation the LX2260 will
regulate to the lowest drain voltages (typ. 0.9V) to minimize
the power loss through the external current sink NFETs.
Current Sense Resistor Selection
The voltage across an external input current sense resistor
is used for limiting the switching current (coil current)
cycle-by-cycle. For  = 10A (recommended), then
 100

100
10  10mΩ
Inductor Selection
To keep the circuit in constant current mode (CCM), the
maximum ripple current should be less than twice the
minimum load current. The final value of the inductor will
be a compromise between buck and boost modes. Due to
the effect of RHP zero on Error Amplifier compensation,
select the minimum load = IOUT. The following formulae
should be used to calculate the inductor values in both buck
and boost modes.
Minimum inductor value for boost converter:
Where fS 600kHz

 ·


·
· 
·%
Where VIN VO/2, %I = I/IO
Minimum inductor value for buck converter:

·


·
· 
·%
Where VIN VI(MAX), %I = I/IO
The actual mode transition threshold can be calculated by
the following equations:
Buck-Boost to Buck = VLED 0.9*VCC-1.6 [V]
Buck to Buck-Boost = VLED 0.9*VCC-2.4 [V]
Buck-boost to Boost = VLED 1.11*VCC+1.34 [V]
Boost to Buck-Boost = VLED 1.11*VCC+0.44 [V]
Slope Compensation.
LX2260 operates in fixed frequency CCM mode.
Therefore, in some conditions, the duty cycle may extend
beyond 50%. This condition will cause sub-harmonic
instability. The cure for this is adding an additional ramp
current. An external resistor (minimum 100k) will set the
ramp current for the internal current slope compensation
circuit.
Use the following equation to set the external resistor for
the slope compensation:
Ω 66.7  μ
Ω
Start-up
The start-up or wake-up is controlled to minimize inrush
or to eliminate the starting surge current required from the
input power supply. EN pin input is always alive, therefore
the LX2260 consumes a minimal amount of current even
when the chip is in sleep mode (EN=low).
LX2260’s start-up time is set by an external capacitor
CCSS, VLED, the highest VDS , and PWM duty cycle (DPWM).
During start-up, CCSS is charged up at 120µA until lowest
VD reaches to 700mV. Use the following equation to
estimate the start up TSU where DPWM is in decimal number.
 μ
 1

_
120μ 20 
To speed up the startup time with low PWM duty cycle,
user may try to stagger the PWM inputs so that the DC/DC
converter stays active for an extended time. The LX2260’s
DC/DC converter is active when any of the active string’s
PWM inputs are high.
Over Current and Over Current Shutdown (OC SHDN).
In any mode of power conversion or any test condition,
once over current (OC) is detected, the PDRV turns off for 4
switching clock cycles and then resumes operation. An
internal 4 event counter accumulates the number of over
current triggers that happen within 128 clock cycles. In
other words, the 4 event counter is reset by 1/128 clock. At
the 4th over current event (in case there is the 1/128 reset
coming before the 4th trigger, total number of over current
triggers that cause shutdown became more than 4), the chip
shuts off the DC-DC converter and discharges CSS
capacitor to 75mV. The chip resumes operation thereafter.
If the over current condition is still present, the chip repeats
the shut down and recovery cycle. The status of over current
(OC) will set Bit 2 of register 07h to “1”. Bit 2 will reset
after reading.
Obsolete
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LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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THEORY OF OPERATION- CONTINUTED
Over Temperature Protection (OTP).
In any mode of power conversion or any test condition,
once over OTP is detected (typical is 150°C), the LX2260
will shutdown. The status of OTP will set Bit 1 of register
07h to “1”. Bit 1 will reset after reading in real time and
OTP is low. System will resume operation when
temperature drops below the shutdown recovery threshold
voltage (typical is 130°C).
Temperature Warning (T_Warning).
In any mode of the converter or any test condition, once
T_warning is detected (typical is 120°C), the status of
T_warning will set Bit 0 of register 07h to “1”. Bit 1 will
reset after reading in real time that T_Warning is low.
Fault Flags:
The following faults will set the FFLAG to “Low”, and
be reset either by after reading via SMBus. The fault output
is intended to stay low for an extended period after internal
faults are cleared. The timer is 8mS typical with 100k on
FS pin.
Fault
Condition Register
/Bit Reset By Notes
String over
voltage
Register
05h &
06h, bit 2
& 5
Toggle
EN or VCC
When
VD
>6.75V
String Open
Register
05h &
06h, bit 1
& 4
Toggle
EN or VCC
When
VD
<0.2V
T-WARNING
Register
07h
bit 0
After
reading &
real time T
WARNING
is Low
OTP
Register
07h
bit 1
After
reading &
real time
OTP is Low
OC
Register
07h
bit 2
After
reading &
real time OC
is Low
OC SHDN
Register
07h
bit 3
After
reading &
chip resumes
start up
5V Regulator
The 5V regulator generates 5V from VCC to the internal
low voltage circuit and also provides power for an external
light sensor (such as LX1973). Maximum output current is
limited to 2mA for the external devices. The 5V output
requires at least 0.1µF connected across VL pin and GND
for phase compensation. A 1µF capacitor is recommended
and should be placed near the VL and tied to the GND
plane. The 5V is shut off while the chip is in sleep mode
(EN = low).
VCC-5.25V Regulator
VCC-5.25V (VH) is a floating VSS for the low voltage
circuits residing across VCC and VH. During start up, VH
is turned on after VL gets ready.
POR
POR is cleared 100µS (typ.) after VH exceeds internal
VH UVLO threshold.
LED Current Profiler
The OT input is a comparator with a threshold of 2V. It
interfaces to an external NTC thermistor incorporated
mechanically into the light bar or in close proximity to it. If
the LED ambient temperature gets hot, the thermistor will
sense it and decrease in resistance. This will in turn increase
the OT pin voltage, and then the current sink will decrease
the LED current in proportional with voltage at OT pin. The
minimum of LED current when VOT reaches 4V is of 5%
of LED current setting. If this feature is not used, then this
pin should tie to GND.
If Minimum VDS is more than 2V, then both PFET and
NFET will be active to regulate LED current to minimum
level.
SOA of 180mA white LED from Nichia # NFSW036BT
Obsolete
Q Microsemi 5V mo ‘ mmsc M250 OT R1 R oopyngm c 2011 Mic Rev, 1 0 12/4/2012 Ana‘og wa One Emerpnse‘ Ahso Vwelo, CA 92656‘ 1-8
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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THEORY OF OPERATION- CONTINUTED
Set series resistors with NTC to
have VOT = 2V at start of
compensation point.
1 2

3
PWM Dimming
The LED string currents are individual controlled directly
by PWM input. A high on PWM input enables the output
current.
DC Dimming (for application only)
DC dimming can be achieved, but not independently. In
this mode, all the PWM inputs must be tied to VL, while the
DC control signal goes to OT pin. The DC input range from
2V to 4V corresponding from 100% to 5% of LED current
setting.
OVP
Two external resistors (RDOWN & RUP) program the
LX2260’s OVP level. The threshold is set to 2V (typical) at
the OVP pin. When the OVP voltage threshold is reached it
will stop the power converter from switching and then
resume when the OVP pin voltage drops below the 2V
threshold. The OVP function is active whenever the EN
signal is high regardless the LED current condition.
 2    

LED Open/Short Detection
In case a LED fails open or an opened string, the VD pin
drops down to 0V. The power converter will try to raise the
VLED under this condition. The open string will then latch
off when VLED voltage reaches 100% of OVP setting. At
latch off this string’s VD pin voltage is excluded from the
power supply regulation loop. The power converter will
stop switching until the highest VD pin voltage drops below
2V and the OVP pin voltage is less than 2V. Any change in
the VLED voltage should have minimum impact to the LED
output current since they are current source outputs. LED
short protection is temporarily disabled when one or more
open strings are detected. This allows VD to go beyond the
LED short protection threshold of 7.25V (typ.). After
successful latch off of any open string the VD voltage
returns to a normal regulation level. The LX2260 reduces
the LED current reference voltage to about 10% while VD
>7.25V to avoid the external FET from overheating. The
LED current returns to normal level when VD voltage gets
below 7.25V. Cycling power or the EN input will reset any
latched off VD pin.
User must tie VG pin to GND for any unused string to
distinguish between string failed open and strings unused.
In this situation any string that has VD higher than the LED
short threshold voltage will not be latched off and not be
reported with VD is higher than 6.75V.
The LED short fault is masked when any of VD is below
open LED detection threshold until such string is latched
off. Broken PWM input lines will be checked during start
and reported as corresponding strings open
In case of the LED short condition, LX2260 output works
normally until the VD voltage reaches the LED short
threshold voltage, and the corresponding string is turned off.
LED short protection works this way when there are more
than two active strings and the lowest VD regulation is at
normal level (0.24V<VD<2V). This allows the VD voltage
to go beyond the LED short threshold in case of an open
string or temporary instability on VLED output. When there
is only one active string in the system, the last string is
latched off when VD voltage reaches to 7.25V. VD of the
latched off strings are excluded from the power converter
regulation loop.
Note: The size of NFET current sink must increase to
handle LED short or VD voltages in excess of the LED short
threshold voltage. Otherwise, the relative PWM input duty
cycle must be reduced if smaller NFET is used.
I_LED compensation Vs LED Tamb.
Therm: K = 4250, Rt = 100K@25C.
SOA curve of 180mA WLED from Nichia With ThetaJ_max = 125C
0.0
12.9
25.8
38.7
51.6
64.6
77.5
90.4
103.3
116.2
129.1
142.0
154.9
0.16
0.21
0.27
0.35
0.43
0.54
0.66
0.80
0.96
1.14
1.34
1.54
1.76
1.93
2.22
2.45
2.67
2.88
3.09
3.28
3.46
3.62
3.77
3.91
4.03
V_TO (V)
LED current (mA)
0
10
20
30
40
50
60
70
80
90
100
110
120
LED ambient temperature.
I-LED
150mA SOA
Tamb
Obsolete
Q Microsemi 27! v I v L v V ZHRC 3.3 21! a C a F R [n] 27! v C v F ZTICF ZTICF Copyrugm c 2011 Mic Rev, 1 0 12/4/2012 Ana‘og wa One Emerpnse‘ Ahso Vwelo, CA 92656‘ 1-8
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 20
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THEORY OF OPERATION- CONTINUTED
Current Source Driver
This is the current source driver for the external LED
current sink NFET. The driver output VGx, and the
feedback signal ISx will regulate the LED current through
an internal op amp with a 300mV band gap (current source
reference), for unused string will tie VG to ground. The
lowest drain voltage of any external current sink NFET is
used to regulate the boost, buck, or buck-boost voltage
output. All the drains will report back to host computer
through the SMBus to determine the strings status (number
of shorted LED, open LED) The LED current matching
between strings is 1.5% when matched with an external
current sense resistor whose tolerance is 0.1% at room
ambient temperature. The IC specifies voltage only at ISx
pin and the voltage matching is +/-1.5%.
  300
 Ω
Where RIS tolerance must be 1% or less for better matching.
LED Output Current Rise/Fall Time Control
LX2260’s LED output current rise/fall time can be
programmed by one external resistor connected between
SLOPE and GND.
Rise/Fall time can be calculated by:
RSLOPE [k] = 20*TR or TF [µs]
Recommended use 20k and greater resistor.
Connect SLOPE pin to VL when slope control is not
used. 5V on SLOPE pin selects an internal 20k
For long cable from VLED and VDS to LED assembly, the
minimum TR and TF must be selected based on wire
inductance to minimize the LED current ringing.
TR or TF [sec] 10 * LWIRE [H] * ILED [A]
Error Amplifier Compensation
RCOMPT, RCOMPK, and CCOMPx, configure the error amplifier
gain characteristics to accomplish a stable voltage loop gain.
One advantage of current mode is the ability to close the
loop with only two feedback components RCOMPx, and CCOMPx
Additional, there is a right-half plane zero (RHPZ)
associate with the modulator.
The lowest RHPZ occurs at minimum VIN for Boost
mode and is maximum VIN for Buck/Boost mode at
maximum load.
In boost mode, the components RCOMPT, and CCOMPx will be
selected to set a zero about 30% of RHPZ frequency.
Where
 
 ²
2  

1
2 
3.3
OR
 3.3
2  

While RCOMPK is for both Buck and Buck/Boost mode.
Therefore, RCOMPK must be selected to satisfy for both cases.
In this case, the frequency of RHPZ of Buck/Boost is much
higher than the desire Buck compensation network zero.
Therefore,
 250
2 
Adjustment may have to be made to ensure stability in the
actual circuitry.
Increasing RCOMPx while proportionally decreasing CCOMPx
will yield higher error amplifier gain or vice versa.
For the design optimize, select CCOMPx = 1nF.
For Boost design example with
VOUT = 25V, VIN_MIN = 6V
IOUT = 0.6A, L = 15µH,
CCOMPx = 1nF, FSW = 600Khz
_ 25.5
 3.3
2
20.6Ω
And
 250
2

66.3Ω
Input Capacitors
Since the Vin pin is supply voltage for the IC. It is
recommended to place a 4.7uF or higher with low ESR bypass
capacitor. If the power source is long distance, then bulk
parallel capacitors are needed to reduce input voltage ripple
that may affect the transition mode voltage.
Obsolete
Q Microsemi ’«F «F LX2260 PRODUCTION DATASHEET T pical Operating Characteristics 12 m 901‘) lccgsl ea 6 a 10 -0—\s\een;50'c -o-x5xeep,2s~c +wsxeepguu-c 420 403 396 354 an mu m 336 324 312 300 W—lczirSO'C -0—lc:725“( —o—|u mn'c |_Quiescem (mA) Vin (v) oopyngm c 2011 Rev, 1 0 12/4/2012 12 14 15 13 20 22 24 25 23 Vin(V) Mic Ana‘ogMIx One Emerpnse‘ Allso Vwelo, CA 332656 1-5
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 21
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THEORY OF OPERATION- CONTINUTED
Output Capacitors
The bulk parallel of capacitors are set to reduce the ripple due
to charge into capacitors each cycle. The following formulae
are use for Boost and Buck in steady state:
% 
 –
 100
 

²
 %
% 
 –
 100
 
 
  %
Where
COUT = Output capacitor in Farad
F = Switching frequency in Hz
To handle the transient response of the converter, the
output capacitors is usually larger than the calculation.
Typical Operating Characteristics
SLEEP CURRENT VS. VIN QUIESCENT CURRENT VS. VIN
0
1
2
3
4
5
6
7
8
9
10
11
12
6 8 10 12 14 16 18 20 22 24 26 28
Icc_sleep(µA)
Vin(V)
Isleep_50°C
Isleep_2C
Isleep_100°C
3.00
3.12
3.24
3.36
3.48
3.60
3.72
3.84
3.96
4.08
4.20
6 8 10 12 14 16 18 20 22 24 26 28
I_Quiescent(mA)
Vin(V)
Icc_50°C
Icc_25°C
Icc_100°C
Obsolete
Q Microsemi. PRODUCTION DATASHEET Typical Operating Characteristics - continued 525 15511 525 1979 515 1575 S 515 1574 - 505 _ 1572 E 555 a 1575 3 g 1955 @1 595 > —o—vr5;50'c ; Ago ”55 -o-vr5725'c 1554 +551511-c 515 $51,552 1552 Am 'o-VUS'C 1959 +511ao 570 1: 555.4 555 5551 56 0 +V5n5_550' 555 z 55 5 -°-VS"5_15‘ 555 1 -O-Vsns 100' -0-Fre 550 6550 q 5 3 10 11 14 15 13 20 22 14 25 25 6 8 m 12 14 )6 18 20 22 24 25 23 WNW) Vin(V) pical Characteristics @ 2 C and 5 LED in Series au 15 I u u ": 055551 E 05.55551 2 5 : g +5.5 E E A u 5 5 5 5 15 55 5.1 15 55 55 15 55 155 125 115 155 15115 5.515.511 1. W 9 Microseml Page 22 Ana‘og Mixed Signal Group 11510, CA 92656. 1-500-713-4113. 949-350-5190, fax 949-215-4995
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 22
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Typical Operating Characteristics - continued
VL@15MA LOAD VS. VIN VFS VS. VIN
SENSE VOLTAGE VS. VIN SWITCHING FREQUENCY VS. VIN
Typical Characteristics @ 25°C and 5 LED in Series
SYSTEM EFFICIENCY VS. LED CURRENT STRINGS CURRENT ACCURACY VS. LED
CURRENT (ADIM BOOST MODE)
4.75
4.80
4.85
4.90
4.95
5.00
5.05
5.10
5.15
5.20
5.25
6 8 10 12 14 16 18 20 22 24 26 28
VL@15mA(V)
Vin(V)
VL_50°C
VL_25°C
VL_100°C
1.958
1.960
1.962
1.964
1.966
1.968
1.970
1.972
1.974
1.976
1.978
1.980
6 8 10 12 14 16 18 20 22 24 26 28
Vfs(V)
Vin(V)
Vfs_50°C
Vfs_25°C
Vfs_100°C
95.0
95.5
96.0
96.5
97.0
97.5
98.0
98.5
99.0
99.5
100.0
6 8 10 12 14 16 18 20 22 24 26 28
Vsns(mV)
Vin(V)
Vsns_50°
Vsns_25°
Vsns_100°
656.0
656.1
656.2
656.3
656.4
656.5
656.6
656.7
656.8
656.9
657.0
6 8 10 12 14 16 18 20 22 24 26 28
Freq(kHz)
Vin(V)
Freq
85
86
87
88
89
90
91
92
93
94
150 300 450 600
Efficiency (%)
LED Current (mA)
Boost
Buck/Boost
Buck
8.0
6.0
4.0
2.0
0.0
2.0
4.0
0
20
40
60
80
100
120
140
160
30 45 60 75 90 105 120 135 150
Error (%)
String # current (mA)
LED Current (mA)
ILEDMeasured
%Error
Obsolete
Q Microsemi Typical Characteristics @ 25°C and 5 LED in Series - continued mm, .W, M -m <15“) 19="" ;="" xu="" u="" :="" g="" n="" n="" 5="" mm="" mm="" is="" -w,="" 5="" in="" u="" g="" i="" so="" 1.="" g="" ;="" an="" m="" m="" ‘="" ‘="" ‘n.="" u="" 7="" l="" m="" e="" m="" s;="" 60="" f="" m="" m="" a="" nngwmmn="" mm="" mu="" )3="" m="" n="" as="" m="" an="" ;="" a4="" .-="" ax="" -mum‘)="" ‘mmu="" m="" -mpw="" n="" +mr~w="" d="" 7="" ommmwu="" 1="" 5="" 15="" an="" as="" an="" 75="" 50="" ms="" m="" 135="" 130="" wu="">rurnnumm 15a ‘ 15 m L 1 1 120 > a a mm a» so an ; so 04 'm ‘0 -mwv ”5 *mwv 20 +mwy n ska-(mm o -m MamMmhmz , 5 1: 2a 45 so 75 90 ms 120 us 150 ”mm...“ m m 15 140 11 m V— as we a» so an so 04 An 03 m -mwn ,1 c :filflmw 15 15 an as so 75 an ms no 125 150 LEIN‘urrrlmmm E oopyngm c 2011 Rev, 1 0 12/4/2012 Mic Ana‘og M‘X One Enierpnse‘ Ahso V‘EJO, CA 92656‘ 1-8
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 23
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Typical Characteristics @ 25°C and 5 LED in Series - continued
STRINGS CURRENT ACCURACY VS. LED
CURRENT (BOOST MODE)
STRINGS CURRENT MATCHING
Vs. LED CURRENT (BOOST MODE)
STRINGS CURRENT ACCURACY VS. LED
CURRENT (BUCK/BOOST MODE)
STRINGS CURRENT MATCHING
VS. LED CURRENT (BUCK/BOOST MODE)
STRING CURRENT ACCURACY VS. LED
CURRENT (BUCK)
STRING CURRENT MATCHING
VS. LED CURRENT (BUCK)
0.0
0.4
0.8
1.1
1.5
1.9
2.3
2.6
3.0
0
20
40
60
80
100
120
140
160
15 30 45 60 75 90 105 120 135 150
Error(%)
String # current (mA)
LED Current (mA)
ch1(mA)
ch2(mA)
ch3(mA)
ch4(mA)
IMax%Accuracy
1.5
1.1
0.8
0.4
0.0
0.4
0.8
1.1
1.5
0
20
40
60
80
100
120
140
160
15 30 45 60 75 90 105 120 135 150
Error (%)
String # current (mA)
LED Current (mA)
ch1(mA)
ch2(mA)
ch3(mA)
ch4(mA)
IMax%Matching
0.0
0.4
0.8
1.1
1.5
1.9
2.3
2.6
3.0
0
20
40
60
80
100
120
140
160
15 30 45 60 75 90 105 120 135 150
Error (%)
String # current (mA)
LED Current (mA)
ch1(mA)
ch2(mA)
ch3(mA)
ch4(mA)
IMax%Accuracy
1.5
1.1
0.8
0.4
0.0
0.4
0.8
1.1
1.5
0
20
40
60
80
100
120
140
160
15 30 45 60 75 90 105 120 135 150
Error (%)
String # current (mA)
LED Current (mA)
ch1(mA)
ch2(mA)
ch3(mA)
ch4(mA)
IMax%Matching
0.0
0.4
0.8
1.1
1.5
1.9
2.3
2.6
3.0
0
20
40
60
80
100
120
140
160
15 30 45 60 75 90 105 120 135 150
Error (%)
String # current (mA)
LED Current (mA)
ch1(mA)
ch2(mA)
ch3(mA)
ch4(mA)
IMax% Accuracy
1.5
1.1
0.8
0.4
0.0
0.4
0.8
1.1
1.5
0
20
40
60
80
100
120
140
160
15 30 45 60 75 90 105 120 135 150
Error (%)
String # current (mA)
LED Current (mA)
ch1(mA)
ch2(mA)
ch3(mA)
ch4(mA)
IMax%Matching
Obsolete
Q Microsemi, PRODUCTION DATASHEET LX2260 $3 7n—74—u7m7e 2 2 38 37 36 35 34 32 “ ‘ U o % i E E E 1 > z & o A 31 J7— GND % > VD4 Isa 2 vs4 30 \~ cu M ICOMP :13 m 3 ISA 29 H COMPT M1 5; 4 06 COMPK v03 28 5v W” 5 (:33 W33 27 \% °‘ :; w ‘ 6 Down Bond Isa 26 u ‘3‘; 4 VL Connectionlo Nvl GND 1 OFSNI 7 EN 4 v02 25 we R“ i 24—] 05 “Mme 2:42:30 8 OT/AD‘M V62 2L“ 5;: m 9 F5 '32 23 m. 10 22 4 SLOPE 38 QFN 5x7 V01 11 SDA v01 21—] 12 SCLKg E g E E E |S1 20 t E n. n. u. <( 16="" 17="" 9="" copyrugm="" c="" 2011="" mic="" rev.1="" 0="" 12/4/2012="" ana‘og="" wa="" one="" emerpnse‘="" ahso="" vwelo,="" ca="" 332656="" 1-8="">
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 24
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TYPICAL APPLICATION CIRCUITS
Auto Tri-Mode Converter (VO < VIN <VO)
The component values are for reference only
Obsolete
Q Microsemi, 8V728V m i M} l «tum; $4.53“; ‘- M x x S; x x x w. , m ‘ ‘ ‘ ‘ 0%; L; j m N {A g *x 38 371736 35 ‘34 33 32 «. x x ‘x L|J .— n. 8 m g m E B > 1 > E 51L 0 5' O 31 TGND U, v04 Six 2 V64 30 \E} m ICOMP 29 :3 3 |S4 C5 iCOMPT ””17 w 5; 4 H COMPK v03 28 m w H H 5 css veg b 0* 7T7 w ‘ 6 Down Bond I53 26 2" 13} i VL Connecfion to l NEH EN GED v02 25 mugsc "" 7 VG2 24 05 323250 OT/ADIM 3‘: R11 5‘; 9 I52 23 ‘* FS 10 22 g SLOPE 38 QFN 5x7 VD1 45m VG1 21 m 12 ‘— 20 2o SCLK % E g g g g |s1 "LLL E n. n. n. <( 1="" 47;="" gnd="" oopyngm="" c="" 2011="" rev,="" 1="" 0="" 12/4/2012="" mic="" ana‘og="" wa="" one="" emerpnse‘="" ahso="" vwelo.="" ca="" 332656="" 1-5="">
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 2
5
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TYPICAL APPLICATION CIRCUITS
Buck Mode Converter (VIN > VO)
The component values are for reference only
Note: A resettable fuse at VIN is needed for protection when output short to ground occurs.
Obsolete
Q Microsemi, 1M 6V728V m (‘1 }7 K. “3 1.15;; T m 38 37T36 ‘35 34 33 32 8 % E 'u‘: E B % > Z “- D —l 0 GND 5 'l > v04 VG4 ICOMP Is4 COMPT COMPK v03 (:85 ves Down Bond |s3 VL Connection to GND EN é v02 VG2 OT/ADIM 132 FS 22 SLOPE 38 QFN 5x7 V01 21 SDA ve1 ‘2 SCLKE E E E ‘2’ n: '5120 d E 3 B B 13 LL D. D. D. D. <‘( 617="" oopyngm="" c="" 2011="" rev,="" 1="" 0="" 12/4/2012="" mic="" anamg="" m1x="" one="" emerprm="" ahso="" v1510,="" ca="" 926561="" 1-5="">
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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TYPICAL APPLICATION CIRCUITS
Boost Mode Converter (VIN < VO)
The component values are for reference only
Note: A resettable fuse at VIN is needed for protection when output short to ground occurs.
Obsolete
LX2260 Q Microsemi PRODUCTION DATASHEET svrzav ‘ F xxx uJII— D 8w>wimg 1>E EL05-0 w 4n—va— i GN é EEEEEK diiiifl |.Lfl.fl.D-EL< 4’="" gnd="" oopyngm="" c="" 2011="" mic="" rev,="" 1="" 0="" 12/4/2012="" ana‘og="" wa="" one="" emerpnse‘="" ahso="" vwelo.="" ca="" 92656‘="" 1-5="">
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
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TYPICAL APPLICATION CIRCUITS
Boost Mode Converter (Vin < Vo) for RGB LEDs
1
2
6
38 33
ICOMP
VL
6V – 28V
VD1
21
22
34
10m
32
VG1
IS1
38 MLPQ 5x7
9
8
3
FS
7
13
20
36
4
VD2
24
25
VG2
IS2 23
VD3
27
28
VG3
IS3 26
OT/ADIM
5
EN
COMPT
14 15 16
COMPK
37 35
17 18 19
SLOPE
GND
12
11
10
SDA
SCLK
VD4
30
31
VG4
IS4 29
CSS
5V
NTC
100k@25C
B=4250
ON
OFF
R1
Q1
L1
D1
2A/50V
C2
2x4.7uF
R2
R3
C3
0.1uF
C4
1.0uF
Q3
Q4
Q5
R4
R6
R8
R9
R10
RT1
R12
15k
R13
100k
R14*
C1
4x4.7uF
C5
C6
4.7µF
C7
1.0uF
Vo (B&G)
C9
4.7uF
Vo (Red) < Vo (B&G)
Down Bond
Connection to
GND
The component values are for reference only
Obsolete
Q Microsemi, PRODUCTION DATASHEET LX2260 35 (NEG 35 34 33 32 %« +~ ‘?“?““‘r“ a“ U UJ I F > a) m V 1 g z > 3L 5 GND “,5 3; 2 c5 R5 ICOMP H COMPT 6'" ‘ COMPK was 23 5 CSS V63 27 \H m 26 Q”: 5 Down Bond I33 5V VL Connection to GND OF‘ENI 7 EN 4 v02 25 we W T 24 ‘ as 1w®2x N H25” 3 OT/ADIM V62 R‘D m m 23 m .3 mm ISZ l 9 FS 10 SLOPE “OWE,” vm 22 21 as H SDA V61 4 12 (3 x7 SCLK S E E a 13 1 oopyngm c 2011 Rev, 1 0 12/4/2012 Mic Ana‘og wa One Emerpnse‘ Ahso Vwelo, CA 92656; 1-8
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 2
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PCB LAYOUT GUIDELINES
1. The Input power filter capacitors for the converter, they need to tie to power ground plane (PGND)
2. The input current sense must use Kevin trace directly from sense resistor to SENSE pin. The same method for VLED, it
must be connected at the output capacitors.
3. The coupling capacitor for VL must be closed to VL pin.
4. All switching NFET, PFET , inductor, current sense resistor, and rectifier diodes must be closed together with heavy traces
to have small power return loop to minimize switching noise.
5. Place all compensation components close to their pins possible.
6. Analog ground and power ground tie to a point at IC case ground
7. All the ground side of sense resistors who connect to ISx pin must be tie together to a point before tie to ground
pin (pin19) as shown below.
8. Refer to LX2260EV3 board for an example of proper board layout.
Obsolete
Q Microsemiz# 4 p O \ U U U U U U U :> C :> C :> C :) C :) C :> C I) C :) C j C D C D C 3 C C' 0 H H fl 0 H H +1 1+ ; 1 AT} +11 T oopyngm a, 2011 Mic 9 Rev, 1 0 12/4/2012 Ana‘og wa One Enterpnse‘ Ahso Vwelo, CA 92656‘ 1-8
LX2260
PRODUCTION DATASHEET
Microsemi
Rev. 1.0 12/4/2012 Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 2
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PACKAGE DIMENSIONS
LQ 38-Pin Plastic QFN (5x7mm) Exposed Pad
Note:
1. Dimensions do not include mold flash or protrusions;
these shall not exceed 0.155mm(.006”) on any side.
Lead dimension shall not include solder coverage
Dim MILLIMETERS INCHES
MIN MAX MIN MAX
A 0.80 1.00 0.031 0.039
A1 0 0.05 0 0.002
A3 0.20 REF 0.008 REF
b 0.18 0.30 0.007 0.011
D 5.00 BSC 0.196 BSC
D2 3.00 3.25 0.118 0.127
E 7.00 BSC 0.275 BSC
E2 5.00 5.25 0.196 0.206
e 0.50 BSC 0.019 BSC
L 0.30 0.50 0.012 0.020
e
A1 A3
E
D
b
1
2
3
E2
D2
L
PRODUCTION DATA – Information contained in this document is proprietary to
Microsemi and is current as of publication date. This document may not be modified in
any way without the express written consent of Microsemi. Product processing does not
necessarily include testing of all parameters. Microsemi reserves the right to change the
configuration and performance of the product and to discontinue product at any time.
Obsolete

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