NCP1521B Datasheet by ON Semiconductor

VINT‘ l VIN CIN 2 GND WLE EN Figure 1. Typical Application — TSOP—S m Semlcnnduclar Companenls lndusmes‘ me. am August, 2019 — Rev. 6 u_ ON Semiconductor“3 g5 n n LI'LILI OFF ON _ I] EN FEE EIGND I: El VIN GND 4 l— RI Puhllcalion D

August, 2019 − Rev. 6

1Publication Order Number:

NCP1521B/D

NCP1521B

Buck Converter - DC-DC

1.5 MHz, 600 mA

The NCP1521B step−down DC−DC converter is a monolithic

integrated circuit optimized for portable applications powered from one

cell Li−Ion or three cell Alkaline/NiCd/NiMH batteries. The part,

available in adjustable output voltage versions ranging from 0.9 V to

3.9 V, is able to deliver up to 600 mA. It uses synchronous rectification

to increase efficiency and reduce external part count. The device also

has a built−in 1.5 MHz (nominal) oscillator which reduces component

size by allowing smaller inductors and capacitors. Automatic switching

PWM/PFM mode offers improved system efficiency.

Additional features include integrated soft−start, cycle−by−cycle

current limiting and thermal shutdown protection. The NCP1521B is

available in a space saving, low profile TSOP5 and UDFN6 packages.

Features

•Up to 96% Efficiency

•Best−In−Class Ripple, including PFM Mode

•Sources up to 600 mA

•1.5 MHz Switching Frequency

•Adjustable Output Voltage from 0.9 V to 3.9 V

•Synchronous Rectification for Higher Efficiency

•2.7 V to 5.5 V Input Voltage Range

•Low Quiescent Current

•Shutdown Current Consumption of 0.3 mA

•Thermal Limit Protection

•Short Circuit Protection

•All Pins are Fully ESD Protected

•This is a Pb−Free Device

Typical Applications

•Cellular Phones, Smart Phones and PDAs

•Digital Still/Video Cameras

•MP3 Players and Portable Audio Systems

•Wireless and DSL Modems

•Portable Equipment

•USB Powered Devices

GND

VIN

LX 5

FB 4

OFF ON

VIN

CIN COUT

Cff

Figure 1. Typical Application − TSOP−5

L VOUT

GND

VIN

FB 6

GND 4

OFF ON

VOUT

VIN

Figure 2. Typical Application − UDFN6

TSOP−5

SN SUFFIX

CASE 483

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MARKING

DIAGRAM

Device Package Shipping†

ORDERING INFORMATION

NCP1521BSNT1G TSOP−5

(Pb−Free)

3000/Tape & Reel

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

GAL = Specific Device Code

A = Assembly Location

Y = Year

W = Work Week

G= Pb−Free Package

(Note: Microdot may be in either location)

GALAYWG

ZCMG

UDFN6

MU SUFFIX

CASE 517AB

ZC = Specific Device Code

M = Date Code

G= Pb−Free Package

(Note: Microdot may be in either location)

NCP1521BMUTBG UDFN6

(Pb−Free)

3000/Tape & Reel

NCP1521BMUTAG UDFN6

(Pb−Free)

3000/Tape & Reel

III—I I—- GND 1 2 1 Iuw J LOGIC Enable CONTROL '2'“ a THERMAL :3 SHUTDOWN REFERENCE : VOLTAGE http://onsemi.com 2

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IOUT (mA)

EFFICIENCY (%)

Figure 3. Efficiency vs. Output Current

50%

55%

60%

65%

70%

75%

80%

85%

90%

95%

100%

0 100 200 300 400 500 600 700

VOUT = 3.3 V

VIN = 4.2 V

TA = 25°C

GND

VIN

Vbattery

4.7 mF

Enable

LOGIC

CONTROL

& THERMAL

SHUTDOWN

PWM/PFM

CONTROL

ILIMIT

REFERENCE

VOLTAGE

10 mF

18 pF

2.2 mH

Figure 4. Simplified Block Diagram

E_|__|_ j_|__|_

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PIN FUNCTION DESCRIPTION

Pin No.

TSOP5

Pin No.

UDFN6 Pin Name Type Description

1 3 VIN Analog /

Power Input

Power supply input for the PFET power stage, analog and digital blocks. The

pin must be decoupled to ground by a 4.7 mF ceramic capacitor.

22, 4 GND Analog /

Power Ground

This pin is the GND reference for the NFET power stage and the analog sec-

tion of the IC. The pin must be connected to the system ground.

3 1 EN Digital Input Enable for switching regulators. This pin is active HIGH and is turned off by

logic LOW on this pin. Do not let this pin float.

4 6 FB Analog Input Feedback voltage from the output of the power supply. This is the input to the

error amplifier.

5 5 LX Analog Output Connection from power MOSFETs to the Inductor.

Figure 5. Pin Connections − TSOP5 Figure 6. Pin Connections − UDFN6

(Top View)

VIN

GND

VIN

GND

PIN CONNECTIONS

5LX

MAXIMUM RATINGS

Rating Symbol Value Unit

Minimum Voltage All Pins Vmin −0.3 V

Maximum Voltage All Pins (Note 2) Vmax 7.0 V

Maximum Voltage EN, FB, LX Vmax VIN + 0.3 V

Thermal Resistance, Junction −to−Air

(with Recommended Soldering Footprint) TSOP5

UDFN6

RqJA

300

260

°C/W

Operating Ambient Temperature Range TA−40 to 85 °C

Storage Temperature Range Tstg −55 to 150 °C

Junction Operating T

emperature

Tj−40 to 125 °C

Latch−up Current Maximum Rating (TA = 85°C) (Note 4) Lu $100 mA

ESD Withstand Voltage (Note 3)

Human Body Model

Machine Model

Vesd

2.0

200

Moisture Sensitivity Level (Note 5) MSL 1 per IPC

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended

Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = 25°C.

2. According to JEDEC standard JESD22−A108B.

3. This device series contains ESD protection and exceeds the following tests:

Human Body Model (HBM) per JEDEC standard: JESD22−A114.

Machine Model (MM) per JEDEC standard: JESD22−A115.

4. Latchup current maximum rating per JEDEC standard: JESD78.

5. JEDEC Standard: J−STD−020A.

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ELECTRICAL CHARACTERISTICS (Typical values are referenced to TA = +25°C, Min and Max values are referenced −40°C to +85°C

ambient temperature, unless otherwise noted, operating conditions VIN = 3.6 V, VOUT = 1.2 V, unless otherwise noted.)

Rating

Symbol Min Typ Max Unit

TSOP UDFN

VIN PIN

Input Voltage Range 1 3 VIN 2.7 −5.5 V

Quiescent Current, PFM No Switching 1 3 Iq ON −30 45 mA

Standby Current, EN Low 1 3 Iq OFF −0.2 1.5 mA

Undervoltage Lockout (VIN Falling) 1 3 VUVLO 2.2 2.4 2.55 V

EN PIN

Positive going Input High Voltage Threshold, EN0 Signal 3 1 VIH 1.2 − − V

Negative going Input High Voltage Threshold, EN0 Signal 3 1 VIL − − 0.4 V

EN High Input Current, EN = 3.6 V 3 1 IENH −2.0 −mA

OUTPUT

Output Voltage Accuracy (Note 6)

Ambient T

emperature

Overtemperature Range

VOUT

−

−3.0 $1.0

$2.0

−

3.0

Feedback Voltage Threshold 4 6 VFB −0.6 −V

Minimum Output Voltage VOUT −0.9 −V

Maximum Output Voltage VOUT −3.3 −V

Maximum Output Voltage for USB or 5 V Rail Powered Applications

Vin from 4.3 V to 5.5 V (Note 7)

VOUT

−3.9 −

Output Voltage load regulation Overtemperature

IOUT = 100 mA to 600 mA

VOUT

−

0.0005

−

%/mA

Load Transient Response, Rise/Falltime 1 ms

10 mA to 100 mA Load Step

200 mA to 600 mA Load Step

VOUT

−

Output Voltage Line Regulation, IOUT = 100 mA,

VIN = 2.7 V to 5.5 V

VOUT

−0.05 −

Line Transient Response, IOUT = 100 mA,

3.6 V to 3.0 V Line Step (Falltime=50 ms)

VOUT

−6−

mVPP

Output Voltage Ripple, IOUT = 300 mA (PWM Mode) VOUT −2.0 −mV

Output Voltage Ripple, IOUT = 0 mA (PFM Mode) VOUT −8.0 −mV

Peak Inductor Current 5 5 ILIM −1200 −mA

Oscillator Frequency 5 5 FOSC 1.3 1.5 1.8 MHz

Duty Cycle 5 5 − − − 100 %

Soft−Start Time TSTART −320 500 ms

Thermal Shutdown Threshold TSD −160 −°C

Thermal Shutdown Hysteresis TSDH −25 −°C

POWER SWITCHES

P−Channel On−Resistance RLxH −400 −mW

N−Channel On−Resistance RLxL −400 −mW

P−Channel Leakage Current ILeakH −0.05 −mA

N−Channel Leakage Current ILeakL −0.01 −mA

6. The overall output voltage tolerance depends upon the accuracy of the external resistor (R1, R2).

7. Functionality guaranteed per design and characterization, see chapter ”USB or 5 V Rail Powered Applications”.

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TABLE OF GRAPHS

Typical Characteristics for Step−down Converter Figure

ISTB Standby Current vs. Input Voltage 7

IqQuiescent Current, PFM No Switching vs. Input Voltage 8

VOUT Output Voltage Accuracy vs. T

emperature

9 and 10

Eff Efficiency vs. Output Current 11, 12, 13 and 29

Freq Switching Frequency vs. Input Voltage 14

VOUT Soft−Start vs. Time 15

VOUT Short Circuit Protection vs. Time 16

VOUT Line Regulation vs. Input Voltage 17 and 18

VOUT Line Transient vs. Time 19 and 20

VOUT Load Regulation vs. Output Current 21, 22 and 30

VOUT Load Transient vs. Time 23, 24, 25 and 26

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

2.7 3.2 3.7 4.2 4.7 5.2

Figure 7. Shutdown Current vs. Supply Voltage

ISTB (mA)

VIN, INPUT VOLTAGE (V)

EN = 0 V

IOUT = 0 mA

2.5 3.0 3.5 4.0 4.5 5.0 5.5

Figure 8. Quiescent Current PFM No Switching

vs. Supply Voltage

QUIESCENT CURRENT (mA)

VIN, INPUT VOLTAGE (V)

EN = VIN

IOUT = 0 mA

\OUT : 600 mA

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−1.0%

−0.5%

0.5%

1.0%

−40 0 40 80

ACCURACY (%)

Figure 9. Output Voltage Accuracy vs. Temperature

(VIN = 3.6 V, VOUT = 1.2 V)

TEMPERATURE (°C)

IOUT = 600 mA

IOUT = 30 mA

−1.0%

−0.5%

0.5%

1.0%

−40 0 40 80

ACCURACY (%)

Figure 10. Output Voltage Accuracy vs. Temperature

(VOUT = 1.2 V, IOUT = 200 V)

TEMPERATURE (°C)

VIN = 5.5 V

VIN = 2.7 V

VIN = 3.6 V

50%

55%

60%

65%

70%

75%

80%

85%

90%

95%

100%

0 100 200 300 400 500 600

EFFICIENCY (%)

Figure 11. Efficiency vs. Output Current

(VIN = 3.6 V, TA = 255C)

IOUT

, OUTPUT CURRENT (mA)

IOUT = 30 mA

VOUT = 0.9 V

VOUT = 1.8 V

VOUT = 3.3 V

50%

55%

60%

65%

70%

75%

80%

85%

90%

95%

100%

0 100 200 300 400 500 600

EFFICIENCY (%)

Figure 12. Efficiency vs. Output Current

(VOUT = 1.2 V, TA = 255C)

IOUT

, OUTPUT CURRENT (mA)

VIN = 5.5 V

VIN = 3.6 V

VIN = 2.7 V

50%

55%

60%

65%

70%

75%

80%

85%

90%

95%

100%

0 100 200 300 400 500 600

EFFICIENCY (%)

Figure 13. Efficiency vs. Output Current

(VIN = 3.6 V, VOUT = 1.2 V)

IOUT

, OUTPUT CURRENT (mA)

−40°C

85°C

25°C

1.3

1.4

1.5

1.6

1.7

1.8

2.7 3.2 3.7 4.2 4.7 5.2

FREQUENCY (MHz)

Figure 14. Switching Frequency vs. Input

Voltage (VOUT = 1.2 V, IOUT = 300 mA)

VIN, INPUT VOLTAGE (V)

25°C85°C

−40°C

\ mp7 1 WM

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Figure 15. Typical Soft−Start

(VIN = 3.6 V, VOUT = 1.2 V, IOUT = 250 mA)

VOUT

500 mV/div

VOUTIN

2 V/div

ILX

200 mV/div

Time

100 ms/div

ILX

500 mV/div

VOUT

200 mV/div

Time

2.5 ms/div

Figure 16. Short−Circuit Protection

(VIN = 3.6 V, VOUT = 1.2 V)

1.15

1.16

1.17

1.18

1.19

1.20

1.21

1.22

1.23

1.24

1.25

2.7 3.2 3.7 4.2 4.7 5.2

−40°C

25°C

85°C

VOUT

, OUTPUT VOLTAGE (V)

Figure 17. Line Regulation

(VOUT = 1.2 V, IOUT = 100 mA)

VIN, INPUT VOLTAGE (V)

1.15

1.16

1.17

1.18

1.19

1.20

1.21

1.22

1.23

1.24

1.25

2.7 3.2 3.7 4.2 4.7 5.2

VOUT

, OUTPUT VOLTAGE (V)

Figure 18. Line Regulation

(VOUT = 1.2 V, TA = 255C)

VIN, INPUT VOLTAGE (V)

IOUT = 100 mA

IOUT = 1 mA

IOUT = 600 mA

Figure 19. 3.0 V to 3.6 V Line Transient

(Risetime = 50 ms, VOUT = 1.2 V, IOUT = 100 mA,

TA = 255C)

VOUT

20 mV/div

VIN

1 V/div

Time

20 ms/div

Figure 20. 3.6 V to 3.0 V Line Transient

(Risetime = 50 ms, VOUT = 1.2 V, IOUT = 100 mA,

TA = 255C)

VOUT

20 mV/div

VIN

1 V/div

Time

20 ms/div

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−1.5

−1.0

−0.5

0.5

1.0

1.5

0 100 200 300 400 500 600

25°C

LOAD REGULATION (%)

Figure 21. Load Regulation

(VIN = 3.6 V, VOUT = 1.2 V)

IOUT

, (mA)

−40°C

85°C

0 100 200 300 400 500 60

LOAD REGULATION (%)

Figure 22. Load Regulation

(VOUT = 1.2 V, TA = 255C)

IOUT

, (mA)

−1.5

−1.0

−0.5

0.5

1.0

1.5

VIN = 5.5 V VIN = 2.7 V

VIN = 3.6 V

Figure 23. 10 mA to 100 mA Load Transient

(VIN = 3.6 V, VOUT = 1.2 V, TA = 255C)

Figure 24. 100 mA to 10 mA Load Transient

(VIN = 3.6 V, VOUT = 1.2 V, TA = 255C)

VOUT

50 mV/div

VOUT

50 mV/div

IOUT

50 mA/div

IOUT

50 mA/div

Figure 25. 200 mA to 600 mA Load Transient

(VIN = 3.6 V, VOUT = 1.2 V, TA = 255C)

Figure 26. 600 mA to 200 mA Load Transient

(VIN = 3.6 V, VOUT = 1.2 V, TA = 255C)

VOUT

50 mV/div

IOUT

200 mA/div

VOUT

50 mV/div

IOUT

200 mA/div

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OPERATION DESCRIPTION

Overview

The NCP1521B uses a constant frequency, current mode

step−down architecture. Both the main (P−Channel

MOSFET) and synchronous (N−Channel MOSFET)

switches are internal.

It delivers a constant voltage from either a single Li−Ion

or three cell NiMH/NiCd battery to portable devices such

as cell phones and PDA. The output voltage is set by an

external resistor divider. The NCP1521B sources at least

600 mA, depending on external components chosen.

The NCP1521B works with two modes of operation;

PWM/PFM depending on the current required. In PWM

mode, the device can supply voltage with a tolerance of

"3% and 90% efficiency or better. Lighter load currents

cause the device to automatically switch into PFM mode

for reduced current consumption and extended battery life.

Additional features include soft−start, undervoltage

protection, current overload protection, and thermal

shutdown protection. As shown in Figure 1, only six

external components are required. The part uses an internal

reference voltage of 0.6 V. It is recommended to keep the

part in shutdown mode until the input voltage is 2.7 V or

higher.

PWM Operating Mode

In this mode, the output voltage of the NCP1521B is

regulated by modulating the on−time pulse width of the

main switch Q1 at a fixed frequency of 1.5 MHz. The

switching of the PMOS Q1 is controlled by a flip−flop

driven by the internal oscillator and a comparator that

compares the error signal from an error amplifier with the

sum of the sensed current signal and compensation ramp.

This driver switches ON and OFF the upper side transistor

(Q1) and switches the lower side transistor (Q2) in either

ON state or in current source mode. At the beginning of

each cycle, the main switch Q1 is turned ON while Q2 is

in its current source mode by the rising edge of the internal

oscillator clock. The inductor current ramps up until the

sum of the current sense signal and compensation ramp

becomes higher than the error voltage amplifier. Once this

has occurred, the PWM comparator resets the flip−flop, Q1

is turned OFF and the synchronous switch Q2 is turned in

its ON state. Q2 replaces the external Schottky diode to

reduce the conduction loss and improve the efficiency. To

avoid overall power loss, a certain amount of dead time is

introduced to ensure Q1 is completely turned OFF before

Q2 is being turned ON.

Figure 27. PWM Switching Waveform

(VIN = 3.6 V, VOUT = 1.2 V, IOUT = 600 mA)

200 ns/div

VOUT

10mV/div

ILx

100mA/div

VLx

2V/div

PFM Operating Mode

Under light load conditions, the NCP1521B enters in low

current PFM mode operation to reduce power

consumption. The output regulation is implemented by

pulse frequency modulation. If the output voltage drops

below the threshold of PFM comparator, a new cycle will

be initiated by the PFM comparator to turn on the switch

Q1. Q1 remains ON during the minimum on time of the

structure while Q2 is in its current source mode. The peak

inductor current depends upon the drop between input and

output voltage. After a short dead time delay where Q1 is

switched OFF, Q2 is turned in its ON state. The negative

current detector will detect when the inductor current drops

below zero and sends the signal to turn Q2 to current source

mode to prevent a too large deregulation of the output

voltage. When the output voltage falls below the threshold

of the PFM comparator, a new cycle starts immediately.

Figure 28. PFM Mode Switching Waveform

(VIN = 3.6 V, VOUT = 1.2 V, IOUT = 0 mA)

Vout

10mV/div

ILx

100mA/div

VLx

2V/div

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Cycle−by−Cycle Current Limitation

From the block diagram (Figure 4), an ILIM comparator

is used to realize cycle−by−cycle current limit protection.

The comparator compares the LX pin voltage with the

reference voltage, which is biased by a constant current. If

the inductor current reaches the limit, the ILIM comparator

detects the LX voltage falling below the reference voltage

and releases the signal to turn off the switch Q1. The

cycle−by−cycle current limit is set at 1200 mA (nom).

Short Circuit Protection

When the output is shorted to ground, the device limits

the inductor current. The duty−cycle is minimum and the

consumption on the input line is 300 mA (Typ). When the

short circuit condition is removed, the device returns to the

normal mode of operation.

Soft−Start

The NCP1521B uses soft−start (300 ms Typ) to limit the

inrush current when the device is initially enabled.

Soft−start is implemented by gradually increasing the

reference voltage until it reaches the full reference voltage.

During startup, a pulsed current source charges the internal

soft−start capacitor to provide gradually increasing

reference voltage. When the voltage across the capacitor

ramps up to the nominal reference voltage, the pulsed

current source will be switched off and the reference

voltage will switch to the regular reference voltage.

Shutdown Mode

Forcing this pin to a voltage below 0.4 V will shut down

the IC. In shutdown mode, the internal reference, oscillator

and most of the control circuitries are turned off. Therefore,

the typical current consumption will be 0.3 mA (typical

value). Applying a voltage above 1.2 V to EN pin will

enable the device for normal operation. The typical

threshold is around 0.7 V. The device will go through

soft−start to normal operation.

Thermal Shutdown

Internal Thermal Shutdown circuitry is provided to

protect the integrated circuit in the event that the maximum

junction temperature is exceeded. If the junction

temperature exceeds 160°C, the device shuts down. In this

mode switch Q1 and Q2 and the control circuits are all

turned off. The device restarts in soft−start after the

temperature drops below 135°C. This feature is provided

to prevent catastrophic failures from accidental device

overheating, and it is not intended as a substitute for proper

heatsinking.

Low Dropout Operation

The NCP1521B offers a low input to output voltage

difference. The NCP1521B can operate at 100% duty

cycle. In this mode the PMOS (Q1) remains completely on.

The minimum input voltage to maintain regulation can

be calculated as:

VIN(min) +VOUT(max)

(eq. 1)

)(IOUT (RDS(on) )RINDUCTOR))

•VOUT: Output Voltage (Volts)

•IOUT: Max Output Current

•RDS(on): P−Channel Switch RDS(on)

•RINDUCTOR: Inductor Resistance (DCR)

USB or 5 V Rail Powered Applications

For USB or 5 V rail powered applications, NCP1521B is

able to supply voltages up to 3.9 V, 600 mA, operating in

PWM mode only, with high efficiency (Figure 29), low

output voltage ripple and good load regulation results over

all current range (Figure 30).

Figure 29. Efficiency vs. Output Current

(VIN = 5.0 V, VOUT = 3.9 V)

100

0 100 200 300 400 500 600

EFFICIENCY (%)

IOUT

, OUTPUT CURRENT (mA)

−40°C

85°C

25°C

Figure 30. Load Regulation

(VIN = 5.0 V, VOUT = 3.9 V)

0 100 200 300 400 500 600

LOAD REGULATION (%)

IOUT

, (mA)

−1.5

−1.0

−0.5

0.5

1.0

1.5

−40°C

85°C

25°C

2.0

−2.0

R1 R2 VOUT L X f VOUT V

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APPLICATION INFORMATION

Output Voltage Selection

The output voltage is programmed through an external

resistor divider connected from VOUT to FB then to GND.

For low power consumption and noise immunity, the

resistor from FB to GND (R2) should be in the

[100 k−600 k] range. If R2 is 200 k given the VFB is 0.6 V,

the current through the divider will be 3.0 mA.

The formula below gives the value of VOUT, given the

desired R1 and the R1 value:

VOUT +VFB (1 )R1

R2)(eq. 2)

•VOUT: Output Voltage (Volts)

•VFB: Feedback Voltage = 0.6 V

•R1: Feedback Resistor from VOUT to FB

•R2: Feedback Resistor from FB to GND

Input Capacitor Selection

In PWM operating mode, the input current is pulsating

with large switching noise. Using an input bypass capacitor

can reduce the peak current transients drawn from the

input supply source, thereby reducing switching noise

significantly. The capacitance needed for the input bypass

capacitor depends on the source impedance of the input

supply.

The maximum RMS current occurs at 50% duty cycle

with maximum output current, which is Iout_max/2.

For NCP1521B, a low profile, low ESR ceramic

capacitor of 4.7 mF should be used for most of the cases. For

effective bypass results, the input capacitor should be

placed as close as possible to the VIN pin.

Table 1. List of Input Capacitor

Murata GRM188R60J475KE

GRM21BR71C475KA

Taiyo Yuden JMK212BY475MG

TDK C2012X5ROJ475KB

C1632X5ROJ475KT

Output L−C Filter Design Considerations

The NCP1521B operates at 1.5 MHz frequency and uses

current mode architecture. The correct selection of the

output filter ensures good stability and fast transient

response.

Due to the nature of the buck converter, the output L−C

filter must be selected to work with internal compensation.

For NCP1521B, the internal compensation is internally

fixed and it is optimized for an output filter of L = 2.2 mH

and COUT = 10 mF.

The corner frequency is given by:

fc+1

2pL COUT

Ǹ(eq. 3)

2p2.2 mH 10 mF

Ǹ+34 kHz

The device is intended to operate with inductance values

between 1.0 mH and maximum of 4.7 mH.

If the corner frequency is moved, it is recommended to

check the loop stability depending on the output ripple

voltage accepted and output current required. For lower

frequency, the stability will be increased; a larger output

capacitor value could be chosen without critical effect on

the system. On the other hand, a smaller capacitor value

increases the corner frequency and it should be critical for

the system stability. Take care to check the loop stability.

The phase margin is usually higher than 45°.

Table 2. L−C Filter Example

Inductance (L) Output Capacitor (Cout)

1.0 mH22 mF

2.2 mH10 mF

4.7 mH4.7 mF

Inductor Selection

The inductor parameters directly related to device

performances are saturation current and DC resistance and

inductance value. The inductor ripple current (DIL)

decreases with higher inductance:

DIL+VOUT

L fSW ǒ1−VOUT

VIN Ǔ(eq. 4)

DIL peak to peak inductor ripple current

L inductor value

fSW switching frequency

The saturation current of the inductor should be rated

higher than the maximum load current plus half the ripple

current:

IL(MAX) +IO(MAX) )DIL

2(eq. 5)

DIL(MAX) Maximum inductor current

DIO(MAX) Maximum Output current

The inductor’s resistance will factor into the overall

efficiency of the converter. For best performances, the DC

resistance should be less than 0.3 W for good efficiency.

NCP1521B

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Table 3. LIST OF INDUCTOR

FDK MIPW3226 Series

TDK VLF3010AT Series

Taiyo Yuden LQ CBL2012

Coil craft DO1605−T Series

LPO3010

Output Capacitor Selection

Selecting the proper output capacitor is based on the

desired output ripple voltage. Ceramic capacitors with low

ESR values will have the lowest output ripple voltage and

are strongly recommended. The output capacitor requires

either an X7R or X5R dielectric.

The output ripple voltage in PWM mode is given by:

DVOUT +DIL ǒ1

4 fSW COUT )ESRǓ(eq. 6)

In PFM mode (at light load), the output voltage is

regulated by pulse frequency modulation. The output

voltage ripple is independent of the output capacitor value.

It is set by the threshold of PFM comparator.

Table 4. LIST OF OUTPUT CAPACITOR

Murata GRM188R60J475KE 4.7 mF

GRM21BR60J106ME19L

10 mF

GRM188R60OJ106ME 10 mF

Taiyo Yuden JMK212BY475MG 4.7 mF

JMK212BJ106MG 10 mF

TDK C2012X5ROJ475KB 4.7 mF

C2012X5ROJ226M 22 mF

C2012X5ROJ106K 10 mF

Feed−Forward Capacitor Selection

The feed−forward capacitor sets the feedback loop

response and is critical to obtain good loop stability.

Given that the compensation is internally fixed, a fixed

18 pF or higher ceramic capacitor is needed. Choose a

small ceramic capacitor X7R or X5R or COG dielectric.

END" m M: 35% ” J iﬁi 1m“ Eff T; T + Q 0.95

NCP1521B

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PACKAGE DIMENSIONS

TSOP−5

CASE 483−02

ISSUE H

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. MAXIMUM LEAD THICKNESS INCLUDES

LEAD FINISH THICKNESS. MINIMUM LEAD

THICKNESS IS THE MINIMUM THICKNESS

OF BASE MATERIAL.

4. DIMENSIONS A AND B DO NOT INCLUDE

MOLD FLASH, PROTRUSIONS, OR GATE

BURRS.

5. OPTIONAL CONSTRUCTION: AN

ADDITIONAL TRIMMED LEAD IS ALLOWED

IN THIS LOCATION. TRIMMED LEAD NOT TO

EXTEND MORE THAN 0.2 FROM BODY.

DIM MIN MAX

MILLIMETERS

A3.00 BSC

B1.50 BSC

C0.90 1.10

D0.25 0.50

G0.95 BSC

H0.01 0.10

J0.10 0.26

K0.20 0.60

L1.25 1.55

M0 10

S2.50 3.00

123

54 S

0.7

0.028

1.0

0.039

ǒmm

inchesǓ

SCALE 10:1

0.95

0.037

2.4

0.094

1.9

0.074

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

0.20

CAB

T0.10

2X T0.20

NOTE 5

SEATING

PLANE

0.05

DETAIL Z

H ECU EEK J 0N semicondumnr m J Wm mmms m; mu m m. meme we; we “gm m make changes W M W mm mm m; sou mm mm 592cm cansewm ”mm and m. peﬂmmm m we”: some m; m WY an m systems mm m mm W mm mm 5 mm me pm mm m m scum: and M a keg. mm W. a. WW .7. mm new”. .egammg we mm m m sum nHmr a‘ man mannr

NCP1521B

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PACKAGE DIMENSIONS

UDFN6 2x2, 0.65P

CASE 517AB−01

ISSUE B

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

0.47

0.40

0.65

1.70

2.30

DIMENSIONS: MILLIMETERS

0.95

PITCH

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. COPLANARITY APPLIES TO THE EXPOSED

PAD AS WELL AS THE TERMINALS.

SEATING

PLANE

0.10 C

2X 0.10 C

DIM

MIN MAX

MILLIMETERS

0.45 0.55

A1 0.00 0.05

A3 0.127 REF

b0.25 0.35

D2.00 BSC

D2 1.50 1.70

0.80 1.00

E2.00 BSC

e0.65 BSC

0.25 0.35

PIN ONE

REFERENCE

0.08 C

0.10 C

A0.10 C

0.05 C

BOTTOM VIEW

0.20 ---

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